DE69027644T2 - Verfahren zur Herstellung eines bipolaren Transistors - Google Patents

Verfahren zur Herstellung eines bipolaren Transistors

Info

Publication number
DE69027644T2
DE69027644T2 DE69027644T DE69027644T DE69027644T2 DE 69027644 T2 DE69027644 T2 DE 69027644T2 DE 69027644 T DE69027644 T DE 69027644T DE 69027644 T DE69027644 T DE 69027644T DE 69027644 T2 DE69027644 T2 DE 69027644T2
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027644T
Other languages
English (en)
Other versions
DE69027644D1 (de
Inventor
Wilhelmus Jacobus Mari Josquin
Dijk Jan Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Publication of DE69027644D1 publication Critical patent/DE69027644D1/de
Application granted granted Critical
Publication of DE69027644T2 publication Critical patent/DE69027644T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
DE69027644T 1989-09-20 1990-09-14 Verfahren zur Herstellung eines bipolaren Transistors Expired - Fee Related DE69027644T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8921262A GB2236901A (en) 1989-09-20 1989-09-20 A method of manufacturing a semiconductor device

Publications (2)

Publication Number Publication Date
DE69027644D1 DE69027644D1 (de) 1996-08-08
DE69027644T2 true DE69027644T2 (de) 1997-01-16

Family

ID=10663360

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027644T Expired - Fee Related DE69027644T2 (de) 1989-09-20 1990-09-14 Verfahren zur Herstellung eines bipolaren Transistors

Country Status (6)

Country Link
US (1) US5023192A (de)
EP (1) EP0421507B1 (de)
JP (1) JPH0727915B2 (de)
KR (1) KR910007162A (de)
DE (1) DE69027644T2 (de)
GB (1) GB2236901A (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227317A (en) * 1989-04-21 1993-07-13 Hitachi, Ltd. Method of manufacturing semiconductor integrated circuit bipolar transistor device
JPH05226352A (ja) * 1992-02-17 1993-09-03 Mitsubishi Electric Corp 半導体装置及びその製造方法
WO1994016461A1 (en) * 1993-01-04 1994-07-21 Vlsi Technology, Inc. Cmos locos isolation for self-aligned npn bjt in a bicmos process
JP2606648B2 (ja) * 1993-03-19 1997-05-07 日本電気株式会社 バイポーラトランジスタ及びその製造方法
US5444003A (en) * 1993-06-23 1995-08-22 Vlsi Technology, Inc. Method and structure for creating a self-aligned bicmos-compatible bipolar transistor with a laterally graded emitter structure
US5866462A (en) * 1995-09-29 1999-02-02 Analog Devices, Incorporated Double-spacer technique for forming a bipolar transistor with a very narrow emitter
KR100245813B1 (ko) * 1997-05-28 2000-03-02 윤종용 자기정합형 더블 폴리실리콘 바이폴라 트랜지스터및 그의 제조방법
FR2776828B1 (fr) * 1998-03-31 2003-01-03 Sgs Thomson Microelectronics Region de base-emetteur d'un transistor bipolaire submicronique
KR100486265B1 (ko) * 2002-09-19 2005-05-03 삼성전자주식회사 바이폴라 트랜지스터 및 그 제조 방법
DE602005023125D1 (de) * 2005-04-27 2010-10-07 St Microelectronics Srl Vertikaler MOSFET Transistor als Auswahltransistor für nichtflüchtige Speichereinrichtung betrieben
TWI383502B (zh) * 2007-10-02 2013-01-21 Chunghwa Picture Tubes Ltd 畫素結構及其製造方法
CN101409262B (zh) * 2007-10-10 2010-06-09 中华映管股份有限公司 像素结构的制造方法
US8765607B2 (en) * 2011-06-01 2014-07-01 Freescale Semiconductor, Inc. Active tiling placement for improved latch-up immunity
US10032868B2 (en) * 2016-09-09 2018-07-24 Texas Instruments Incorporated High performance super-beta NPN (SBNPN)

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2508704B1 (fr) * 1981-06-26 1985-06-07 Thomson Csf Procede de fabrication de transistors bipolaires integres de tres petites dimensions
US4483726A (en) * 1981-06-30 1984-11-20 International Business Machines Corporation Double self-aligned fabrication process for making a bipolar transistor structure having a small polysilicon-to-extrinsic base contact area
DE3330895A1 (de) * 1983-08-26 1985-03-14 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von bipolartransistorstrukturen mit selbstjustierten emitter- und basisbereichen fuer hoechstfrequenzschaltungen
JPS6081862A (ja) * 1983-10-12 1985-05-09 Nippon Telegr & Teleph Corp <Ntt> 半導体装置およびその製造方法
NL8402856A (nl) * 1984-09-18 1986-04-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US4610730A (en) * 1984-12-20 1986-09-09 Trw Inc. Fabrication process for bipolar devices
JPH0658912B2 (ja) * 1985-05-07 1994-08-03 日本電信電話株式会社 バイポーラトランジスタの製造方法
EP0246682A1 (de) * 1986-04-23 1987-11-25 Koninklijke Philips Electronics N.V. Verfahren zur Herstellung einer Halbleiteranordnung mit einer Elektrode aus polykristallinem Silizium
JPS63111667A (ja) * 1986-10-29 1988-05-16 Mitsubishi Electric Corp 半導体装置の製造方法
JP2565159B2 (ja) * 1987-03-28 1996-12-18 ソニー株式会社 半導体装置及びその製造方法
US4772566A (en) * 1987-07-01 1988-09-20 Motorola Inc. Single tub transistor means and method
JPH0616513B2 (ja) * 1987-07-02 1994-03-02 日本電気株式会社 Ｎｐｎ型バイポーラトランジスタの製造方法
JPS6459955A (en) * 1987-08-31 1989-03-07 Nec Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
US5023192A (en) 1991-06-11
DE69027644D1 (de) 1996-08-08
JPH03112136A (ja) 1991-05-13
EP0421507A3 (en) 1991-11-06
JPH0727915B2 (ja) 1995-03-29
EP0421507A2 (de) 1991-04-10
GB2236901A (en) 1991-04-17
EP0421507B1 (de) 1996-07-03
GB8921262D0 (en) 1989-11-08
KR910007162A (ko) 1991-04-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee