DE69129379D1 - Verfahren zur Herstellung eines bipolaren Transistors - Google Patents

Verfahren zur Herstellung eines bipolaren Transistors

Info

Publication number
DE69129379D1
DE69129379D1 DE69129379T DE69129379T DE69129379D1 DE 69129379 D1 DE69129379 D1 DE 69129379D1 DE 69129379 T DE69129379 T DE 69129379T DE 69129379 T DE69129379 T DE 69129379T DE 69129379 D1 DE69129379 D1 DE 69129379D1
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69129379T
Other languages
English (en)
Other versions
DE69129379T2 (de
Inventor
Alan G Solheim
Bamdad Bastami
James L Bouknight
George E Ganschow
Bancherd Delong
Rajeeva Lahri
Steve M Leibiger
Christopher S Blair
Rick C Jerome
Madan Biswal
Tad Davies
Vida Ilderem
Ali Iranmanesh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69129379D1 publication Critical patent/DE69129379D1/de
Publication of DE69129379T2 publication Critical patent/DE69129379T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/6628—Inverse transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
DE69129379T 1990-04-02 1991-03-28 Verfahren zur Herstellung eines bipolaren Transistors Expired - Fee Related DE69129379T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/503,498 US5139961A (en) 1990-04-02 1990-04-02 Reducing base resistance of a bjt by forming a self aligned silicide in the single crystal region of the extrinsic base

Publications (2)

Publication Number Publication Date
DE69129379D1 true DE69129379D1 (de) 1998-06-18
DE69129379T2 DE69129379T2 (de) 1998-12-17

Family

ID=24002342

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69129379T Expired - Fee Related DE69129379T2 (de) 1990-04-02 1991-03-28 Verfahren zur Herstellung eines bipolaren Transistors

Country Status (5)

Country Link
US (1) US5139961A (de)
EP (1) EP0450500B1 (de)
JP (1) JPH06342802A (de)
KR (1) KR100196085B1 (de)
DE (1) DE69129379T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation
US5462894A (en) * 1991-08-06 1995-10-31 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
WO1993016494A1 (en) * 1992-01-31 1993-08-19 Analog Devices, Inc. Complementary bipolar polysilicon emitter devices
US5358883A (en) * 1992-02-03 1994-10-25 Motorola, Inc. Lateral bipolar transistor
US5387813A (en) * 1992-09-25 1995-02-07 National Semiconductor Corporation Transistors with emitters having at least three sides
JP3343968B2 (ja) * 1992-12-14 2002-11-11 ソニー株式会社 バイポーラ型半導体装置およびその製造方法
EP0608999B1 (de) * 1993-01-29 1997-03-26 National Semiconductor Corporation Bipolartransistoren und deren Herstellungsverfahren
US5389552A (en) * 1993-01-29 1995-02-14 National Semiconductor Corporation Transistors having bases with different shape top surfaces
US5312764A (en) * 1993-05-28 1994-05-17 Motorola, Inc. Method of doping a semiconductor substrate
US5389553A (en) * 1993-06-30 1995-02-14 National Semiconductor Corporation Methods for fabrication of transistors
US5451546A (en) * 1994-03-10 1995-09-19 National Semiconductor Corporation Masking method used in salicide process for improved yield by preventing damage to oxide spacers
US5548158A (en) * 1994-09-02 1996-08-20 National Semiconductor Corporation Structure of bipolar transistors with improved output current-voltage characteristics
JP3518122B2 (ja) * 1996-01-12 2004-04-12 ソニー株式会社 半導体装置の製造方法
US6329703B1 (en) * 1998-02-25 2001-12-11 Infineon Technologies Ag Contact between a monocrystalline silicon region and a polycrystalline silicon structure and method for producing such a contact
US8674454B2 (en) 2009-02-20 2014-03-18 Mediatek Inc. Lateral bipolar junction transistor
US20100213507A1 (en) * 2009-02-20 2010-08-26 Ching-Chung Ko Lateral bipolar junction transistor
US7897995B2 (en) * 2009-04-07 2011-03-01 Mediatek Inc. Lateral bipolar junction transistor with reduced base resistance
US7932581B2 (en) * 2009-05-12 2011-04-26 Mediatek Inc. Lateral bipolar junction transistor

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3955269A (en) * 1975-06-19 1976-05-11 International Business Machines Corporation Fabricating high performance integrated bipolar and complementary field effect transistors
US4507847A (en) * 1982-06-22 1985-04-02 Ncr Corporation Method of making CMOS by twin-tub process integrated with a vertical bipolar transistor
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法
US4498227A (en) * 1983-07-05 1985-02-12 Fairchild Camera & Instrument Corporation Wafer fabrication by implanting through protective layer
US4536945A (en) * 1983-11-02 1985-08-27 National Semiconductor Corporation Process for producing CMOS structures with Schottky bipolar transistors
US4538343A (en) * 1984-06-15 1985-09-03 Texas Instruments Incorporated Channel stop isolation technology utilizing two-step etching and selective oxidation with sidewall masking
US4609568A (en) * 1984-07-27 1986-09-02 Fairchild Camera & Instrument Corporation Self-aligned metal silicide process for integrated circuits having self-aligned polycrystalline silicon electrodes
US4764480A (en) * 1985-04-01 1988-08-16 National Semiconductor Corporation Process for making high performance CMOS and bipolar integrated devices on one substrate with reduced cell size
JPS6252963A (ja) * 1985-09-02 1987-03-07 Fujitsu Ltd バイポ−ラトランジスタの製造方法
KR910002831B1 (ko) * 1986-04-23 1991-05-06 아메리칸 텔리폰 앤드 텔레그라프 캄파니 반도체 소자 제조공정
JPS62290173A (ja) * 1986-06-09 1987-12-17 Oki Electric Ind Co Ltd 半導体集積回路装置の製造方法
JPH01140761A (ja) * 1987-11-27 1989-06-01 Nec Corp 半導体装置
US4857476A (en) * 1988-01-26 1989-08-15 Hewlett-Packard Company Bipolar transistor process using sidewall spacer for aligning base insert
US4946798A (en) * 1988-02-09 1990-08-07 Oki Electric Industry Co., Ltd. Semiconductor integrated circuit fabrication method
US4902633A (en) * 1988-05-09 1990-02-20 Motorola, Inc. Process for making a bipolar integrated circuit
JPH0744186B2 (ja) * 1989-03-13 1995-05-15 株式会社東芝 半導体装置の製造方法
US4965221A (en) * 1989-03-15 1990-10-23 Micron Technology, Inc. Spacer isolation method for minimizing parasitic sidewall capacitance and creating fully recessed field oxide regions

Also Published As

Publication number Publication date
EP0450500B1 (de) 1998-05-13
KR100196085B1 (ko) 1999-06-15
DE69129379T2 (de) 1998-12-17
EP0450500A3 (en) 1994-05-18
EP0450500A2 (de) 1991-10-09
KR910019143A (ko) 1991-11-30
JPH06342802A (ja) 1994-12-13
US5139961A (en) 1992-08-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee