DE60213086T2 - Verfahren zur herstellung von dielektrischen zwischenschichten mit niedriger dielektrizitätskonstante für beol-verbindungsleitungen mit verbesserter haftung und niedriger fehlerdichte - Google Patents

Verfahren zur herstellung von dielektrischen zwischenschichten mit niedriger dielektrizitätskonstante für beol-verbindungsleitungen mit verbesserter haftung und niedriger fehlerdichte Download PDF

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Publication number
DE60213086T2
DE60213086T2 DE60213086T DE60213086T DE60213086T2 DE 60213086 T2 DE60213086 T2 DE 60213086T2 DE 60213086 T DE60213086 T DE 60213086T DE 60213086 T DE60213086 T DE 60213086T DE 60213086 T2 DE60213086 T2 DE 60213086T2
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DE
Germany
Prior art keywords
coupling agent
silane coupling
substrate
dielectric
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60213086T
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German (de)
English (en)
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DE60213086D1 (de
Inventor
Robert Andrew Pittsburgh ECKERT
C. John Knoxville HAY
Curtis Jeffrey Montvale HEDRICK
Kang-Wook Yorktown Heights LEE
Gerhard Eric Sandy Hook LINIGER
Erika Eva Bronx SIMONYI
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International Business Machines Corp
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International Business Machines Corp
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Publication of DE60213086D1 publication Critical patent/DE60213086D1/de
Publication of DE60213086T2 publication Critical patent/DE60213086T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE60213086T 2001-02-21 2002-02-19 Verfahren zur herstellung von dielektrischen zwischenschichten mit niedriger dielektrizitätskonstante für beol-verbindungsleitungen mit verbesserter haftung und niedriger fehlerdichte Expired - Lifetime DE60213086T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/789,422 US6455443B1 (en) 2001-02-21 2001-02-21 Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density
US789422 2001-02-21
PCT/US2002/004879 WO2002069381A2 (en) 2001-02-21 2002-02-19 Method of fabricating low-dielectric constant interlevel dielectric films for beol interconnects with enhanced adhesion and low-defect density

Publications (2)

Publication Number Publication Date
DE60213086D1 DE60213086D1 (de) 2006-08-24
DE60213086T2 true DE60213086T2 (de) 2006-12-28

Family

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Family Applications (1)

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DE60213086T Expired - Lifetime DE60213086T2 (de) 2001-02-21 2002-02-19 Verfahren zur herstellung von dielektrischen zwischenschichten mit niedriger dielektrizitätskonstante für beol-verbindungsleitungen mit verbesserter haftung und niedriger fehlerdichte

Country Status (12)

Country Link
US (1) US6455443B1 (enExample)
EP (1) EP1390972B1 (enExample)
JP (1) JP3759108B2 (enExample)
KR (1) KR100516534B1 (enExample)
CN (1) CN1251312C (enExample)
AT (1) ATE333144T1 (enExample)
DE (1) DE60213086T2 (enExample)
ES (1) ES2262797T3 (enExample)
IL (1) IL157506A (enExample)
IN (1) IN2003DE01322A (enExample)
TW (1) TW561551B (enExample)
WO (1) WO2002069381A2 (enExample)

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Also Published As

Publication number Publication date
EP1390972B1 (en) 2006-07-12
IL157506A (en) 2007-06-03
WO2002069381A3 (en) 2003-12-18
JP2004532514A (ja) 2004-10-21
US6455443B1 (en) 2002-09-24
IL157506A0 (en) 2004-03-28
ATE333144T1 (de) 2006-08-15
EP1390972A2 (en) 2004-02-25
KR20030071841A (ko) 2003-09-06
CN1550036A (zh) 2004-11-24
CN1251312C (zh) 2006-04-12
WO2002069381A2 (en) 2002-09-06
US20020160600A1 (en) 2002-10-31
JP3759108B2 (ja) 2006-03-22
ES2262797T3 (es) 2006-12-01
IN2003DE01322A (enExample) 2005-05-27
DE60213086D1 (de) 2006-08-24
KR100516534B1 (ko) 2005-09-22
TW561551B (en) 2003-11-11

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