CN1251312C - 用于后端线互连结构的具有增强粘合力及低缺陷密度的低介电常数层间介电膜的制造方法 - Google Patents

用于后端线互连结构的具有增强粘合力及低缺陷密度的低介电常数层间介电膜的制造方法 Download PDF

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CN1251312C
CN1251312C CNB028063457A CN02806345A CN1251312C CN 1251312 C CN1251312 C CN 1251312C CN B028063457 A CNB028063457 A CN B028063457A CN 02806345 A CN02806345 A CN 02806345A CN 1251312 C CN1251312 C CN 1251312C
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silane
substrate
silane coupler
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dielectric
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CN1550036A (zh
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A·R·艾克特
J·C·海
J·C·海德里克
K－W·李
E·G·里尼格
E·E·西蒙伊
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Core Usa Second LLC
GlobalFoundries Inc
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Abstract

一种基本上无缺陷的、具有改进的粘合性的低介电常数介电膜，其通过以下步骤形成：(a)将包含至少一个可聚合基团的硅烷偶联剂涂敷到基板的表面，以提供在所述基板上的所述硅烷偶联剂的基本上均匀的涂层；(b)在约90℃或更高的温度下，加热包含所述硅烷偶联剂涂层的基板，以提供含有Si-O键的表面；(c)用适当的溶剂漂洗经加热的基板，所述溶剂可有效地去除任何残余的硅烷偶联剂；和(d)将介电材料涂敷到漂洗过的含有Si-O键的表面上。

Description

用于后端线互连结构的具有增强粘合力及低缺陷 密度的低介电常数层间介电膜的制造方法
                       技术领域
本发明涉及集成电路(IC)，更具体地，本发明涉及制造IC的方法，所述IC包含了至少低介电常数k、具有与之相关的改进粘合力、低缺陷密度及增强的电性能的层间介电膜。
                       背景技术
半导体工业持续地努力改进密度及性能，从而促使采用先进的互连结构(interconnect structure)。例如，已将铜Cu引入作为0.22μm代及以下产品的布线技术，到0.13μm代，可预期低介电常数介电质(相对介电常数为3.8或更低的材料)将与铜互连结构结合以进一步改进性能。
在金属化的情况下，合理地直接选择新的布线材料，但金属间介电质(IMD)的选择却不那么明确。许多基于旋涂有机材料或玻璃材料的新低介电常数介电质最近已可应用于半导体工业。但是需要大量的表征鉴定及整合的努力来选择适当的候选材料，然后将这些材料引入到半导体产品中。
在IMD的材料选择过程中，通常强调材料的电性能及化学性能。例如，用于先进的互连应用的IMD必须具有低介电常数，低泄漏，高崩溃强度，及在典型的加工温度下良好的热稳定性。
虽然在初始的评估过程中可能非常强调这些性能，但在选择用于半导体制造的介电质时，机械性能及可制造性起重要作用，甚至可能起主要作用。例如，机械性能如化学-机械抛光(CMP)及包装操作会损害柔软的介电结构；因此，在选择IMD时，也必须仔细地考虑机械性能及可制造性。
另外，对于许多低介电常数材料，通常需要粘合促进剂来确保低介电常数介电质可有效地粘合到基板上。这本身值得关注，因为许多目前可用的低介电常数介电质如旋涂有机材料或玻璃材料对由粒子污染造成的缺陷特别敏感，所述缺陷反过来会造成介电质在低电场偏压下破裂。因此，在本领域中已知的典型粘合促进剂不能用于低介电常数介电质。
授予Brewer等人的美国专利4,950,583及4,732,858描述了一种粘合促进产品及用于处理集成基板的方法。特别是，Brewer等人描述使用烷氧基硅烷来改进光刻胶与基板的粘合性，以及将活化催化剂加入到烷氧基硅烷中以增强界面处的粘合。另外，Brewer等人描述将辅助聚合物如甲基纤维素加入到烷氧基硅烷中以增强对界面的粘合。在一些例子中，建议加热粘合促进剂(110-140℃，15-30分钟)以改进粘合性。
本发明公开了一种将IMD粘附到基板或互连层以在重复的热循环后在保持IMD电性能(即无缺陷膜)的同时产生出色的粘合性的方法。所述方法需要旋涂粘合促进剂，烘烤以促进反应，用溶剂漂洗以除去未反应的粘合促进剂(以防止在随后的IMD层中形成微粒缺陷)，随后涂敷IMD层。由Brewer等人提出的方法将造成IMD中高浓度的微粒缺陷，使其作为绝缘体并不可靠或有效。
授予You等人的美国专利5,760,480中描述使用硅烷基粘合促进剂，其可施用在金属与介电层之间，或其可加入到介电层中。如上所述，本发明提出一种将IMD粘合到基板或互连层以在重复的热循环后在保持IMD电性能(即无缺陷膜)的同时产生出色的粘合性的方法。You等人并未提出与旋涂介电绝缘体一起有效使用粘合促进剂的方法或步骤。
鉴于上述关于低介电常数介电质的缺点，需要开发一种可将低介电常数介电质用在线后端(BEOL)加工中的方法，其中所述低介电常数介电质具有改进的粘合性、低缺陷密度及良好的电性能。
                        发明概述
本发明涉及一种制造IC的方法，所述IC至少包括与基板接触的低介电常数介电材料，其中所述低介电常数介电材料具有改进的对基板的粘合力，并基本上没有缺陷。在本发明中，可通过采用以下加工步骤来得到这种IC：将高浓度的硅烷偶联剂涂敷到基板上，加热以及漂洗。意外地发现，每个加工步骤(其将在以下详细地定义)对提供基本上无缺陷的、具有改进的粘合性能和良好的电性能的低介电常数介电质是必要的。
具体地，本发明的加工步骤包括：
(a)将含至少一个可聚合基团的硅烷偶联剂涂敷到基板的表面，以提供在所述基板上所述硅烷偶联剂的基本上均匀的涂层；
(b)在约90℃或更高的温度下，加热含所述硅烷偶联剂的所述涂层的基板，以在所述基板上提供含Si-O键的表面层；
(c)用适当的溶剂漂洗所述经加热的基板，所述溶剂可有效地去除任何残余的未反应的硅烷偶联剂；及
(d)将介电材料涂敷到漂洗过的含所述Si-O键的表面上。
本发明中使用的硅烷偶联剂起用于介电材料的粘合促进剂的作用，而不会在其中造成任何显著的缺陷形成。另外，通过使用本发明的硅烷偶联剂，可在上述的步骤(d)中涂敷具有约3.8或更低的相对介电常数的低介电常数介电质。这可允许形成具有基本上无缺陷的低介电常数介电质作为层间或层内介电质的内连结构。
                        附图简述
图1-4是本发明形成IC所采用的基本加工步骤的示意图，所述IC包括基本上无缺陷的、具有与之相关的改进的粘合性能的低介电常数介电质。
                        发明详述
现在将参考本申请附图详细地说明本发明。应该指出，在所附附图中，相同参考编号用来描述相同和/或相应的元素。
首先参考图1，其说明了进行本发明第一步骤，即将硅烷偶联剂涂敷到基板表面上后所形成的结构。
具体地，图1所示的结构包括在其上形成硅烷偶联剂的涂层12的基板10。
本发明中所采用的基板10可以是含有硅的半导体材料例如Si、SiGe和绝缘体上外延硅；导电金属例如Cu、Al、W、Pt、Ag、Au，及其合金或多层；铜阻隔材料例如氮化硅或非晶碳化硅材料(其也可含有或不含有氮)；或内连结构的内连层之一。当基板10为内连层(interconnect level)时，所述基板可由任何常用的无机介电材料(如SiO2或钙钛矿形氧化物)或有机介电材料(如聚酰亚胺)构成，且其可在其中包含导电金属线或通路(vias)。为了清楚起见，基板10并未示出导电金属线或通路的存在，但所述基板可包含导电金属线或通路。
当基板10为IC结构的内连层时，其采用常规技术制造，所述常规技术包括金属镶嵌，双金属镶嵌及非金属镶嵌，例如本领域技术人员所熟知的金属蚀刻方法。因为内连结构的制造是已知的，且并非本发明的关键，所以在此并不详细讨论它。
本文所用术语“催烷偶联剂”表示具有至少一个可聚合基团的任何含硅烷的材料，其可作为后续低介电常数介电材料的粘合促进剂。特别地，本发明所采用的硅烷偶联剂为下式的烷氧基硅烷：
其中，X为能够进行Diels-Alder反应或自由基反应的可聚合基团，并选自烯烃、降冰片烯(norborenylenes)、乙烯基及炔烃；R1和R2可相同或不同并为H、烷基、烷氧基、烷基酯、链烯基、炔基、芳基、或环烷基；R3为烷基或-C(O)R4基，其中R4为烷基；a和b可相同或不同且为0、1或2，y为1-3，前提是a+b+y的总和为3。
本发明可使用不同的烷氧基硅烷，例如乙烯基三烷氧基硅烷、烯丙基三烷氧基硅烷、乙烯基二苯基烷氧基硅烷、降冰片烯基三烷氧基硅烷、及三乙烯基三烷氧基硅烷。一些具体的例子包括乙烯基三乙酰氧基硅烷、乙烯基三甲氧基硅烷、乙烯基三乙氧基硅烷、烯丙基三甲氧基硅烷、乙烯基二苯基乙氧基硅烷、降冰片烯基三乙氧基硅烷及三乙烯基三乙氧基硅烷。可用在本发明的不同烷氧基硅烷中，优选为乙烯基三烷氧基硅烷如乙烯基三乙酰氧基硅烷、乙烯基三甲氧基硅烷及乙烯基二苯基乙氧基硅烷。在这些乙烯基三烷氧基硅烷中，乙烯基三乙酰氧基硅烷尤其优选。
无论使用哪一种硅烷偶联剂，本发明均要求涂敷的硅烷偶联剂的量应足以在基板表面上得到基本上均匀的硅烷偶联剂涂层。“基本上均匀”意指涂敷硅烷偶联剂，在基板上得到连续的硅烷偶联剂涂层，在其中没有任何不连续。
为了在基板10的表面上得到基本上均匀的硅烷偶联剂涂层，使用硅烷偶联剂的浓溶液。此处所使用的术语“浓”表示硅烷偶联剂的溶液，其中所述硅烷偶联剂存在浓度为约0.10％或更高，更优选为约0.2％到约5.0％，最优选为约2.5％。典型地，使用有机溶剂来稀释烷氧基硅烷粘合促进剂。这种溶剂的例子包括丙二醇单甲醚乙酸酯、丙二醇单甲醚乙醇及环己烷。但是，在一些情况下，可使用水作为稀释溶剂。
可采用本领域技术人员所熟知的任何常规手段将硅烷偶联剂涂敷到基板上，所述手段包括但不限于：旋涂、喷涂、浸涂、刷涂、蒸发、溶解、及其它可以在基板上形成基本上均匀的硅烷偶联剂涂层的手段。
根据本发明的下一步骤，在约90℃或更高的温度下，将图1所示的结构加热(即烘烤)约10秒到约300秒，最优选120秒，以得到其上含Si-O键的基板10上的表面层14，参见图2。具体地，表面层形成以下的偶联：
其中X定义如上。
具体地，此加热步骤在约90℃到约200℃的温度下进行约10秒到约300秒。另外，在具有Si-O键的基板表面上形成涂层的此加热步骤通常在惰性气体气氛如Ar、He、N2或其混合物中进行。
在上述的加热步骤后，图2所示的结构经历漂洗步骤，其可有效地从所述结构中去除任何残留的未反应硅烷偶联剂，仅留下其中基板10上具有Si-O涂层14的结构，参见图3。
具体地，使用适当的溶剂来进行本发明的漂洗步骤，所述溶剂例如丙二醇单甲醚乙酸酯(PGMEA)，其能够从所述结构中去除硅烷偶联剂，而不会去除Si-O涂层14的任何实质部分。所述漂洗步骤通常在19-26℃的温度下进行，但可采用最高为约45℃的温度。
在所述漂洗步骤后，可采用与如上所述相同或不同的条件，非必需地进行后烘烤步骤。
接下来，如图4所示，将具有约3.8或更低的介电常数的介电材料16(即低介电常数介电质)形成在基板10的Si-O处理的表面14上。通过采用任何常规的沉积方法将低介电常数介电质形成在基板的Si-O处理的表面上，所述方法包括但不限于：旋涂、化学溶液沉积、化学气相沉积(CVD)、等离子体辅助CVD、蒸发、浸涂，及其它能够在结构上形成低介电常数介电层的类似沉积方法。
可在本发明中使用的合适的低介电常数介电质包括但不限于：聚亚芳基醚、热固性聚亚芳基醚、芳族热固性树脂，例如SiLK(由DowChemical公司提供的半导体介电质)；聚酰亚胺；含硅的聚合物，例如氢倍半硅氧烷及有机倍半硅氧烷；苯并环丁烯；聚降冰片烷(polynorboranes)；聚对亚苯基二甲基共聚物；聚对亚苯基二甲基-F；聚萘；聚四氟萘；聚(八氟-二-苯并环丁烯)；Telfon-AF；氟化非晶碳；干凝胶及纳米多孔二氧化硅。
上述每种低介电常数介电质的说明可参见以下文献，其出版于MRS公告，1997年10月，第22册，第10期，其内容在此引入以为参考：
(i)T-M.Lu等人的“Vapor Deposition of Low-Dielectric-Constant Polymeric Films”，28-31页；
(ii)Nigel P.Hacker的“Organic and Inorganic Spin-OnPolymers for Low-Dielectric-Constant Applications”，33-38页；
(iii)Changming Jin等人的“Nanoporous Silica as anUltralow-k Dielectric”，39-42页；及
(iv)Kazuhiko Endo的“Fluorinated Amorphous Carbon as aLow-Dielectric-Constant Interlayer Dielectric”，55-58页。
在本发明中所使用的一些高度优选的低介电常数介电质包括：甲基倍半硅氧烷(MSSQ)、氢化倍半硅氧烷及SiLK。
上述加工步骤可重复任何次，以提供多层内连结构，其包括基本上无缺陷的，具有良好粘合性及良好电性能的低介电常数材料。
应该注意，上述不同的加工步骤在获得基本上无缺陷的、并具有与之有关的良好粘合性及良好电性能的低介电常数材料中是重要的。如果省略上述加工步骤中的一或多个，所述介电层可能缺乏良好的粘合性，可能具有高程度的缺陷密度，和/或可能具有与之有关的不良电性能。
以下的实施例用来说明使用本发明的方法可得到的一些优点，并显示本发明加工步骤在得到具有良好粘合性及良好电性能的基本上无缺陷的低介电常数材料中的重要性。
                         实施例
实施例1
制备三种粘合促进剂溶液，并评估确定其粘合到含硅基板上的能力(即与基板形成Si-O共价键)。所选择的基板为具有薄(15)天然氧化涂层的8″英寸裸硅片(n-型)。所述三种溶液包含：(1)在丙二醇单甲醚乙醇中的3-氨基丙基三甲氧基硅烷的0.1％溶液，(2)在丙二醇单甲醚乙酸酯(PGMEA)中的乙烯基三乙酰氧基硅烷的1.0％溶液，及(3)在PGMEA中的乙烯基三乙酰氧基硅烷的2.5％溶液。每种溶液含有1摩尔当量的水，部分水解所述烷氧基硅烷(即3摩尔当量将导致完全水解)。
将所述粘合促进剂溶液旋涂在所述8英寸的硅基板上。制备每组有多个晶片的两组晶片，因此表1中的数值表示平均值。第一组晶片接受以下处理流程：旋涂粘合促进剂(旋转到干燥)，测试厚度，在100℃下烘烤60秒，用PGMEA漂洗，重新测试厚度，及评估晶片表面上的水接触角(前进接触角)。第二组晶片接受以下的处理流程：旋涂粘合促进剂(旋转到干燥)，测试厚度，不进行烘烤，用PGMEA漂洗，重新测试厚度，并评估晶片表面上的水接触角(前进接触角)。
所述实验结果列于下表。
表1
  样品方法   旋涂，测试厚度，烘烤，漂洗，重新测试厚度及评估接触角   旋涂，测试厚度，无烘烤，漂洗，重新测试厚度及评估接触角
  3-氨基丙基三甲氧基硅烷的0.1％溶液   初始厚度＝15.7漂洗后厚度＝17.1接触角＝38度   初始厚度＝15.7漂洗后厚度＝3.9接触角＝26度
  乙烯基三乙酰氧基硅烷的1.0％溶液   初始厚度＝37.0最终厚度＝2.1接触角＝65度   初始厚度＝37.0最终厚度＝1.4接触角＝11度
  乙烯基三乙酰氧基硅烷的2.5％溶液   初始厚度＝123最终厚度＝5.1接触角＝65度   初始厚度＝123最终厚度＝1.5接触角＝9度
表1中的结果显示在两个不同浓度下氨基丙基三甲氧基硅烷(APS)粘合促进剂及乙烯基三乙酰氧基硅烷(VTAS)粘合促进剂之间的比较。APS粘合促进剂提供15.7的涂层厚度，由光学探测仪来测量。若所述样品被烘烤及漂洗，整个厚度可保持，但若去除烘烤步骤，主要量被去除。厚度保持表明粘合促进剂是非常活性的。
两种不同浓度下的VTAS(乙烯基三乙酰氧基硅烷)粘合促进剂的分析表明，此体系并不具有相同水平的反应性。粘合促进剂的单分子层的理论厚度为约5。表1中的评估结果表明，可用浓溶液(相对于传统粘合促进剂)、中间烘烤步骤及漂洗获得粘合促进剂的单分子层。去除烘烤步骤造成几乎完全去除粘合促进剂，无论粘合促进剂的浓度如何。且如果所述浓度不足够高(此体系为＞2％)，不能实现粘合促进剂的完全覆盖，不能得到单分子层。
所有以上的粘合促进剂与基板表面的羟基官能团共价结合，改变了晶片表面的表面性能。具有所述天然氧化物层的裸露硅基板的初始水接触角为6度。表1的评估表明，除在VTAS粘合促进剂中不进行烘烤处理的情况下，表面基本上被改变。这表明烘烤在改变晶片表面的表面性能上是重要的。
实施例2
外来杂质(FM)(即颗粒状物质)明显地降低IMD的电性能，特别是在可靠性测试例如时间相关的电介质破裂(TDDB)、线对线泄漏等中。进行试验来确定粘合促进剂对金属间介电(IMD)膜中外来杂质的量的影响。所述SiLK半导体介电质被旋涂在硅基板上，其采用描述在实施例1表1的第二栏中的粘合促进剂工艺来进行。所有的样品皆进行100℃烘烤，但是可进行或不进行PGMEA漂洗处理。其结果示于下表2。
表2
  样品方法   进行PGMEA漂洗的粘合促进剂工艺的SiLK中的FM缺陷数目   不进行PGMEA漂洗的粘合促进剂工艺的SiLK中的FM缺陷数目
  乙烯基三乙酰氧基硅烷的1.0％溶液   FM＜10   FM＞3000
  乙烯基三乙酰氧基硅烷的2.5％溶液   FM＜10   FM＞2800
表2中的结果表明，VTAS粘合促进剂的PGMEA漂洗在降低IMD层(例如SiLK)中的FM缺陷数目上是必要的。
实施例3
使用表1第二栏中所述的三种粘合促进剂，用Dow Chemical公司提供的SiLK半导体介电质来进行粘合试验。进行两个不同的粘合测试；用修正的边缘抬起测试(modified edge lift off test，MELT)来评估断裂强度和90度剥离测试。一次固化处理后以及6次额外的固化处理(T6)后，评估粘合性，以模拟在多层集成结构中多次热固化处理的效果。在所有情况下，SiLK中在385℃下固化。所述结果示于表3。
表3
  样品   K值(MPam-1/2)   K值(MPam-1/2)   剥离强度(g/mm)   剥离强度(g/mm)
  固化时   T6   固化时   T6
  0.1％APS   0.44   0.30   13   7
  1.0％VTAS   0.48   0.39   18   13
  2.5％VTAS   0.56   0.42   24   21
表3中的结果表明，2.5％VTAS粘合促进剂对于一次固化和额外模拟6次固化处理(T6)后的SiLK是优异的。胺基体系的APS粘合促进剂不会与SiLK共价结合，因此具有最差的粘合性能。1.0％VTAS粘合促进剂由于粘合促进剂的不良覆盖而在T6处呈现显著的粘合性降低。
尽管以优选实施方案来具体显示和说明本发明，但本领域技术人员可以理解，可以对前述进行形式及细节上的改变，而不背离本发明的精神及范围。因此，本发明不限于描述及说明的具体形式及细节，而是由所附权利要求书的范围来限定。

Claims (20)

1.一种制造集成电路的方法，其包含至少以下步骤：
(a)将含至少一个可聚合基团的硅烷偶联剂涂敷到基板的表面，以提供在所述基板上所述硅烷偶联剂的基本上均匀的涂层；
(b)在约90-200℃的温度下，在惰性气体气氛下加热含所述硅烷偶联剂的所述涂层的所述基板，以在所述基板上提供含Si-O键的表面层；
(c)用适当的溶剂漂洗所述经加热的基板，所述溶剂可有效地去除任何残余的未反应的硅烷偶联剂；及
(d)将介电材料涂敷到漂洗过的含所述Si-O键的表面上。
2.权利要求1的方法，其中所述基板为含硅基板、导电金属，金属阻隔介电质、或其中形成有金属线及通路的IC的层间介电层。
3.权利要求1的方法，其中所述硅烷偶联剂为任何其中具有至少一个可聚合基团的含硅烷化合物。
4.权利要求3的方法，其中所述硅烷偶联剂为下式的化合物：
其中，X是选自烯烃、乙烯基和炔烃的可聚合基团；R1和R2可相同或不同且可为氢、烷基、烷氧基、烷基酯、链烯基、炔基、芳基、环烷基；R3为烷基或-C(O)R4基，其中R4为烷基；a和b可相同或不同且为0、1或2，y为1-3，前提条件是a+b+y的总和为3。
5.权利要求4的方法，其中所述硅烷偶联剂是烷氧基硅烷。
6.权利要求5的方法，其中所述烷氧基硅烷选自乙烯基三乙酰氧基硅烷、乙烯基三甲氧基硅烷、乙烯基三乙氧基硅烷、烯丙基三甲氧基硅烷、乙烯基二苯基乙氧基硅烷、降冰片烯基三乙氧基硅烷和三乙烯基三乙氧基硅烷。
7.权利要求1的方法，其中所述硅烷偶联剂为乙烯基三乙酰氧基硅烷。
8.权利要求1的方法，其中所述硅烷偶联剂以浓溶液形式施用。
9.权利要求8的方法，其中所述硅烷偶联剂以约0.10％到5.0％浓度的浓溶液形式存在。
10.权利要求9的方法，其中所述硅烷偶联剂以约0.2％到约5.0％的浓度存在。
11.权利要求10的方法，其中所述硅烷偶联剂以2.5％的浓度存在。
12.权利要求1的方法，其中通过旋涂沉积、喷涂、浸涂、刷涂、蒸发或溶解将所述硅烷偶联剂涂敷到基板上。
13.权利要求1的方法，其中步骤(b)进行约10秒到约300秒的时间。
14.权利要求1的方法，其中步骤(c)中所述溶剂为丙二醇单甲醚乙酸酯。
15.权利要求1的方法，其中在步骤(c)后但在步骤(d)前进行非必需的烘烤步骤。
16.权利要求1的方法，其中所述介电材料的介电常数为约3.8或更低。
17.权利要求1的方法，其中步骤(d)包括旋涂、化学溶液沉积、化学气相沉积(CVD)、等离子体辅助CVD、蒸发、和浸涂。
18.权利要求14的方法，其中所述介电材料为聚酰亚胺；含硅聚合物；苯并环丁烯；聚降冰片烷；聚亚芳基醚；热固性聚亚芳基醚；芳族热固性树脂；聚对亚苯基二甲基共聚物；聚对亚苯基二甲基-F；聚萘；聚四氟萘；聚(八氟-二-苯并环丁烯)；Telfon-AF；氟化非晶碳；干凝胶或纳米多孔二氧化硅。
19.权利要求18的方法，其中所述介电材料为甲基倍半硅氧烷(MSSQ)、氢化倍半硅氧烷或SiLK。
20.权利要求1的方法，其中加工步骤(a)-(d)可重复任何次以提供多层内连结构。
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