CN100334695C - 一种含硅低介电常数材料炉子固化工艺 - Google Patents

一种含硅低介电常数材料炉子固化工艺 Download PDF

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CN100334695C
CN100334695C CNB031147038A CN03114703A CN100334695C CN 100334695 C CN100334695 C CN 100334695C CN B031147038 A CNB031147038 A CN B031147038A CN 03114703 A CN03114703 A CN 03114703A CN 100334695 C CN100334695 C CN 100334695C
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silk
technique
dielectric material
low dielectric
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CN1424747A (zh
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缪炳有
徐小诚
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Shanghai IC R&D Center Co Ltd
Shanghai Huahong Group Co Ltd
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Shanghai Huahong Group Co Ltd
Shanghai Integrated Circuit Research and Development Center Co Ltd
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Abstract

本发明属于半导体集成电路制造工艺技术领域，具体涉及到低是电材料Silk炉子固化工艺改进。随着器件尺寸愈来愈小，互连RC延迟对器件开启速度影响愈来愈大。目前人们用铜和低介电材料来减少RC互连延迟。Silk是一种新的低介电材料，它在工艺集成过程中还存在一些问题，如Silk旋涂后的固化工艺。这里我们对原有的固化工艺作了改进：将Silk进出炉子的温度从300℃改为360-440℃，实验证明Silk并未被氧化。改进后的工艺不仅提高了产能，而且节约了电能，降低了成本，很适用于大生产线。

Description

一种含硅低介电常数材料炉子固化工艺
技术领域
本发明属于半导体集成电路制造工艺技术领域，具体涉及到一种含硅低介电常数材料(Silk)炉子固化(Cure)工艺改进。
背景技术
随着IC(集成电路)技术的不断发展，器件尺寸愈来愈小，互连RC延迟对器件开启速度影响愈来愈大，远远超过栅延迟带来的影响，所以减少RC互连延迟成为人们关注的焦点。1997年IC业界开始用电阻率小的Cu代替电阻率大的Al，以减小互连电阻，并应用于0.22μm及以下的工艺(尽管Cu是人们不愿意引入半导体生产工艺的金属之一，主要是怕Cu在硅片和二氧化硅介质中扩散很快，万一沾污会引起器件性能不稳定)；另一方面，人们用低介电材料(k值小于SiO2)来取代传统的SiO2，以减小互连金属间/层电容C，并开始应用于0.18μm及以下技术。一开始人们用掺F的SiO2---FSG(k～3.5，一种改进型SiO2)应用于用0.18μm技术制造的逻辑和存贮器件，如CPU(中央处理器)和DRAM/SRAM(动态随机存储器/静态随机存储器)。而进入0.13μm技术时，人们需要k值更低的材料(k≤3)。目前有两种制备低介电材料的方法---CVD(化学气相淀积)和旋涂法(Spin on)，并都应用于生产线。CVD设备厂商提倡用CVD方法制作的低介电材料，如Applied Materials公司和Novellus公司正在和已开发的SiOC产品；而材料制备厂商则提倡用旋涂法制备低介电材料，如Silk就是Dow Chemical公司研发的产品，其有关特性如下表所示(来自Dowchemical)。如果将Silk和Cu应用于后道互连工艺中，器件的性能较Al/SiO2提高37％。
下表是有关Silk材料的物理和电学特性(来自Dow Chemical)
介电常数k     2.62
漏电流     3.3×10-10A/cm2@1MV/cm
击穿电压     4MV/cm
玻璃转变温度Tg     ＞450℃
热稳定性     ＞425℃
弹性模量(modulus)     2.7Gpa
韧性(toughness)     0.62MPam1/2
应力     45Mpa
吸湿度     0.25％@80％RH，25℃
热导率     0.18W/mK
Silk低介电材料是由美国Dow Corning公司研发的新的旋涂材料，然而在铜单/双大马士革工艺集成中有许多问题需要解决，如Silk k值的变化，硬掩膜的选择，刻蚀停止层的选择，与铜阻挡层的粘附性，对CMP(化学机械抛光)工艺的忍耐程度，刻蚀气体的选择，刻蚀后通孔的清洗等。在Silk(k＝2.7)旋涂后，一般采用炉子来完成固化(Cure)。通常的工艺是：1.在炉子温度为300℃时装入Silk硅片(一般为25～100片)；2.将炉子升温至400℃，并在N2保护下固化30分钟；3.再将炉子降温至300℃时取出硅片，主要是防止Silk氧化。但这样过程花时较长，造成能源浪费，产能很低。
发明内容
本发明的目的在于提出一种可节省能源、提高产能，同时保持K值不变的含硅低介电材料炉子固化工艺。
本发明提出的含硅低介电材料炉子固化工艺，是将装载或卸载硅片的炉子温度控制为360-440℃，将旋涂后的Silk硅片在放入炉子时、固化过程中、到最后取出硅片时温度均控制在360-440℃。
本发明中，上述固化过程中Silk硅片在360-440℃ N2保护下固化24-36分钟。
将装/卸载硅片的炉子温度改为360-440℃，并在同一温度下固化。这样不仅提高了Silk固化的产能，同时还节约了电能。们用ASM A400炉子作了以上实验，其固化结果与原来工艺的效果基本相同，Silk膜并无氧化。
本发明改进提高了工艺产能，效果明显，容易操作，节约电能，很适用于大生产线。
具体实施方式
下面通过实施例具体描述本发明。
1、先将炉温升到400℃，具体升温过程为：0---300℃：10℃/min(分钟)；300---400℃：5℃/min(分钟)，并用N2作保护气体；
2、把旋涂有的Silk硅片缓缓放入400℃的炉子(如ASM A400型炉子)里，同时在400℃ N2保护下固化(Cure)30分钟；
3、最后在400℃下取出Silk硅片。

Claims (2)

1、一种含硅低介电材料炉子固化工艺，其特征在于将装载或卸载硅片的炉子温度控制为360-440℃，将旋涂后的Silk硅片在放入炉子时、固化过程中、到最后取出硅片时温度均控制在360-440℃。
2、根据权利要求1所述的炉子固化工艺，其特征在于上述固化过程中Silk硅片在360-440℃ N2保护下固化24-36分钟。
CNB031147038A 2003-01-02 2003-01-02 一种含硅低介电常数材料炉子固化工艺 Expired - Fee Related CN100334695C (zh)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002016477A2 (en) * 2000-08-21 2002-02-28 Dow Global Technologies Inc. Organosilicate resins as hardmasks for organic polymer dielectrics in fabrication of microelectronic devices
US6372632B1 (en) * 2000-01-24 2002-04-16 Taiwan Semiconductor Manufacturing Company Method to eliminate dishing of copper interconnects by the use of a sacrificial oxide layer
US6455443B1 (en) * 2001-02-21 2002-09-24 International Business Machines Corporation Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density
US6472306B1 (en) * 2000-09-05 2002-10-29 Industrial Technology Research Institute Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymer
US20020187653A1 (en) * 2001-06-12 2002-12-12 Pei-Ren Jeng Method of forming a spin-on-passivation layer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6372632B1 (en) * 2000-01-24 2002-04-16 Taiwan Semiconductor Manufacturing Company Method to eliminate dishing of copper interconnects by the use of a sacrificial oxide layer
WO2002016477A2 (en) * 2000-08-21 2002-02-28 Dow Global Technologies Inc. Organosilicate resins as hardmasks for organic polymer dielectrics in fabrication of microelectronic devices
US6472306B1 (en) * 2000-09-05 2002-10-29 Industrial Technology Research Institute Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymer
US6455443B1 (en) * 2001-02-21 2002-09-24 International Business Machines Corporation Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density
US20020187653A1 (en) * 2001-06-12 2002-12-12 Pei-Ren Jeng Method of forming a spin-on-passivation layer

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