CN1327495C - 一种含硅低介电常数材料的干法刻蚀工艺 - Google Patents

一种含硅低介电常数材料的干法刻蚀工艺 Download PDF

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CN1327495C
CN1327495C CNB031147046A CN03114704A CN1327495C CN 1327495 C CN1327495 C CN 1327495C CN B031147046 A CNB031147046 A CN B031147046A CN 03114704 A CN03114704 A CN 03114704A CN 1327495 C CN1327495 C CN 1327495C
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CN1424748A (zh
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缪炳有
徐小诚
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Shanghai IC R&D Center Co Ltd
Shanghai Huahong Group Co Ltd
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Shanghai Huahong Group Co Ltd
Shanghai Integrated Circuit Research and Development Center Co Ltd
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Abstract

本发明属于半导体集成电路制造工艺技术领域，具体涉及一种低介电材料Z3MS干法刻蚀工艺。随着器件尺寸愈来愈小，互连RC延迟对器件开启速度影响愈来愈大。目前人们用铜和低介电材料来减少RC互连延迟。Z3MS是一种新的低介电材料，因此在工艺集成过程中还需要解决一些相关工艺问题，如刻蚀工艺。Z3MS主要成分为Si、O和C，还有少量的H。本发明选择干法刻蚀气体-Ar/CF4/CHF3/O2，进行反应离子刻蚀，其优点是：刻蚀槽/孔形状好，侧壁直而不弯，底部和开口处的边缘圆滑，硬掩膜下无侧切现象；另外，选择比很高。本发明工艺简单，容易操作，稳定性好，很适用于大生产线。

Description

一种含硅低介电常数材料的干法刻蚀工艺
技术领域
本发明属于半导体集成电路制造工艺技术领域，具体涉及一种含硅低介电常数材料的干法刻蚀工艺。
背景技术
随着IC技术的不断发展，器件尺寸愈来愈小，互连RC延迟对器件开启速度影响愈来愈大，远远超过栅延迟带来的影响，所以减少RC互连延迟成为人们关注的焦点。1997年IC业界开始用电阻率小的Cu代替电阻率大的Al，以减小互连电阻，并应用于0.22μm及以下的工艺(尽管Cu是人们不愿意引入半导体生产工艺的金属之一，主要是担心Cu在硅片和二氧化硅介质中扩散很快，万一沾污会引起器件性能不稳定)；另一方面，人们用低介电材料(k值小于SiO2)来取代传统的SiO2，以减小互连金属间/层电容C，并开始应用于0.18μm及以下技术。一开始人们用掺F的SiO2——FSG(k～3.5，一种改进型SiO2)应用于用0.18μm技术制造的逻辑和存贮器件，如CPU和DRAM/SRAM。而进入0.13μm技术时，人们需要k值更低的材料(k≤3)。目前有两种制备低介电材料的方法---旋涂法(Spin on)和CVD方法，并都应用于生产线。材料制备厂商提倡用旋涂法制备低介电材料，如Silk(k＝2.7，Dow Chemical公司)，OCDT-12(k＝2.7～2.9，日本TOK公司)，FLARE 2.0(k＝2.8，AlliedSignal公司)，Porous Flare和Nanoglass(k＜2.5，Honeywell公司)；CVD设备厂商提倡用CVD方法制作的低介电材料，如Black DiamondI/II(k＝2-3，Applied Materials公司)，SiOC产品(k＝2.5-3.0，Novellus公司)；Z3MS(k～2.7，Dow Corning公司)。如果将Z3MS和Cu应用于后道互连工艺中，器件的性能较Al/SiO2提高37％。
低介电材料Z3MS是Dow Corning公司研发的新产品，其主要成分为Si、O和C，还有少量的H。虽然其结构与SiO2的有相似之处，但不能用标准SiO2的刻蚀气体Ar/C4F8/N2/O2，不然会在槽/孔底部出现W型图形---底部中间Z3MS未刻蚀干净。有关Z3MS低介电材料的集成还存在许多问题，目前正处在研发和试生产过程中。
发明内容
本发明的目的在于提出一种低介电材料刻蚀新工艺，以解决Z3MS低介电材料在刻蚀中所存在的问题。
本发明提出的低介电材料刻蚀工艺，是针对Z3MS材料刻蚀的，选择采用Ar/CF4/CHF3/O2干法刻蚀气体。具体过程为：将要刻蚀的Z3MS材料(比如单大马士革堆层为：50nmSiC/500nm Z3MS/50nm SiC/150nm SiO2)放入刻蚀设备(比如LAM 9100刻蚀机)；用Ar/CF4/CHF3/O2干法刻蚀气体进行刻蚀；然后移向下一步工艺---底部SiC层的刻蚀。
Z3MS干法刻蚀过程中时间为40-50s(主刻蚀)及16-24s(过刻蚀)；Z3MS干法刻蚀过程中Ar的流量为400-600sccm(主刻蚀)；180-280sccm(过刻蚀)；CF4的流量为40-60sccm(主刻蚀)；8-12sccm(过刻蚀)；
CHF3的流量为16-24sccm(主刻蚀)及8-12sccm(过刻蚀)；O2的流量为5-8sccm(主刻蚀)及2-4sccm(过刻蚀)；RF(27MHz/上限)的功率为1000-1200W(主刻蚀)及800-1000W(过刻蚀)；RF(2MHz/下限)的功率为450-550W(主刻蚀)及2000-2400W(过刻蚀)；Z3MS干法刻蚀过程中气压为160-190mTorr(主刻蚀)及50-80mTorr(过刻蚀)。
采用该气体进行反应离子刻蚀，其优点是：刻蚀槽/孔形状好，侧壁直而不弯，底部和开口处的边缘圆滑，硬掩膜下无侧切现象；另外，选择比很高(Z3MS/SiO2＝3.5∶1；Z3MS/光刻胶＝5.5∶1；Z3MS/SiC＝6∶1)。
具体实施方式
以LAM 4520XL刻蚀机为例加以说明
1、将要刻蚀的Z3MS材料(比如单大马士革堆层为：50nm SiC/500nm Z3MS/50nmSiC/150nm SiO2)放入刻蚀设备(比如LAM 4520XL刻蚀机)；在此之前，硬掩膜(50nmSiC/150nm SiO2)和光刻胶已刻蚀完毕。
2、用Ar/CF4/CHF3/O2气体干法刻蚀Z3MS，其主要参数如下表：
  参数 主刻蚀(main etch) 过刻蚀(overetch)
  气压(mTorr)   175   70
  RF(27 MHz/上限)(W)   1100   900
  RF(2MHz/下限)(W)   500   2200
  Ar(sccm)   500   230
  O2(sccm)   6   3
  CF4(sccm)   50   10
  CHF3(sccm)   20   10
  时间(sccm)   45   20
本发明工艺简单，容易操作，稳定性好，适用于大生产工艺线。

Claims (1)

1、一种含硅低介电材料的干法刻蚀工艺，其特征在于：采用Ar/CF4/CHF3/O2干法刻蚀气体，具体过程为：将要刻蚀的Z3MS硅片放入刻蚀设备；用Ar/CF4/CHF3/O2干法刻蚀气体进行刻蚀；然后移向下一步工艺---底部SiC层的刻蚀；具体条件为：
刻蚀过程中，主刻蚀时间为40-50s，过刻蚀时间为16-24s；Ar的流量为主刻蚀400-600sccm，过刻蚀180-280sccm；CF4的流量为主刻蚀40-60sccm，过刻蚀8-12sccm；CHF3的流量为主刻蚀16-24sccm，过刻蚀8-12sccm；O2的流量为主刻蚀5-8sccm，过刻蚀2-4sccm；上限为27MHz的射频的功率为主刻蚀1000-1200W，过刻蚀800-1000W；下限为2MHz的射频的功率为主刻蚀450-550W，过刻蚀2000-2400W；气压为主刻蚀160-190mTorr，过刻蚀50-80mTorr。
CNB031147046A 2003-01-02 2003-01-02 一种含硅低介电常数材料的干法刻蚀工艺 Expired - Fee Related CN1327495C (zh)

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US7256134B2 (en) * 2003-08-01 2007-08-14 Applied Materials, Inc. Selective etching of carbon-doped low-k dielectrics
JP2010103462A (ja) * 2008-09-25 2010-05-06 Sekisui Chem Co Ltd シリコン含有膜のエッチング方法および装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6069091A (en) * 1997-12-29 2000-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method
US20020110992A1 (en) * 2001-02-12 2002-08-15 Lam Research Corporation Use of hydrocarbon addition for the elimination of micromasking during etching
US20020182880A1 (en) * 2001-03-30 2002-12-05 Zhu Helen H. Method of plasma etching silicon nitride

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6069091A (en) * 1997-12-29 2000-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method
US20020110992A1 (en) * 2001-02-12 2002-08-15 Lam Research Corporation Use of hydrocarbon addition for the elimination of micromasking during etching
US20020182880A1 (en) * 2001-03-30 2002-12-05 Zhu Helen H. Method of plasma etching silicon nitride

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
OPTIMIZATION OF ETCHING AND STRIPPING CHEMISTRIES FOR Z3MS LOW-K M LEPACE D SHAMIRYAN M BAKLANOY ET AL,INTERCONNECT TECHNOLOGY EONFERENCE PROCEEDING OF THE IEEE 2001 2001 *
OPTIMIZATION OF ETCHING AND STRIPPING CHEMISTRIES FOR Z3MS LOW-K M LEPACE D SHAMIRYAN M BAKLANOY ET AL,INTERCONNECT TECHNOLOGY EONFERENCE PROCEEDING OF THE IEEE 2001 2001;Optimization of etching and stripping chemistries for Z3MSLow-K M. Lepage,D. Shamiryan,M. Baklanov,et al.,Interconnect technology conference,proceeding of the IEEE 2001 2001 *
Optimization of etching and stripping chemistries for Z3MSLow-K M. Lepage,D. Shamiryan,M. Baklanov,et al.,Interconnect technology conference,proceeding of the IEEE 2001 2001 *

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