DE60026331D1 - Leiterplatte, halbleiter und herstellung, test und gehäusung desselben und systemplatte und elektronikgerät - Google Patents

Leiterplatte, halbleiter und herstellung, test und gehäusung desselben und systemplatte und elektronikgerät

Info

Publication number
DE60026331D1
DE60026331D1 DE60026331T DE60026331T DE60026331D1 DE 60026331 D1 DE60026331 D1 DE 60026331D1 DE 60026331 T DE60026331 T DE 60026331T DE 60026331 T DE60026331 T DE 60026331T DE 60026331 D1 DE60026331 D1 DE 60026331D1
Authority
DE
Germany
Prior art keywords
pcb
semiconductor
manufacture
test
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60026331T
Other languages
English (en)
Other versions
DE60026331T2 (de
DE60026331T8 (de
Inventor
Nobuaki Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of DE60026331D1 publication Critical patent/DE60026331D1/de
Publication of DE60026331T2 publication Critical patent/DE60026331T2/de
Application granted granted Critical
Publication of DE60026331T8 publication Critical patent/DE60026331T8/de
Active legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
DE60026331T 1999-10-01 2000-09-29 Leiterplatte, halbleiter und herstellung, test und gehäuse derselben und systemplatte und elektronikgerät Active DE60026331T8 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP28142499 1999-10-01
JP28142499 1999-10-01
PCT/JP2000/006824 WO2001026432A1 (en) 1999-10-01 2000-09-29 Wiring board, semiconductor device and method of producing, testing and packaging the same, and circuit board and electronic equipment

Publications (3)

Publication Number Publication Date
DE60026331D1 true DE60026331D1 (de) 2006-04-27
DE60026331T2 DE60026331T2 (de) 2006-10-12
DE60026331T8 DE60026331T8 (de) 2007-02-01

Family

ID=17638979

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60026331T Active DE60026331T8 (de) 1999-10-01 2000-09-29 Leiterplatte, halbleiter und herstellung, test und gehäuse derselben und systemplatte und elektronikgerät

Country Status (7)

Country Link
US (2) US6867496B1 (de)
EP (1) EP1156705B1 (de)
KR (2) KR100472334B1 (de)
CN (1) CN1230046C (de)
DE (1) DE60026331T8 (de)
TW (1) TW494503B (de)
WO (1) WO2001026432A1 (de)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7115986B2 (en) * 2001-05-02 2006-10-03 Micron Technology, Inc. Flexible ball grid array chip scale packages
US7026708B2 (en) * 2001-10-26 2006-04-11 Staktek Group L.P. Low profile chip scale stacking system and method
US20060255446A1 (en) * 2001-10-26 2006-11-16 Staktek Group, L.P. Stacked modules and method
US6940729B2 (en) * 2001-10-26 2005-09-06 Staktek Group L.P. Integrated circuit stacking system and method
US6914324B2 (en) * 2001-10-26 2005-07-05 Staktek Group L.P. Memory expansion and chip scale stacking system and method
US20030234443A1 (en) * 2001-10-26 2003-12-25 Staktek Group, L.P. Low profile stacking system and method
US7371609B2 (en) * 2001-10-26 2008-05-13 Staktek Group L.P. Stacked module systems and methods
US20040195666A1 (en) * 2001-10-26 2004-10-07 Julian Partridge Stacked module systems and methods
US7485951B2 (en) * 2001-10-26 2009-02-03 Entorian Technologies, Lp Modularized die stacking system and method
US7656678B2 (en) * 2001-10-26 2010-02-02 Entorian Technologies, Lp Stacked module systems
US20050009234A1 (en) * 2001-10-26 2005-01-13 Staktek Group, L.P. Stacked module systems and methods for CSP packages
SG111935A1 (en) * 2002-03-04 2005-06-29 Micron Technology Inc Interposer configured to reduce the profiles of semiconductor device assemblies and packages including the same and methods
SG121707A1 (en) * 2002-03-04 2006-05-26 Micron Technology Inc Method and apparatus for flip-chip packaging providing testing capability
US7327022B2 (en) * 2002-12-30 2008-02-05 General Electric Company Assembly, contact and coupling interconnection for optoelectronics
US7239024B2 (en) * 2003-04-04 2007-07-03 Thomas Joel Massingill Semiconductor package with recess for die
JP3800335B2 (ja) * 2003-04-16 2006-07-26 セイコーエプソン株式会社 光デバイス、光モジュール、半導体装置及び電子機器
KR100546364B1 (ko) * 2003-08-13 2006-01-26 삼성전자주식회사 유연성 필름을 이용한 반도체 패키지 및 그 제조방법
JP4425217B2 (ja) * 2003-09-30 2010-03-03 インターナショナル・ビジネス・マシーンズ・コーポレーション 可撓性の重ねられたチップ・アセンブリとその形成方法
JP4536430B2 (ja) * 2004-06-10 2010-09-01 イビデン株式会社 フレックスリジッド配線板
US7714931B2 (en) * 2004-06-25 2010-05-11 Flextronics International Usa, Inc. System and method for mounting an image capture device on a flexible substrate
US20060043558A1 (en) * 2004-09-01 2006-03-02 Staktek Group L.P. Stacked integrated circuit cascade signaling system and method
US7033861B1 (en) * 2005-05-18 2006-04-25 Staktek Group L.P. Stacked module systems and method
DE102005032740B3 (de) * 2005-07-08 2006-09-28 Siemens Ag Verfahren zum Herstellen einer mikroelektronischen Anordnung
US7767543B2 (en) 2005-09-06 2010-08-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a micro-electro-mechanical device with a folded substrate
US7888185B2 (en) * 2006-08-17 2011-02-15 Micron Technology, Inc. Semiconductor device assemblies and systems including at least one conductive pathway extending around a side of at least one semiconductor device
US7417310B2 (en) * 2006-11-02 2008-08-26 Entorian Technologies, Lp Circuit module having force resistant construction
EP1961686B1 (de) 2007-02-20 2016-09-14 Iro Ab System zur Überwachung und Einstellung einer Garnspannung
CA2685080A1 (en) * 2007-04-24 2008-11-06 Flextronics Ap Llc Small form factor modules using wafer level optics with bottom cavity and flip-chip assembly
US20090015706A1 (en) * 2007-04-24 2009-01-15 Harpuneet Singh Auto focus/zoom modules using wafer level optics
JP4670855B2 (ja) * 2007-11-08 2011-04-13 セイコーエプソン株式会社 表示装置および時計
US8022538B2 (en) * 2008-11-17 2011-09-20 Stats Chippac Ltd. Base package system for integrated circuit package stacking and method of manufacture thereof
TWI415227B (zh) * 2009-01-06 2013-11-11 Raydium Semiconductor Corp 晶片封裝結構以及導線架構
JP2010225943A (ja) * 2009-03-24 2010-10-07 Toshiba Corp 半導体装置
CN102802506A (zh) * 2009-04-15 2012-11-28 亚利桑特保健公司 深部组织温度探测器结构
US8248523B2 (en) * 2009-11-05 2012-08-21 Flextronics Ap, Llc Camera module with fold over flexible circuit and cavity substrate
US8545114B2 (en) 2011-03-11 2013-10-01 Digitaloptics Corporation Auto focus-zoom actuator or camera module contamination reduction feature with integrated protective membrane
GB201104897D0 (en) 2011-03-23 2011-05-04 Immunobiology Ltd Method for the production of protein complexes and vaccine compositions comprising the same
JP2013160942A (ja) * 2012-02-06 2013-08-19 Sony Corp 半導体装置およびその製造方法、並びに電子機器
US9001268B2 (en) 2012-08-10 2015-04-07 Nan Chang O-Film Optoelectronics Technology Ltd Auto-focus camera module with flexible printed circuit extension
US9007520B2 (en) 2012-08-10 2015-04-14 Nanchang O-Film Optoelectronics Technology Ltd Camera module with EMI shield
KR102281568B1 (ko) 2013-04-15 2021-07-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 발광 장치
JP6318556B2 (ja) * 2013-11-11 2018-05-09 セイコーエプソン株式会社 パッケージの製造方法および電子デバイスの製造方法
CN104981102B (zh) * 2014-04-10 2018-09-18 广东丹邦科技有限公司 一种多芯片嵌入式的柔性电路板及其制造方法
US9831281B2 (en) 2015-05-01 2017-11-28 Sensors Unlimited, Inc. Electrical interconnects for photodiode arrays and readout interface circuits in focal plane array assemblies
CN105578717B (zh) * 2015-12-29 2018-07-06 广东欧珀移动通信有限公司 柔性电路板及终端
CN114342096A (zh) * 2019-08-27 2022-04-12 京瓷株式会社 电子装置
JP7265974B2 (ja) * 2019-11-14 2023-04-27 新光電気工業株式会社 電子機器

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52135066A (en) 1976-05-08 1977-11-11 Alps Electric Co Ltd Method of producing printed substrate
JPS58153470U (ja) 1982-04-08 1983-10-14 パイオニア株式会社 割りプリント基板
JPH0780292B2 (ja) 1986-02-17 1995-08-30 富士通株式会社 位置決め機構
JPS62260353A (ja) 1986-05-06 1987-11-12 Mitsubishi Electric Corp 半導体装置
JPH0160543U (de) * 1987-10-13 1989-04-17
US5202045A (en) * 1989-01-05 1993-04-13 Lever Brothers Company, Division Of Conopco, Inc. S-shaped detergent laminate
KR910010119B1 (ko) 1989-03-30 1991-12-16 삼성전자 주식회사 영상신호 엔코딩용 색부반송파 파형정형회로
US5484292A (en) * 1989-08-21 1996-01-16 Mctaggart; Stephen I. Apparatus for combining audio and visual indicia
US5182632A (en) * 1989-11-22 1993-01-26 Tactical Fabs, Inc. High density multichip package with interconnect structure and heatsink
JPH03245591A (ja) * 1990-02-23 1991-11-01 Nec Corp Ｌｓｉモジュール
US5157255A (en) * 1990-04-05 1992-10-20 General Electric Company Compact, thermally efficient focal plane array and testing and repair thereof
US5200810A (en) * 1990-04-05 1993-04-06 General Electric Company High density interconnect structure with top mounted components
US5345205A (en) * 1990-04-05 1994-09-06 General Electric Company Compact high density interconnected microwave system
JPH04150055A (ja) * 1990-10-15 1992-05-22 Seiko Epson Corp 半導体パッケージ
US5117282A (en) * 1990-10-29 1992-05-26 Harris Corporation Stacked configuration for integrated circuit devices
JPH05144998A (ja) 1991-11-21 1993-06-11 Seiko Epson Corp 半導体パツケージ
JP2545422Y2 (ja) 1991-12-20 1997-08-25 株式会社ケンウッド プリント基板接続構造
US5224023A (en) * 1992-02-10 1993-06-29 Smith Gary W Foldable electronic assembly module
US5247423A (en) 1992-05-26 1993-09-21 Motorola, Inc. Stacking three dimensional leadless multi-chip module and method for making the same
US5436744A (en) * 1993-09-03 1995-07-25 Motorola Inc. Flexible liquid crystal display with integrated driver circuit and display electrodes formed on opposite sides of folded substrate
US5448511A (en) * 1994-06-01 1995-09-05 Storage Technology Corporation Memory stack with an integrated interconnect and mounting structure
US5646068A (en) * 1995-02-03 1997-07-08 Texas Instruments Incorporated Solder bump transfer for microelectronics packaging and assembly
US5623160A (en) * 1995-09-14 1997-04-22 Liberkowski; Janusz B. Signal-routing or interconnect substrate, structure and apparatus
US5646446A (en) * 1995-12-22 1997-07-08 Fairchild Space And Defense Corporation Three-dimensional flexible assembly of integrated circuits
US5747858A (en) * 1996-09-30 1998-05-05 Motorola, Inc. Electronic component having an interconnect substrate adjacent to a side surface of a device substrate
US6225688B1 (en) * 1997-12-11 2001-05-01 Tessera, Inc. Stacked microelectronic assembly and method therefor
US6121676A (en) * 1996-12-13 2000-09-19 Tessera, Inc. Stacked microelectronic assembly and method therefor
JPH10256788A (ja) 1997-03-11 1998-09-25 Morikawa Sangyo Kk 電子部品取付け装置
US6057594A (en) * 1997-04-23 2000-05-02 Lsi Logic Corporation High power dissipating tape ball grid array package
US6084778A (en) * 1997-04-29 2000-07-04 Texas Instruments Incorporated Three dimensional assembly using flexible wiring board
JP3490601B2 (ja) 1997-05-19 2004-01-26 日東電工株式会社 フィルムキャリアおよびそれを用いた積層型実装体
US6208521B1 (en) * 1997-05-19 2001-03-27 Nitto Denko Corporation Film carrier and laminate type mounting structure using same
CH689502A5 (fr) * 1997-05-30 1999-05-14 Valtronic S A Module électronique miniaturisé
US6069026A (en) * 1997-08-18 2000-05-30 Texas Instruments Incorporated Semiconductor device and method of fabrication
JPH1169241A (ja) 1997-08-26 1999-03-09 Sanyo Electric Co Ltd 固体撮像装置およびその製造方法
US6121678A (en) * 1997-12-19 2000-09-19 Stmicroelectronics, Inc. Wrap-around interconnect for fine pitch ball grid array
US6028365A (en) * 1998-03-30 2000-02-22 Micron Technology, Inc. Integrated circuit package and method of fabrication
US5854507A (en) 1998-07-21 1998-12-29 Hewlett-Packard Company Multiple chip assembly
GB2341272B (en) 1998-09-03 2003-08-20 Ericsson Telefon Ab L M High voltage shield
US6486544B1 (en) 1998-09-09 2002-11-26 Seiko Epson Corporation Semiconductor device and method manufacturing the same, circuit board, and electronic instrument
US6376352B1 (en) * 1998-11-05 2002-04-23 Texas Instruments Incorporated Stud-cone bump for probe tips used in known good die carriers

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US7009293B2 (en) 2006-03-07
US20050040510A1 (en) 2005-02-24
KR20040017354A (ko) 2004-02-26
EP1156705A4 (de) 2003-04-23
TW494503B (en) 2002-07-11
EP1156705A1 (de) 2001-11-21
DE60026331T2 (de) 2006-10-12
KR20010101099A (ko) 2001-11-14
KR100530911B1 (ko) 2005-11-23
CN1339243A (zh) 2002-03-06
US6867496B1 (en) 2005-03-15
EP1156705B1 (de) 2006-03-01
DE60026331T8 (de) 2007-02-01
CN1230046C (zh) 2005-11-30
KR100472334B1 (ko) 2005-03-14
WO2001026432A1 (en) 2001-04-12

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