DE60214492D1 - Halbleiter integrierte Schaltungsvorrichtung und Vorrichtung zu ihrer Prüfung - Google Patents

Halbleiter integrierte Schaltungsvorrichtung und Vorrichtung zu ihrer Prüfung

Info

Publication number
DE60214492D1
DE60214492D1 DE60214492T DE60214492T DE60214492D1 DE 60214492 D1 DE60214492 D1 DE 60214492D1 DE 60214492 T DE60214492 T DE 60214492T DE 60214492 T DE60214492 T DE 60214492T DE 60214492 D1 DE60214492 D1 DE 60214492D1
Authority
DE
Germany
Prior art keywords
testing
integrated circuit
semiconductor integrated
circuit device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60214492T
Other languages
English (en)
Other versions
DE60214492T2 (de
Inventor
Hideharu Ozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Publication of DE60214492D1 publication Critical patent/DE60214492D1/de
Application granted granted Critical
Publication of DE60214492T2 publication Critical patent/DE60214492T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31926Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318552Clock circuits details
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE60214492T 2001-07-30 2002-07-29 Integrierte Halbleiterschaltungsvorrichtung und Vorrichtung zur Prüfung derselben Expired - Lifetime DE60214492T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001229629A JP2003043109A (ja) 2001-07-30 2001-07-30 半導体集積回路装置及びその試験装置
JP2001229629 2001-07-30

Publications (2)

Publication Number Publication Date
DE60214492D1 true DE60214492D1 (de) 2006-10-19
DE60214492T2 DE60214492T2 (de) 2007-05-31

Family

ID=19061952

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60214492T Expired - Lifetime DE60214492T2 (de) 2001-07-30 2002-07-29 Integrierte Halbleiterschaltungsvorrichtung und Vorrichtung zur Prüfung derselben

Country Status (4)

Country Link
US (1) US7131041B2 (de)
EP (1) EP1293791B1 (de)
JP (1) JP2003043109A (de)
DE (1) DE60214492T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7308625B1 (en) 2003-06-03 2007-12-11 Nxp B.V. Delay-fault testing method, related system and circuit
KR20060019565A (ko) * 2003-06-03 2006-03-03 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 지연 결함 테스트 방법, 지연 결함 테스트 시스템 및 지연결함 회로 테스터에 사용되는 회로 칩
GB0330076D0 (en) * 2003-12-27 2004-02-04 Koninkl Philips Electronics Nv Delay fault test circuitry and related method
JP2006038743A (ja) * 2004-07-29 2006-02-09 Nec Electronics Corp 半導体集積回路装置及びその試験装置
TWI243538B (en) * 2004-07-30 2005-11-11 Realtek Semiconductor Corp Apparatus for generating testing signals
WO2006041052A1 (ja) * 2004-10-13 2006-04-20 International Business Machines Corporation マイクロコンピュータ及びそのlssdスキャンテスト方法
DE602004023888D1 (de) 2004-12-13 2009-12-10 Infineon Technologies Ag Schaltung und verfahren für bei geschwindigkeit durchgeführten scan-test
JP2006170894A (ja) * 2004-12-17 2006-06-29 Nec Electronics Corp 半導体装置およびクロック生成装置
US7202656B1 (en) * 2005-02-18 2007-04-10 Lsi Logic Corporation Methods and structure for improved high-speed TDF testing using on-chip PLL
WO2006123204A1 (en) * 2005-05-19 2006-11-23 Freescale Semiconductor, Inc. Method and device for high speed testing of an integrated circuit
JP2007225414A (ja) * 2006-02-23 2007-09-06 Yokogawa Electric Corp 半導体デバイスの検査方法及び検査装置
JP5104873B2 (ja) 2007-10-19 2012-12-19 富士通株式会社 半導体集積回路装置の動作周波数決定装置および決定方法ならびに決定プログラム
JP2011149775A (ja) * 2010-01-20 2011-08-04 Renesas Electronics Corp 半導体集積回路及びコアテスト回路

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368878A (ja) * 1989-08-09 1991-03-25 Fujitsu Ltd 半導体集積回路装置
JPH04128661A (ja) * 1990-09-19 1992-04-30 Fujitsu Ltd 線路ディレイ試験装置
US5524114A (en) * 1993-10-22 1996-06-04 Lsi Logic Corporation Method and apparatus for testing semiconductor devices at speed
JPH07128405A (ja) * 1993-10-29 1995-05-19 Hitachi Ltd Lsiテストボード
US5519715A (en) 1995-01-27 1996-05-21 Sun Microsystems, Inc. Full-speed microprocessor testing employing boundary scan
JPH08201481A (ja) * 1995-01-27 1996-08-09 Internatl Business Mach Corp <Ibm> 半導体集積回路
US5614838A (en) * 1995-11-03 1997-03-25 International Business Machines Corporation Reduced power apparatus and method for testing high speed components
JP3291198B2 (ja) 1996-05-08 2002-06-10 富士通株式会社 半導体集積回路
JPH10320371A (ja) * 1997-05-21 1998-12-04 Sony Corp 制御プロセッサ
JP3058130B2 (ja) * 1997-08-06 2000-07-04 日本電気株式会社 高速半導体集積回路装置のテスト回路
US5794175A (en) * 1997-09-09 1998-08-11 Teradyne, Inc. Low cost, highly parallel memory tester
JP2000131397A (ja) * 1998-10-29 2000-05-12 Ando Electric Co Ltd Icテスタ
JP3179429B2 (ja) * 1999-01-29 2001-06-25 日本電気アイシーマイコンシステム株式会社 周波数測定用テスト回路及びそれを備えた半導体集積回路
JP2000304816A (ja) * 1999-04-19 2000-11-02 Hitachi Ltd 診断機能付き論理集積回路および論理集積回路の診断方法

Also Published As

Publication number Publication date
EP1293791A2 (de) 2003-03-19
US7131041B2 (en) 2006-10-31
US20030020451A1 (en) 2003-01-30
DE60214492T2 (de) 2007-05-31
EP1293791A3 (de) 2004-02-04
EP1293791B1 (de) 2006-09-06
JP2003043109A (ja) 2003-02-13

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