DE3766393D1 - Datenleseschaltung zum gebrauch in halbleiterspeichereinrichtungen. - Google Patents

Datenleseschaltung zum gebrauch in halbleiterspeichereinrichtungen.

Info

Publication number
DE3766393D1
DE3766393D1 DE8787400136T DE3766393T DE3766393D1 DE 3766393 D1 DE3766393 D1 DE 3766393D1 DE 8787400136 T DE8787400136 T DE 8787400136T DE 3766393 T DE3766393 T DE 3766393T DE 3766393 D1 DE3766393 D1 DE 3766393D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory devices
data reading
reading circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787400136T
Other languages
English (en)
Inventor
Masanobu Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3766393D1 publication Critical patent/DE3766393D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
DE8787400136T 1986-01-21 1987-01-20 Datenleseschaltung zum gebrauch in halbleiterspeichereinrichtungen. Expired - Fee Related DE3766393D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61008962A JPS62170097A (ja) 1986-01-21 1986-01-21 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3766393D1 true DE3766393D1 (de) 1991-01-10

Family

ID=11707295

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787400136T Expired - Fee Related DE3766393D1 (de) 1986-01-21 1987-01-20 Datenleseschaltung zum gebrauch in halbleiterspeichereinrichtungen.

Country Status (5)

Country Link
US (1) US4926379A (de)
EP (1) EP0238366B1 (de)
JP (1) JPS62170097A (de)
KR (1) KR910000138B1 (de)
DE (1) DE3766393D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01271996A (ja) * 1988-04-22 1989-10-31 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US4964083A (en) * 1989-04-27 1990-10-16 Motorola, Inc. Non-address transition detection memory with improved access time
KR920006980B1 (ko) * 1989-11-28 1992-08-22 현대전자산업주식회사 이중 파워라인을 갖는 다이나믹램의 센스증폭기
KR920000409B1 (ko) * 1989-11-30 1992-01-13 현대전자산업 주식회사 다이나믹램의 분리회로
JPH03288399A (ja) * 1990-04-04 1991-12-18 Mitsubishi Electric Corp 半導体記憶装置
JP2991479B2 (ja) * 1990-11-16 1999-12-20 富士通株式会社 半導体集積回路及び半導体記憶装置
KR100825788B1 (ko) * 2006-10-31 2008-04-28 삼성전자주식회사 메모리 셀 센싱 이전에 비트라인의 프리차아지 전압 레벨을유지할 수 있는 플래쉬 메모리 장치의 센스 앰프 회로 및플래쉬 메모리 셀 센싱 방법

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE219615C (de) *
US3648071A (en) * 1970-02-04 1972-03-07 Nat Semiconductor Corp High-speed mos sense amplifier
US3932848A (en) * 1975-01-20 1976-01-13 Intel Corporation Feedback circuit for allowing rapid charging and discharging of a sense node in a static memory
JPS6019600B2 (ja) * 1978-06-23 1985-05-16 株式会社東芝 半導体メモリ−
JPS5824874B2 (ja) * 1979-02-07 1983-05-24 富士通株式会社 センス回路
JPS5623337A (en) * 1979-08-03 1981-03-05 Honda Motor Co Ltd Manufacture of outer wheel for uniform speed universal joint
DE2932605C2 (de) * 1979-08-10 1982-12-16 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung mit MOS-Transistoren zum raschen Bewerten des logischen Zustandes eines Abtastknotens
JPS5694589A (en) * 1979-12-27 1981-07-31 Nec Corp Memory device
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
JPS5758299A (en) * 1980-09-22 1982-04-07 Nippon Telegr & Teleph Corp <Ntt> Read only memory circuit
JPS5963094A (ja) * 1982-10-04 1984-04-10 Fujitsu Ltd メモリ装置
US4563599A (en) * 1983-03-28 1986-01-07 Motorola, Inc. Circuit for address transition detection
JPS6063786A (ja) * 1983-09-17 1985-04-12 Fujitsu Ltd センスアンプ
DD219615A1 (de) * 1983-12-01 1985-03-06 Mikroelektronik Zt Forsch Tech Asymmetrische schreib-lese-schaltung
JPS60224197A (ja) * 1984-04-20 1985-11-08 Hitachi Ltd 記憶素子回路およびそれを用いたマイクロコンピュータ
US4633102A (en) * 1984-07-09 1986-12-30 Texas Instruments Incorporated High speed address transition detector circuit for dynamic read/write memory
JPS61104394A (ja) * 1984-10-22 1986-05-22 Mitsubishi Electric Corp 半導体記憶装置
JPS621191A (ja) * 1985-03-11 1987-01-07 Nec Ic Microcomput Syst Ltd 信号出力回路
JPS61237292A (ja) * 1985-04-15 1986-10-22 Hitachi Micro Comput Eng Ltd 半導体記憶装置
JPS6220195A (ja) * 1985-07-19 1987-01-28 Fujitsu Ltd メモリ回路
US4751680A (en) * 1986-03-03 1988-06-14 Motorola, Inc. Bit line equalization in a memory
US4707623A (en) * 1986-07-29 1987-11-17 Rca Corporation CMOS input level shifting buffer circuit
US4728820A (en) * 1986-08-28 1988-03-01 Harris Corporation Logic state transition detection circuit for CMOS devices

Also Published As

Publication number Publication date
EP0238366A1 (de) 1987-09-23
JPS62170097A (ja) 1987-07-27
KR910000138B1 (ko) 1991-01-21
EP0238366B1 (de) 1990-11-28
US4926379A (en) 1990-05-15
KR870007511A (ko) 1987-08-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee