DE3326943C2 - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
DE3326943C2
DE3326943C2 DE3326943A DE3326943A DE3326943C2 DE 3326943 C2 DE3326943 C2 DE 3326943C2 DE 3326943 A DE3326943 A DE 3326943A DE 3326943 A DE3326943 A DE 3326943A DE 3326943 C2 DE3326943 C2 DE 3326943C2
Authority
DE
Germany
Prior art keywords
memory
arrangement according
bit
semiconductor
memory blocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3326943A
Other languages
German (de)
English (en)
Other versions
DE3326943A1 (de
Inventor
Tsuneo Kokubunji Kinoshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of DE3326943A1 publication Critical patent/DE3326943A1/de
Application granted granted Critical
Publication of DE3326943C2 publication Critical patent/DE3326943C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE3326943A 1982-07-26 1983-07-26 Halbleiteranordnung Expired DE3326943C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57129806A JPS5919367A (ja) 1982-07-26 1982-07-26 メモリ付ゲ−トアレイ

Publications (2)

Publication Number Publication Date
DE3326943A1 DE3326943A1 (de) 1984-02-02
DE3326943C2 true DE3326943C2 (de) 1986-02-13

Family

ID=15018678

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3326943A Expired DE3326943C2 (de) 1982-07-26 1983-07-26 Halbleiteranordnung

Country Status (3)

Country Link
US (1) US4675849A (en, 2012)
JP (1) JPS5919367A (en, 2012)
DE (1) DE3326943C2 (en, 2012)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5924491A (ja) * 1982-07-30 1984-02-08 Hitachi Ltd 半導体記憶装置の構成方法
EP0162934B1 (de) * 1984-05-14 1989-11-08 Ibm Deutschland Gmbh Halbleiterspeicher
JPH0770692B2 (ja) * 1984-05-31 1995-07-31 富士通株式会社 半導体記憶装置
EP0170052B1 (en) * 1984-07-02 1992-04-01 Fujitsu Limited Master slice type semiconductor circuit device
JPH0652784B2 (ja) * 1984-12-07 1994-07-06 富士通株式会社 ゲートアレイ集積回路装置及びその製造方法
JPS629586A (ja) * 1985-07-08 1987-01-17 Oki Electric Ind Co Ltd 半導体ランダムアクセスメモリ装置
US5231603A (en) * 1985-07-22 1993-07-27 Microchip Technology Incorporated Variable page ROM
JP2534652B2 (ja) * 1985-10-15 1996-09-18 日本電気株式会社 半導体集積回路
JPH0750555B2 (ja) * 1986-02-07 1995-05-31 日本電気株式会社 不揮発性半導体記憶装置
JPS63140551A (ja) * 1986-12-01 1988-06-13 Mitsubishi Electric Corp 半導体記憶装置
JPS63163645A (ja) * 1986-12-26 1988-07-07 Ricoh Co Ltd 二次元配列メモリ装置
JPS63177235A (ja) * 1987-01-19 1988-07-21 Fujitsu Ltd 多次元アクセスメモリ
US4922441A (en) * 1987-01-19 1990-05-01 Ricoh Company, Ltd. Gate array device having a memory cell/interconnection region
JPS63250149A (ja) * 1987-04-07 1988-10-18 Mitsubishi Electric Corp 半導体装置
JP2590897B2 (ja) * 1987-07-20 1997-03-12 日本電気株式会社 半導体メモリ
JP2623461B2 (ja) * 1987-09-16 1997-06-25 株式会社日立製作所 ダイナミック型ｒａｍ
JPH01105708A (ja) * 1987-10-19 1989-04-24 Mitsubishi Electric Corp モールド装置
EP0317666B1 (en) * 1987-11-23 1992-02-19 Koninklijke Philips Electronics N.V. Fast operating static ram memory with high storage capacity
DE68928112T2 (de) * 1988-03-18 1997-11-20 Toshiba Kawasaki Kk Masken-rom mit Ersatzspeicherzellen
US4999805A (en) * 1988-09-09 1991-03-12 Compaa Computer Corporation Extended input/output circuit board addressing system
US5146428A (en) * 1989-02-07 1992-09-08 Hitachi, Ltd. Single chip gate array
KR910006849A (ko) * 1989-09-29 1991-04-30 미다 가쓰시게 반도체 집적회로 장치
US5485418A (en) * 1990-01-16 1996-01-16 Mitsubishi Denki Kabushiki Kaisha Associative memory
US5150330A (en) * 1990-01-24 1992-09-22 Vlsi Technology, Inc. Interblock dispersed-word memory architecture
JPH03122092U (en, 2012) * 1990-03-23 1991-12-12
JP3001252B2 (ja) * 1990-11-16 2000-01-24 株式会社日立製作所 半導体メモリ
JPH05267626A (ja) * 1992-01-24 1993-10-15 Toshiba Corp ゲートアレイ回路
US5396608A (en) * 1993-06-28 1995-03-07 Analog Devices, Inc. Method and apparatus for accessing variable length words in a memory array
US5719889A (en) * 1995-12-20 1998-02-17 International Business Machines Corporation Programmable parity checking and comparison circuit
JP2002025250A (ja) * 2000-07-03 2002-01-25 Hitachi Ltd 半導体記憶装置
JP3741053B2 (ja) * 2002-02-18 2006-02-01 ソニー株式会社 画像処理装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599146A (en) * 1968-04-19 1971-08-10 Rca Corp Memory addressing failure detection
JPS5610658B2 (en, 2012) * 1973-10-19 1981-03-10
IT1052771B (it) * 1975-12-31 1981-07-20 Olivetti C E C S P A Dispositivo di indirizzamento di una memoria
DE2643482A1 (de) * 1976-09-27 1978-03-30 Siemens Ag Halbleiterplaettchen zur herstellung hochintegrierter bausteine
US4092728A (en) * 1976-11-29 1978-05-30 Rca Corporation Parallel access memory system
US4092665A (en) * 1976-12-29 1978-05-30 Xerox Corporation Method and means for extracting variable length data from fixed length bytes
FR2440657A1 (fr) * 1978-10-31 1980-05-30 Ibm France Perfectionnement aux reseaux logiques programmables a fonctions multiples
JPS5578561A (en) * 1978-12-08 1980-06-13 Fujitsu Ltd Master-slice lsi circuit device
US4208728A (en) * 1978-12-21 1980-06-17 Bell Telephone Laboratories, Incorporated Programable logic array
JPS55150179A (en) * 1979-05-04 1980-11-21 Fujitsu Ltd Semiconductor memory unit
JPS5624946A (en) * 1979-08-08 1981-03-10 Fujitsu Ltd Master slice type integrated circuit
US4447895A (en) * 1979-10-04 1984-05-08 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory device
JPS58199539A (ja) * 1982-05-17 1983-11-19 Hitachi Ltd マスタ−スライス方式の半導体集積回路装置
JPS58212149A (ja) * 1982-06-04 1983-12-09 Hitachi Ltd 集積回路装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NICHTS-ERMITTELT

Also Published As

Publication number Publication date
JPS5919367A (ja) 1984-01-31
JPS6412096B2 (en, 2012) 1989-02-28
DE3326943A1 (de) 1984-02-02
US4675849A (en) 1987-06-23

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8128 New person/name/address of the agent

Representative=s name: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZ

D2 Grant after examination
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee