DE112021002942T5 - Halbleitermodul - Google Patents

Halbleitermodul Download PDF

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Publication number
DE112021002942T5
DE112021002942T5 DE112021002942.8T DE112021002942T DE112021002942T5 DE 112021002942 T5 DE112021002942 T5 DE 112021002942T5 DE 112021002942 T DE112021002942 T DE 112021002942T DE 112021002942 T5 DE112021002942 T5 DE 112021002942T5
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Germany
Prior art keywords
conductive
semiconductor elements
semiconductor
semiconductor module
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112021002942.8T
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German (de)
English (en)
Inventor
Kenji Hayashi
Kohei Tanikawa
Ryosuke Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
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Rohm Co Ltd
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Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112021002942T5 publication Critical patent/DE112021002942T5/de
Pending legal-status Critical Current

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    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
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    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
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    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
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    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
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    • H10W72/07651—Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting
    • H10W72/07653—Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting changes in shapes
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    • H10W72/323—Multilayered die-attach connectors, e.g. a coating on a top surface of a core characterised by the structures of the outermost layers, e.g. multilayered coatings
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    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
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    • H10W90/766—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Inverter Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE112021002942.8T 2020-10-14 2021-09-27 Halbleitermodul Pending DE112021002942T5 (de)

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JP2020173339 2020-10-14
JP2020-173339 2020-10-14
PCT/JP2021/035261 WO2022080122A1 (ja) 2020-10-14 2021-09-27 半導体モジュール

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DE112021002942T5 true DE112021002942T5 (de) 2023-04-20

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DE202021004375.6U Active DE202021004375U1 (de) 2020-10-14 2021-09-27 Halbleitermodul
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