JP4250191B2 - Dc/dcコンバータ用半導体装置 - Google Patents
Dc/dcコンバータ用半導体装置 Download PDFInfo
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Description
図1は本発明の実施の形態1の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図、図17は図1に示す半導体装置の内部を透過して示す斜視図、図2は図1に示すA−A線に沿って切断した断面の構造を示す断面図、図3は図1に示す半導体装置の構造を示す裏面図、図4は図1に示す半導体装置の構造を示す外観斜視図、図5〜図7はそれぞれ本発明の実施の形態1の変形例の半導体装置の構造を示す断面図、図8は図1に示す半導体装置(非絶縁型DC/DCコンバータ)における実装時の等価回路の一例を示す回路図、図16は比較例の電源用マルチチップモジュールの構造を封止体を透過して示す平面図である。
図9は本発明の実施の形態2の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図、図10は図9に示すB−B線に沿って切断した断面の構造を示す断面図、図11は図9に示す半導体装置の構造を示す裏面図、図12は図9に示す半導体装置の構造を示す外観斜視図である。
図13は本発明の実施の形態3の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を示す断面図、図14は本発明の実施の形態3の変形例の半導体装置の構造を示す断面図である。
図15は本発明の実施の形態4の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図である。
2 制御用パワーMOSFETチップ(第1の半導体チップ)
2a 主面
2b 裏面
3 同期用パワーMOSFETチップ(第2の半導体チップ)
3a 主面
3b 裏面
4 ドライバICチップ(第3の半導体チップ)
4a 主面
5 入力側板状リード部(第1の板状導体部材)
6 出力側板状リード部(第3の板状導体部材)
7 接地側板状リード部
8 ドライバ側板状リード部
9 端子
10 ワイヤ
11 外部接続端子
12,12a ソース用板状リード部(第2の板状導体部材)
13,13a ソース用板状リード部(第4の板状導体部材)
14 銀ペースト
15 金バンプ
16 導体
17 封止体(封止用絶縁樹脂)
17a 表面
17b 裏面
18 はんだ
19 非絶縁型DC/DCコンバータ回路
20 コイル
21 入力電源
22,23 コンデンサ
24 負荷
25 ワイヤ
26 金属板
27 放熱フィン(放熱部材)
28 絶縁シート
29 金属板(他の板状導体部材)
ST1 制御用パワーMOSFETのソース端子
DT1 制御用パワーMOSFETのドレイン端子
GT1 制御用パワーMOSFETのゲート端子
ST2 同期用パワーMOSFETのソース端子
DT2 同期用パワーMOSFETのドレイン端子
GT2 同期用パワーMOSFETのゲート端子
Claims (8)
- 一つのパッケージに形成されるDC/DCコンバータ用半導体装置であって、
入力側の板状の導体部材に電気的に接続される第1の半導体チップと、
接地側の板状の導体部材に電気的に接続される第2の半導体チップと、
前記第1および第2の半導体チップを制御するドライバICチップとを有し、
前記第1の半導体チップの主面にソース端子が形成され、
前記第1の半導体チップの裏面にドレイン端子が形成され、
前記第2の半導体チップは、前記第1の半導体チップに対して表裏面反対の向きで配置され、
前記第2の半導体チップの主面にドレイン端子が形成され、
前記第2の半導体チップの裏面にソース端子およびゲート端子が形成され、
前記第1の半導体チップのソース端子、前記第2の半導体チップのドレイン端子の上部に一つの導体部材が形成され、
前記導体部材は、前記第1の半導体チップのソース端子、前記第2の半導体チップのドレイン端子に電気的に接続され、
前記第2の半導体チップのゲート端子は前記ドライバICチップに電気的に接続されることを特徴とするDC/DCコンバータ用半導体装置。 - 請求項1記載のDC/DCコンバータ用半導体装置において、
前記第1および第2の半導体チップは、パワートランジスタチップであることを特徴とするDC/DCコンバータ用半導体装置。 - 一つのパッケージに形成されるDC/DCコンバータ用半導体装置であって、
第1、第2および第3の外部端子と、
前記第1の外部端子の上部に形成され、入力側の板状の導体部材に電気的に接続される第1の半導体チップと、
前記第2の外部端子の上部に形成され、接地側の板状の導体部材に電気的に接続される第2の半導体チップと、
前記第1および第2の半導体チップを制御するドライバICチップとを有し、
前記第1の半導体チップの主面にソース端子が形成され、
前記第1の半導体チップの裏面にドレイン端子が形成され、
前記第2の半導体チップは、前記第1の半導体チップに対して表裏面反対の向きで配置され、
前記第2の半導体チップの主面にドレイン端子が形成され、
前記第2の半導体チップの裏面にソース端子およびゲート端子が形成され、
前記第1の半導体チップのソース端子、前記第2の半導体チップのドレイン端子および前記第3の外部端子の上部に一つの導体部材が形成され、
前記導体部材は、前記第1の半導体チップのソース端子、前記第2の半導体チップのドレイン端子および前記第3の外部端子に電気的に接続され、
前記ドライバICチップの主面に端子が形成され、
前記ドライバICチップの端子に、前記第2の半導体チップのゲート端子に電気的に接続されるワイヤが接続され、
前記第1、第2および第3の外部端子は、前記パッケージの裏面に形成され、
前記第1の外部端子は、前記第1の半導体チップのドレイン端子に電気的に接続され、
前記第2の外部端子は、前記第2の半導体チップのソース端子に電気的に接続されることを特徴とするDC/DCコンバータ用半導体装置。 - 請求項3記載のDC/DCコンバータ用半導体装置において、
前記第1の半導体チップの主面にゲート端子が形成され、
前記ドライバICチップの主面に、前記端子とは異なる第2端子が形成され、
前記ドライバICチップの第2端子に、前記第1の半導体チップのゲート端子に電気的に接続されるワイヤが接続されていることを特徴とするDC/DCコンバータ用半導体装置。 - 請求項3記載のDC/DCコンバータ用半導体装置において、
前記第1の半導体チップの主面にゲート端子が形成され、
前記ドライバICチップの主面に、前記端子とは異なる第2端子が形成され、
前記ドライバICチップの第2端子に、前記第1の半導体チップのゲート端子に電気的に接続されるワイヤが接続されていることを特徴とするDC/DCコンバータ用半導体装置。 - 請求項3記載のDC/DCコンバータ用半導体装置において、
前記導体部材の板状部材の断面積は、前記ワイヤの断面積よりも大きいことを特徴とするDC/DCコンバータ用半導体装置。 - 請求項5記載のDC/DCコンバータ用半導体装置において、
前記導体部材の板状部材の断面積は、前記ワイヤの断面積よりも大きいことを特徴とするDC/DCコンバータ用半導体装置。 - 請求項7記載のDC/DCコンバータ用半導体装置において、
前記第1および第2の半導体チップは、パワートランジスタチップであることを特徴とするDC/DCコンバータ用半導体装置。
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JP2007287544A JP4250191B2 (ja) | 2007-11-05 | 2007-11-05 | Dc/dcコンバータ用半導体装置 |
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JP2009283656A (ja) | 2008-05-22 | 2009-12-03 | Denso Corp | 半導体装置およびその製造方法 |
JP5268660B2 (ja) * | 2009-01-08 | 2013-08-21 | 三菱電機株式会社 | パワーモジュール及びパワー半導体装置 |
JP5206743B2 (ja) * | 2010-07-05 | 2013-06-12 | 株式会社デンソー | 半導体モジュールおよびその製造方法 |
JP6470328B2 (ja) * | 2017-02-09 | 2019-02-13 | 株式会社東芝 | 半導体モジュール |
JP2019046899A (ja) * | 2017-08-31 | 2019-03-22 | ルネサスエレクトロニクス株式会社 | 電子装置 |
WO2019181147A1 (ja) * | 2018-03-19 | 2019-09-26 | 株式会社村田製作所 | 制御回路モジュール、電子部品の接続構造および電力変換装置 |
CN116825768B (zh) * | 2020-10-14 | 2024-02-23 | 罗姆股份有限公司 | 半导体模块 |
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