DE112013005968B4 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung

Info

Publication number
DE112013005968B4
DE112013005968B4 DE112013005968.1T DE112013005968T DE112013005968B4 DE 112013005968 B4 DE112013005968 B4 DE 112013005968B4 DE 112013005968 T DE112013005968 T DE 112013005968T DE 112013005968 B4 DE112013005968 B4 DE 112013005968B4
Authority
DE
Germany
Prior art keywords
gate
dielectric
memory
region
disposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE112013005968.1T
Other languages
German (de)
English (en)
Other versions
DE112013005968T5 (de
Inventor
Shenqing Fang
Chun Chen
Unsoon Kim
Mark Ramsbey
Tung Chang Kuo
Sameer Haddad
James Pak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies LLC
Original Assignee
Infineon Technologies LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies LLC filed Critical Infineon Technologies LLC
Publication of DE112013005968T5 publication Critical patent/DE112013005968T5/de
Application granted granted Critical
Publication of DE112013005968B4 publication Critical patent/DE112013005968B4/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE112013005968.1T 2012-12-14 2013-12-11 Halbleitervorrichtung Active DE112013005968B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/715,577 US9368606B2 (en) 2012-12-14 2012-12-14 Memory first process flow and device
US13/715,577 2012-12-14
PCT/US2013/074390 WO2014093490A1 (en) 2012-12-14 2013-12-11 Memory first process flow and device

Publications (2)

Publication Number Publication Date
DE112013005968T5 DE112013005968T5 (de) 2015-10-22
DE112013005968B4 true DE112013005968B4 (de) 2025-07-31

Family

ID=50929931

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112013005968.1T Active DE112013005968B4 (de) 2012-12-14 2013-12-11 Halbleitervorrichtung

Country Status (4)

Country Link
US (2) US9368606B2 (https=)
JP (1) JP6531040B2 (https=)
DE (1) DE112013005968B4 (https=)
WO (1) WO2014093490A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9368606B2 (en) 2012-12-14 2016-06-14 Cypress Semiconductor Corporation Memory first process flow and device
US10014380B2 (en) 2012-12-14 2018-07-03 Cypress Semiconductor Corporation Memory first process flow and device
US20140210012A1 (en) * 2013-01-31 2014-07-31 Spansion Llc Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions
US9368644B2 (en) * 2013-12-20 2016-06-14 Cypress Semiconductor Corporation Gate formation memory by planarization
US10192747B2 (en) 2014-01-07 2019-01-29 Cypress Semiconductor Corporation Multi-layer inter-gate dielectric structure and method of manufacturing thereof
US9269829B2 (en) 2014-06-27 2016-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Split gate flash memory structure with a damage free select gate and a method of making the split gate flash memory structure
US9589805B2 (en) 2014-08-04 2017-03-07 Cypress Semiconductor Corporation Split-gate semiconductor device with L-shaped gate
US10535670B2 (en) * 2016-02-25 2020-01-14 Taiwan Semiconductor Manufacturing Co., Ltd. Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same
CN107799528B (zh) * 2016-08-30 2020-07-17 华邦电子股份有限公司 存储元件的制造方法
US10242996B2 (en) * 2017-07-19 2019-03-26 Cypress Semiconductor Corporation Method of forming high-voltage transistor with thin gate poly
DE102019122590A1 (de) 2018-08-28 2020-03-05 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum verbessern der steuergate-gleichmässigkeit während der herstellung von prozessoren mit eingebettetem flash-speicher
US11069693B2 (en) * 2018-08-28 2021-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Method for improving control gate uniformity during manufacture of processors with embedded flash memory
US11638378B2 (en) * 2021-05-11 2023-04-25 Winbond Electronics Corp. Method of fabricating semicondoctor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6642103B2 (en) 2000-03-08 2003-11-04 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing the same
US7888211B2 (en) 2008-12-24 2011-02-15 Dongbu Hitek Co., Ltd. Method of manufacturing flash memory device
US20110242888A1 (en) 2010-03-30 2011-10-06 Renesas Electronics Corporation Semiconductor device and manufacturing method thereof

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5969383A (en) 1997-06-16 1999-10-19 Motorola, Inc. Split-gate memory device and method for accessing the same
US5824584A (en) 1997-06-16 1998-10-20 Motorola, Inc. Method of making and accessing split gate memory device
TW546840B (en) 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
JP2004095889A (ja) * 2002-08-30 2004-03-25 Fasl Japan Ltd 半導体記憶装置及びその製造方法
JP4601287B2 (ja) 2002-12-26 2010-12-22 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP4746835B2 (ja) 2003-10-20 2011-08-10 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP4546117B2 (ja) 2004-03-10 2010-09-15 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP4601316B2 (ja) * 2004-03-31 2010-12-22 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP5007017B2 (ja) 2004-06-30 2012-08-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2006041354A (ja) 2004-07-29 2006-02-09 Renesas Technology Corp 半導体装置及びその製造方法
JP5116987B2 (ja) 2005-05-23 2013-01-09 ルネサスエレクトロニクス株式会社 集積半導体不揮発性記憶装置
JP4659527B2 (ja) 2005-06-20 2011-03-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2007194511A (ja) 2006-01-23 2007-08-02 Renesas Technology Corp 不揮発性半導体記憶装置およびその製造方法
US7394702B2 (en) * 2006-04-05 2008-07-01 Spansion Llc Methods for erasing and programming memory devices
US7915123B1 (en) * 2006-04-20 2011-03-29 Spansion Llc Dual charge storage node memory device and methods for fabricating such device
JP5137453B2 (ja) * 2006-04-28 2013-02-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4928825B2 (ja) * 2006-05-10 2012-05-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5142494B2 (ja) * 2006-08-03 2013-02-13 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7579243B2 (en) * 2006-09-26 2009-08-25 Freescale Semiconductor, Inc. Split gate memory cell method
US7811886B2 (en) * 2007-02-06 2010-10-12 Freescale Semiconductor, Inc. Split-gate thin film storage NVM cell with reduced load-up/trap-up effects
US7795091B2 (en) 2008-04-30 2010-09-14 Winstead Brian A Method of forming a split gate memory device and apparatus
US7902022B2 (en) 2008-07-29 2011-03-08 Freescale Semiconductor, Inc. Self-aligned in-laid split gate memory and method of making
US8173505B2 (en) * 2008-10-20 2012-05-08 Freescale Semiconductor, Inc. Method of making a split gate memory cell
KR101038873B1 (ko) * 2008-11-06 2011-06-02 주식회사 동부하이텍 플래시 메모리 소자의 제조 방법
JP5519154B2 (ja) * 2009-01-09 2014-06-11 ルネサスエレクトロニクス株式会社 半導体装置
US8298902B2 (en) 2009-03-18 2012-10-30 International Business Machines Corporation Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit
KR20110075952A (ko) 2009-12-29 2011-07-06 주식회사 동부하이텍 플래시 메모리 소자의 제조방법
JP2011181124A (ja) 2010-02-26 2011-09-15 Renesas Electronics Corp 不揮発性半導体記憶装置および不揮発性半導体記憶装置の動作方法
JP2011199084A (ja) * 2010-03-23 2011-10-06 Toshiba Corp 半導体記憶装置及びその製造方法
JP5592214B2 (ja) * 2010-09-22 2014-09-17 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2011040782A (ja) 2010-10-18 2011-02-24 Renesas Electronics Corp 半導体装置の製造方法
US8698118B2 (en) * 2012-02-29 2014-04-15 Globalfoundries Singapore Pte Ltd Compact RRAM device and methods of making same
US9368606B2 (en) 2012-12-14 2016-06-14 Cypress Semiconductor Corporation Memory first process flow and device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6642103B2 (en) 2000-03-08 2003-11-04 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing the same
US7888211B2 (en) 2008-12-24 2011-02-15 Dongbu Hitek Co., Ltd. Method of manufacturing flash memory device
US20110242888A1 (en) 2010-03-30 2011-10-06 Renesas Electronics Corporation Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JP6531040B2 (ja) 2019-06-12
US9368606B2 (en) 2016-06-14
JP2015537395A (ja) 2015-12-24
DE112013005968T5 (de) 2015-10-22
US9917166B2 (en) 2018-03-13
US20160293720A1 (en) 2016-10-06
US20140167140A1 (en) 2014-06-19
WO2014093490A1 (en) 2014-06-19

Similar Documents

Publication Publication Date Title
DE112013005968B4 (de) Halbleitervorrichtung
DE69527388T2 (de) EEPROM-Zelle mit Isolationstransistor und Betriebs- und Herstellungsverfahren
DE19511846C2 (de) Zweikanalige EEPROM-Grabenspeicherzelle auf SOI und Verfahren zur Herstellung derselben
DE19600423C2 (de) Elektrisch programmierbare Speicherzellenanordnung und Verfahren zu deren Herstellung
DE102008018744A1 (de) SONOS-Stapelspeicher
DE112017006252T5 (de) Split-Gate-Flashzelle, die auf ausgeschnittenem Substrat geformt ist
DE19638969C2 (de) EEPROM mit einem Polydistanz-Floating-Gate und Verfahren zu deren Herstellung
DE112018003712T5 (de) Verfahren zum ausbilden eines hochspannungstransistors mit dünnem gate-poly
DE10228565A1 (de) Nicht-flüchtige Speichervorrichtung und Herstellungsverfahren derselben
DE112013005987B4 (de) Halbleitervorrichtung mit nichtflüchtiger Speicherzelle und Verfahren zur Herstellung
DE102007052217A1 (de) Integrierter Schaltkreis mit NAND-Speicherzellen-Strängen
DE112013005974B4 (de) Verfahren zur Herstellung einer Splitgatevorrichtung sowie Verfahren zur Herstellung einer Splitgatevorrichtung und einer Peripherievorrichtung
EP0946985B1 (de) Speicherzellenanordnung und verfahren zu deren herstellung
DE102005052272B4 (de) Nichtflüchtiges Halbleiterspeicherbauelement und Verfahren zur Herstellung desselben
DE112013005990T5 (de) Eingebetteter Ladungseinfang-Split-Gate-Flashspeicher und Assoziierte Verfahren
DE10324550B4 (de) Herstellungsverfahren für eine NROM-Halbleiterspeichervorrichtung
DE19807010B4 (de) Verfahren zur Herstellung einer nichtflüchtigen Speichereinrichtung
DE19748495C2 (de) EEPROM-Zellstruktur und Verfahren zum Programmieren bzw. Löschen ausgewählter EEPROM-Zellstrukturen sowie EEPROM-Zellenfeld
DE69326749T2 (de) Nichtflüchtiger Speicher mit Schutzdiode
DE112013005992B4 (de) Bildung von Hochspannungs-Gates
DE102006007714A1 (de) Nichtflüchtiges Speicherbauelement und Verfahren zur Herstellung desselben
WO2003003472A2 (de) Transistor-anordnung, verfahren zum betreiben einer transistor-anordnung als datenspeicher und verfahren zum herstellen einer transistor-anordnung
DE19822523A1 (de) Nichtflüchtiger Halbleiterspeicher und Verfahren zu dessen Herstellung
DE102007019320A1 (de) Integrierte Schaltkreise und Verfahren zum Herstellen derselben
EP1259964B1 (de) Nichtflüchtige nor-zweitransistor-halbleiterspeicherzelle sowie dazugehörige nor-halbleiterspeichereinrichtung und verfahren zu deren herstellung

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R016 Response to examination communication
R016 Response to examination communication
R081 Change of applicant/patentee

Owner name: INFINEON TECHNOLOGIES LLC, SAN JOSE, US

Free format text: FORMER OWNER: SPANSION LLC, SUNNYVALE, CALIF., US

R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0027115000

Ipc: H10B0069000000

R016 Response to examination communication
R016 Response to examination communication
R018 Grant decision by examination section/examining division
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H10B0069000000

Ipc: H10B0043300000

R130 Divisional application to

Ref document number: 112013007888

Country of ref document: DE