DE102008063402B4 - Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten - Google Patents

Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten Download PDF

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Publication number
DE102008063402B4
DE102008063402B4 DE102008063402A DE102008063402A DE102008063402B4 DE 102008063402 B4 DE102008063402 B4 DE 102008063402B4 DE 102008063402 A DE102008063402 A DE 102008063402A DE 102008063402 A DE102008063402 A DE 102008063402A DE 102008063402 B4 DE102008063402 B4 DE 102008063402B4
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silicon
threshold
transistor
semiconductor
transistors
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DE102008063402A
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DE102008063402A1 (de
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Stephan Kronholz
Andreas Ott
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Advanced Micro Devices Inc
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AMD Fab 36 LLC and Co KG
Advanced Micro Devices Inc
AMD Fab 36 LLC
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Priority to DE102008063402A priority Critical patent/DE102008063402B4/de
Priority to US12/637,112 priority patent/US8236654B2/en
Priority to KR1020117018048A priority patent/KR101539416B1/ko
Priority to CN200980157723.XA priority patent/CN102341906B/zh
Priority to JP2011542725A priority patent/JP5669752B2/ja
Priority to PCT/EP2009/009307 priority patent/WO2010076018A1/en
Publication of DE102008063402A1 publication Critical patent/DE102008063402A1/de
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/014—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
DE102008063402A 2008-12-31 2008-12-31 Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten Active DE102008063402B4 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE102008063402A DE102008063402B4 (de) 2008-12-31 2008-12-31 Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten
US12/637,112 US8236654B2 (en) 2008-12-31 2009-12-14 Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities
KR1020117018048A KR101539416B1 (ko) 2008-12-31 2009-12-29 증착 비균일성을 감소시킴으로써 채널 반도체 합금을 포함하는 트랜지스터에서의 임계 전압 변화의 감소
CN200980157723.XA CN102341906B (zh) 2008-12-31 2009-12-29 通过减少非均匀性沉积的包括沟道半导体合金的晶体管中的阈值电压变异的减少
JP2011542725A JP5669752B2 (ja) 2008-12-31 2009-12-29 チャネル半導体合金を備えたトランジスタにおける堆積不均一性の低減によるスレッショルド電圧ばらつきの低減
PCT/EP2009/009307 WO2010076018A1 (en) 2008-12-31 2009-12-29 Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102008063402A DE102008063402B4 (de) 2008-12-31 2008-12-31 Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten

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DE102008063402A1 DE102008063402A1 (de) 2010-07-08
DE102008063402B4 true DE102008063402B4 (de) 2013-10-17

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US (1) US8236654B2 (enExample)
JP (1) JP5669752B2 (enExample)
KR (1) KR101539416B1 (enExample)
CN (1) CN102341906B (enExample)
DE (1) DE102008063402B4 (enExample)
WO (1) WO2010076018A1 (enExample)

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DE102009006886B4 (de) 2009-01-30 2012-12-06 Advanced Micro Devices, Inc. Verringerung von Dickenschwankungen einer schwellwerteinstellenden Halbleiterlegierung durch Verringern der Strukturierungsungleichmäßigkeiten vor dem Abscheiden der Halbleiterlegierung
JP5605134B2 (ja) * 2010-09-30 2014-10-15 富士通セミコンダクター株式会社 半導体装置及びその製造方法
DE102010063296B4 (de) * 2010-12-16 2012-08-16 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Herstellungsverfahren mit reduzierter STI-Topograpie für Halbleiterbauelemente mit einer Kanalhalbleiterlegierung
US8609509B2 (en) 2011-09-22 2013-12-17 Globalfoundries Inc. Superior integrity of high-k metal gate stacks by forming STI regions after gate metals
US8377773B1 (en) * 2011-10-31 2013-02-19 Globalfoundries Inc. Transistors having a channel semiconductor alloy formed in an early process stage based on a hard mask
US8541281B1 (en) 2012-08-17 2013-09-24 Globalfoundries Inc. Replacement gate process flow for highly scaled semiconductor devices
US8969190B2 (en) 2012-08-24 2015-03-03 Globalfoundries Inc. Methods of forming a layer of silicon on a layer of silicon/germanium
US9029919B2 (en) 2013-02-01 2015-05-12 Globalfoundries Inc. Methods of forming silicon/germanium protection layer above source/drain regions of a transistor and a device having such a protection layer

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WO2008112949A1 (en) * 2007-03-15 2008-09-18 Intel Corporation Cmos device with dual-epi channels and self-aligned contacts

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Also Published As

Publication number Publication date
WO2010076018A1 (en) 2010-07-08
JP2012514318A (ja) 2012-06-21
KR20120067973A (ko) 2012-06-26
US20100164014A1 (en) 2010-07-01
CN102341906A (zh) 2012-02-01
CN102341906B (zh) 2014-10-15
US8236654B2 (en) 2012-08-07
DE102008063402A1 (de) 2010-07-08
JP5669752B2 (ja) 2015-02-18
KR101539416B1 (ko) 2015-07-27

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