CN102341906B - 通过减少非均匀性沉积的包括沟道半导体合金的晶体管中的阈值电压变异的减少 - Google Patents

通过减少非均匀性沉积的包括沟道半导体合金的晶体管中的阈值电压变异的减少 Download PDF

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CN102341906B
CN102341906B CN200980157723.XA CN200980157723A CN102341906B CN 102341906 B CN102341906 B CN 102341906B CN 200980157723 A CN200980157723 A CN 200980157723A CN 102341906 B CN102341906 B CN 102341906B
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siliceous
semiconductor
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semiconductor region
regions
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CN102341906A (zh
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S·克朗霍尔兹
A·奥特
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Advanced Micro Devices Inc
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/014Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
CN200980157723.XA 2008-12-31 2009-12-29 通过减少非均匀性沉积的包括沟道半导体合金的晶体管中的阈值电压变异的减少 Active CN102341906B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102008063402.6 2008-12-31
DE102008063402A DE102008063402B4 (de) 2008-12-31 2008-12-31 Verringerung der Schwellwertspannungsfluktuation in Transistoren mit einer Kanalhalbleiterlegierung durch Verringern der Abscheideungleichmäßigkeiten
US12/637,112 2009-12-14
US12/637,112 US8236654B2 (en) 2008-12-31 2009-12-14 Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities
PCT/EP2009/009307 WO2010076018A1 (en) 2008-12-31 2009-12-29 Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities

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CN102341906A CN102341906A (zh) 2012-02-01
CN102341906B true CN102341906B (zh) 2014-10-15

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US (1) US8236654B2 (enExample)
JP (1) JP5669752B2 (enExample)
KR (1) KR101539416B1 (enExample)
CN (1) CN102341906B (enExample)
DE (1) DE102008063402B4 (enExample)
WO (1) WO2010076018A1 (enExample)

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DE102010063296B4 (de) * 2010-12-16 2012-08-16 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Herstellungsverfahren mit reduzierter STI-Topograpie für Halbleiterbauelemente mit einer Kanalhalbleiterlegierung
US8609509B2 (en) * 2011-09-22 2013-12-17 Globalfoundries Inc. Superior integrity of high-k metal gate stacks by forming STI regions after gate metals
US8377773B1 (en) * 2011-10-31 2013-02-19 Globalfoundries Inc. Transistors having a channel semiconductor alloy formed in an early process stage based on a hard mask
US8541281B1 (en) 2012-08-17 2013-09-24 Globalfoundries Inc. Replacement gate process flow for highly scaled semiconductor devices
US8969190B2 (en) 2012-08-24 2015-03-03 Globalfoundries Inc. Methods of forming a layer of silicon on a layer of silicon/germanium
US9029919B2 (en) 2013-02-01 2015-05-12 Globalfoundries Inc. Methods of forming silicon/germanium protection layer above source/drain regions of a transistor and a device having such a protection layer

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Also Published As

Publication number Publication date
WO2010076018A1 (en) 2010-07-08
CN102341906A (zh) 2012-02-01
JP5669752B2 (ja) 2015-02-18
JP2012514318A (ja) 2012-06-21
DE102008063402A1 (de) 2010-07-08
US8236654B2 (en) 2012-08-07
US20100164014A1 (en) 2010-07-01
DE102008063402B4 (de) 2013-10-17
KR101539416B1 (ko) 2015-07-27
KR20120067973A (ko) 2012-06-26

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