DE10147084A1 - Halbleitervorrichtung vom gestapelten Typ - Google Patents

Halbleitervorrichtung vom gestapelten Typ

Info

Publication number
DE10147084A1
DE10147084A1 DE10147084A DE10147084A DE10147084A1 DE 10147084 A1 DE10147084 A1 DE 10147084A1 DE 10147084 A DE10147084 A DE 10147084A DE 10147084 A DE10147084 A DE 10147084A DE 10147084 A1 DE10147084 A1 DE 10147084A1
Authority
DE
Germany
Prior art keywords
integrated
semiconductor
chip
stacked
circuit devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10147084A
Other languages
German (de)
English (en)
Inventor
Mie Matsuo
Nobuo Hayasaka
Tsunetoshi Arikado
Hidemi Ishiuchi
Koji Sakui
Chiaki Takubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE10147084A1 publication Critical patent/DE10147084A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0652—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/171—Disposition
    • H01L2224/1718—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/17181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0652—Bump or bump-like direct electrical connections from substrate to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06596—Structural arrangements for testing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE10147084A 2000-09-28 2001-09-25 Halbleitervorrichtung vom gestapelten Typ Ceased DE10147084A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000296822 2000-09-28
JP2001288048A JP2002176137A (ja) 2000-09-28 2001-09-21 積層型半導体デバイス

Publications (1)

Publication Number Publication Date
DE10147084A1 true DE10147084A1 (de) 2002-06-27

Family

ID=26600976

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10147084A Ceased DE10147084A1 (de) 2000-09-28 2001-09-25 Halbleitervorrichtung vom gestapelten Typ

Country Status (3)

Country Link
US (1) US6717251B2 (enExample)
JP (1) JP2002176137A (enExample)
DE (1) DE10147084A1 (enExample)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110091A (ja) * 2001-09-28 2003-04-11 Toshiba Corp 半導体装置及び半導体装置の製造方法
US7041355B2 (en) * 2001-11-29 2006-05-09 Dow Global Technologies Inc. Structural reinforcement parts for automotive assembly
KR100435813B1 (ko) * 2001-12-06 2004-06-12 삼성전자주식회사 금속 바를 이용하는 멀티 칩 패키지와 그 제조 방법
US6896320B2 (en) * 2002-01-22 2005-05-24 Dow Global Technologies Inc. Reinforced structural body
CN100553929C (zh) * 2002-04-15 2009-10-28 陶氏环球技术公司 改进的车辆结构部件及制造这些部件的方法
DE10227305A1 (de) * 2002-06-19 2003-09-04 Siemens Dematic Ag Elektrisches Mehrschicht-Bauelement-Modul und Verfahren zu dessen Herstellung
US6891447B2 (en) * 2002-07-12 2005-05-10 Massachusetts Institute Of Technology Electromagnetic coupling connector for three-dimensional electronic circuits
US7056810B2 (en) * 2002-12-18 2006-06-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor apparatus, and semiconductor apparatus and electric appliance
DE60309604T2 (de) * 2002-12-27 2007-09-13 Dow Global Technologies, Inc., Midland Hitzeaktivierter epoxidklebstoff und verwendung in einem integralschaumstoffeinsatz
JP4110992B2 (ja) * 2003-02-07 2008-07-02 セイコーエプソン株式会社 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
BRPI0407657A (pt) * 2003-03-05 2006-03-14 Dow Global Technologies Inc artigo de reforço estrutural e processo para a preparação do mesmo
JP4419049B2 (ja) * 2003-04-21 2010-02-24 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
CN100446244C (zh) * 2003-05-15 2008-12-24 财团法人熊本高新技术产业财团 半导体芯片安装体及其制造方法
US20090014897A1 (en) * 2003-05-15 2009-01-15 Kumamoto Technology & Industry Foundation Semiconductor chip package and method of manufacturing the same
JP2004363573A (ja) * 2003-05-15 2004-12-24 Kumamoto Technology & Industry Foundation 半導体チップ実装体およびその製造方法
TWI231023B (en) * 2003-05-27 2005-04-11 Ind Tech Res Inst Electronic packaging with three-dimensional stack and assembling method thereof
US8471263B2 (en) * 2003-06-24 2013-06-25 Sang-Yun Lee Information storage system which includes a bonded semiconductor structure
KR100621992B1 (ko) * 2003-11-19 2006-09-13 삼성전자주식회사 이종 소자들의 웨이퍼 레벨 적층 구조와 방법 및 이를이용한 시스템-인-패키지
JP3896112B2 (ja) * 2003-12-25 2007-03-22 エルピーダメモリ株式会社 半導体集積回路装置
US7116002B2 (en) * 2004-05-10 2006-10-03 Taiwan Semiconductor Manufacturing Company, Ltd. Overhang support for a stacked semiconductor device, and method of forming thereof
KR100618838B1 (ko) * 2004-06-24 2006-09-01 삼성전자주식회사 상하 연결 능력을 개선할 수 있는 스택형 멀티칩 패키지
US7588963B2 (en) * 2004-06-30 2009-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming overhang support for a stacked semiconductor device
JP4865197B2 (ja) 2004-06-30 2012-02-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7166924B2 (en) * 2004-08-17 2007-01-23 Intel Corporation Electronic packages with dice landed on wire bonds
US7602618B2 (en) 2004-08-25 2009-10-13 Micron Technology, Inc. Methods and apparatuses for transferring heat from stacked microfeature devices
US7462925B2 (en) * 2004-11-12 2008-12-09 Macronix International Co., Ltd. Method and apparatus for stacking electrical components using via to provide interconnection
JP4504798B2 (ja) * 2004-12-16 2010-07-14 パナソニック株式会社 多段構成半導体モジュール
JP4433298B2 (ja) * 2004-12-16 2010-03-17 パナソニック株式会社 多段構成半導体モジュール
JP4577688B2 (ja) 2005-05-09 2010-11-10 エルピーダメモリ株式会社 半導体チップ選択方法、半導体チップ及び半導体集積回路装置
US7317256B2 (en) * 2005-06-01 2008-01-08 Intel Corporation Electronic packaging including die with through silicon via
TW201101476A (en) 2005-06-02 2011-01-01 Sony Corp Semiconductor image sensor module and method of manufacturing the same
US7432592B2 (en) * 2005-10-13 2008-10-07 Intel Corporation Integrated micro-channels for 3D through silicon architectures
JP4799157B2 (ja) * 2005-12-06 2011-10-26 エルピーダメモリ株式会社 積層型半導体装置
JP4753725B2 (ja) * 2006-01-20 2011-08-24 エルピーダメモリ株式会社 積層型半導体装置
US7462509B2 (en) * 2006-05-16 2008-12-09 International Business Machines Corporation Dual-sided chip attached modules
JP4910512B2 (ja) * 2006-06-30 2012-04-04 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法
US20080023824A1 (en) * 2006-07-28 2008-01-31 Texas Instruments Double-sided die
KR100809696B1 (ko) * 2006-08-08 2008-03-06 삼성전자주식회사 사이즈가 상이한 복수의 반도체 칩이 적층된 멀티 칩패키지 및 그 제조방법
KR100737162B1 (ko) 2006-08-11 2007-07-06 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
KR100807050B1 (ko) 2006-08-23 2008-02-25 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US7514775B2 (en) * 2006-10-09 2009-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Stacked structures and methods of fabricating stacked structures
US8110899B2 (en) * 2006-12-20 2012-02-07 Intel Corporation Method for incorporating existing silicon die into 3D integrated stack
US20080157322A1 (en) * 2006-12-27 2008-07-03 Jia Miao Tang Double side stacked die package
US7605477B2 (en) * 2007-01-25 2009-10-20 Raytheon Company Stacked integrated circuit assembly
US7598523B2 (en) * 2007-03-19 2009-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Test structures for stacking dies having through-silicon vias
KR100843243B1 (ko) * 2007-04-18 2008-07-02 삼성전자주식회사 신호의 전송파워를 최적화한 반도체 메모리 장치 및 그파워 초기화 방법
JP2008294367A (ja) * 2007-05-28 2008-12-04 Nec Electronics Corp 半導体装置およびその製造方法
US7880310B2 (en) * 2007-09-28 2011-02-01 Intel Corporation Direct device attachment on dual-mode wirebond die
US7952183B2 (en) * 2007-10-29 2011-05-31 Kabushiki Kaisha Toshiba High capacity memory with stacked layers
JP5331427B2 (ja) * 2008-09-29 2013-10-30 株式会社日立製作所 半導体装置
JP2010080801A (ja) * 2008-09-29 2010-04-08 Hitachi Ltd 半導体装置
JP5357510B2 (ja) 2008-10-31 2013-12-04 株式会社日立製作所 半導体集積回路装置
JP5534687B2 (ja) * 2009-03-06 2014-07-02 キヤノン株式会社 積層型半導体装置
US20100237481A1 (en) * 2009-03-20 2010-09-23 Chi Heejo Integrated circuit packaging system with dual sided connection and method of manufacture thereof
US7923290B2 (en) * 2009-03-27 2011-04-12 Stats Chippac Ltd. Integrated circuit packaging system having dual sided connection and method of manufacture thereof
US8294240B2 (en) * 2009-06-08 2012-10-23 Qualcomm Incorporated Through silicon via with embedded decoupling capacitor
US9269676B2 (en) 2009-11-25 2016-02-23 Intel Corporation Through silicon via guard ring
WO2011063547A1 (en) * 2009-11-25 2011-06-03 Intel Corporation Through silicon via guard ring
JP5581064B2 (ja) * 2010-01-14 2014-08-27 パナソニック株式会社 半導体装置
KR101695846B1 (ko) 2010-03-02 2017-01-16 삼성전자 주식회사 적층형 반도체 패키지
US8847376B2 (en) 2010-07-23 2014-09-30 Tessera, Inc. Microelectronic elements with post-assembly planarization
MY166609A (en) 2010-09-15 2018-07-17 Semiconductor Components Ind Llc Connector assembly and method of manufacture
TW201216439A (en) * 2010-10-08 2012-04-16 Universal Scient Ind Co Ltd Chip stacked structure
JP5645751B2 (ja) * 2011-05-24 2014-12-24 キヤノン株式会社 半導体装置
US9082763B2 (en) * 2012-03-15 2015-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Joint structure for substrates and methods of forming
KR101392888B1 (ko) * 2012-11-19 2014-05-08 숭실대학교산학협력단 ３차원 반도체의 전원전압 공급 장치
KR102439761B1 (ko) * 2017-12-22 2022-09-02 삼성전자주식회사 전자 장치 및 전자 장치의 제조 방법
US10319696B1 (en) * 2018-05-10 2019-06-11 Micron Technology, Inc. Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages
JP2019220621A (ja) 2018-06-21 2019-12-26 キオクシア株式会社 半導体装置及びその製造方法
JP7226358B2 (ja) * 2020-02-05 2023-02-21 株式会社デンソー 電子機器

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4500905A (en) 1981-09-30 1985-02-19 Tokyo Shibaura Denki Kabushiki Kaisha Stacked semiconductor device with sloping sides
JPS60194548A (ja) * 1984-03-16 1985-10-03 Nec Corp チツプキヤリヤ
JPS61101067A (ja) * 1984-10-24 1986-05-19 Nec Corp メモリモジユ−ル
FR2670322B1 (fr) 1990-12-05 1997-07-04 Matra Espace Modules de memoire a l'etat solide et dispositifs de memoire comportant de tels modules
JP2823029B2 (ja) 1992-03-30 1998-11-11 日本電気株式会社 マルチチップモジュール
US5380681A (en) 1994-03-21 1995-01-10 United Microelectronics Corporation Three-dimensional multichip package and methods of fabricating
JP2944449B2 (ja) 1995-02-24 1999-09-06 日本電気株式会社 半導体パッケージとその製造方法
JPH08264712A (ja) 1995-03-27 1996-10-11 Matsushita Electron Corp 半導体装置
US5604377A (en) * 1995-10-10 1997-02-18 International Business Machines Corp. Semiconductor chip high density packaging
JPH09186289A (ja) 1995-12-28 1997-07-15 Lucent Technol Inc 多層積層化集積回路チップ組立体
JP4011695B2 (ja) 1996-12-02 2007-11-21 株式会社東芝 マルチチップ半導体装置用チップおよびその形成方法
JP3673094B2 (ja) 1997-10-01 2005-07-20 株式会社東芝 マルチチップ半導体装置
JP2964983B2 (ja) 1997-04-02 1999-10-18 日本電気株式会社 三次元メモリモジュール及びそれを用いた半導体装置
US5915167A (en) 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
JP3920399B2 (ja) 1997-04-25 2007-05-30 株式会社東芝 マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置
JP3563604B2 (ja) * 1998-07-29 2004-09-08 株式会社東芝 マルチチップ半導体装置及びメモリカード
JP3166722B2 (ja) * 1998-08-18 2001-05-14 日本電気株式会社 積層型半導体装置のスタック構造
JPH11317494A (ja) 1999-04-07 1999-11-16 Nec Corp 三次元メモリモジュ―ル及びそれを用いた半導体装置

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