DE10131249A1 - Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material - Google Patents

Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material

Info

Publication number
DE10131249A1
DE10131249A1 DE10131249A DE10131249A DE10131249A1 DE 10131249 A1 DE10131249 A1 DE 10131249A1 DE 10131249 A DE10131249 A DE 10131249A DE 10131249 A DE10131249 A DE 10131249A DE 10131249 A1 DE10131249 A1 DE 10131249A1
Authority
DE
Germany
Prior art keywords
layer
silicon
treatment
semiconducting material
thermal treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE10131249A
Other languages
German (de)
English (en)
Inventor
Brian Murphy
Reinhold Wahlich
Schmolke Ruediger
Ammon Von Wilfried
James Moreland
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Wacker Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic AG filed Critical Wacker Siltronic AG
Priority to DE10131249A priority Critical patent/DE10131249A1/de
Publication of DE10131249A1 publication Critical patent/DE10131249A1/de
Priority to CNB028131630A priority patent/CN100372060C/zh
Priority to AT02758281T priority patent/ATE324670T1/de
Priority to DE50206581T priority patent/DE50206581D1/de
Priority to EP05021844A priority patent/EP1626440B1/de
Priority to JP2003509512A priority patent/JP4331593B2/ja
Priority to KR1020037016800A priority patent/KR100587997B1/ko
Priority to EP02758281A priority patent/EP1402567B1/de
Priority to PCT/EP2002/007125 priority patent/WO2003003430A2/de
Priority to TW91114122A priority patent/TW575910B/zh
Priority to DE50211238T priority patent/DE50211238D1/de
Priority to US10/481,537 priority patent/US7052948B2/en
Priority to US11/384,887 priority patent/US7417297B2/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3223—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering using cavities formed by hydrogen or noble gas ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Manufacturing Of Electric Cables (AREA)
DE10131249A 2001-06-28 2001-06-28 Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material Withdrawn DE10131249A1 (de)

Priority Applications (13)

Application Number Priority Date Filing Date Title
DE10131249A DE10131249A1 (de) 2001-06-28 2001-06-28 Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material
US10/481,537 US7052948B2 (en) 2001-06-28 2002-06-27 Film or layer made of semi-conductive material and method for producing said film or layer
KR1020037016800A KR100587997B1 (ko) 2001-06-28 2002-06-27 반도체 재료의 필름 또는 층, 및 그 필름 또는 층의제조방법
AT02758281T ATE324670T1 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
DE50206581T DE50206581D1 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
EP05021844A EP1626440B1 (de) 2001-06-28 2002-06-27 SOI-Scheibe
JP2003509512A JP4331593B2 (ja) 2001-06-28 2002-06-27 半導体材料からなるフィルムまたは層およびフィルムまたは層の製造方法
CNB028131630A CN100372060C (zh) 2001-06-28 2002-06-27 半导体材料的膜或层及制造该膜或层的方法
EP02758281A EP1402567B1 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
PCT/EP2002/007125 WO2003003430A2 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
TW91114122A TW575910B (en) 2001-06-28 2002-06-27 Film or layer of semiconducting material, and process for producing the film or layer
DE50211238T DE50211238D1 (de) 2001-06-28 2002-06-27 SOI-Scheibe
US11/384,887 US7417297B2 (en) 2001-06-28 2006-03-20 Film or layer of semiconducting material, and process for producing the film or layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10131249A DE10131249A1 (de) 2001-06-28 2001-06-28 Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material

Publications (1)

Publication Number Publication Date
DE10131249A1 true DE10131249A1 (de) 2002-05-23

Family

ID=7689811

Family Applications (3)

Application Number Title Priority Date Filing Date
DE10131249A Withdrawn DE10131249A1 (de) 2001-06-28 2001-06-28 Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material
DE50206581T Expired - Lifetime DE50206581D1 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
DE50211238T Expired - Lifetime DE50211238D1 (de) 2001-06-28 2002-06-27 SOI-Scheibe

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE50206581T Expired - Lifetime DE50206581D1 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht
DE50211238T Expired - Lifetime DE50211238D1 (de) 2001-06-28 2002-06-27 SOI-Scheibe

Country Status (9)

Country Link
US (2) US7052948B2 (enExample)
EP (2) EP1402567B1 (enExample)
JP (1) JP4331593B2 (enExample)
KR (1) KR100587997B1 (enExample)
CN (1) CN100372060C (enExample)
AT (1) ATE324670T1 (enExample)
DE (3) DE10131249A1 (enExample)
TW (1) TW575910B (enExample)
WO (1) WO2003003430A2 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1427010A1 (en) 2002-11-29 2004-06-09 STMicroelectronics S.r.l. Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
EP1577656A1 (en) * 2004-03-19 2005-09-21 STMicroelectronics S.r.l. Method for manufacturing a semiconductor pressure sensor
DE10326578B4 (de) * 2003-06-12 2006-01-19 Siltronic Ag Verfahren zur Herstellung einer SOI-Scheibe
DE102004030612B3 (de) * 2004-06-24 2006-04-20 Siltronic Ag Halbleitersubstrat und Verfahren zu dessen Herstellung
CN115023802A (zh) * 2020-03-27 2022-09-06 索泰克公司 包含在SiC制载体衬底上的单晶SiC制薄层的复合结构的制造方法

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JP4277481B2 (ja) * 2002-05-08 2009-06-10 日本電気株式会社 半導体基板の製造方法、半導体装置の製造方法
JP2004039735A (ja) * 2002-07-01 2004-02-05 Fujitsu Ltd 半導体基板及びその製造方法
TW582099B (en) * 2003-03-13 2004-04-01 Ind Tech Res Inst Method of adhering material layer on transparent substrate and method of forming single crystal silicon on transparent substrate
DE10336271B4 (de) * 2003-08-07 2008-02-07 Siltronic Ag Siliciumscheibe und Verfahren zu deren Herstellung
KR100605497B1 (ko) * 2003-11-27 2006-07-28 삼성전자주식회사 에스오아이 기판들을 제조하는 방법들, 이를 사용하여반도체 소자들을 제조하는 방법들 및 그에 의해 제조된반도체 소자들
JP4626175B2 (ja) * 2004-04-09 2011-02-02 株式会社Sumco Ｓｏｉ基板の製造方法
DE102004021113B4 (de) * 2004-04-29 2006-04-20 Siltronic Ag SOI-Scheibe und Verfahren zu ihrer Herstellung
US20100117152A1 (en) * 2007-06-28 2010-05-13 Chang-Woo Oh Semiconductor devices
KR100555569B1 (ko) 2004-08-06 2006-03-03 삼성전자주식회사 절연막에 의해 제한된 채널영역을 갖는 반도체 소자 및 그제조방법
KR100843717B1 (ko) * 2007-06-28 2008-07-04 삼성전자주식회사 플로팅 바디 소자 및 벌크 바디 소자를 갖는 반도체소자 및그 제조방법
DE102004041378B4 (de) * 2004-08-26 2010-07-08 Siltronic Ag Halbleiterscheibe mit Schichtstruktur mit geringem Warp und Bow sowie Verfahren zu ihrer Herstellung
DE602004010117D1 (de) * 2004-09-16 2007-12-27 St Microelectronics Srl Verfahren zur Hestellung von zusammengestzten Halbleiterplättchen mittels Schichtübertragung
DE102004054564B4 (de) * 2004-11-11 2008-11-27 Siltronic Ag Halbleitersubstrat und Verfahren zu dessen Herstellung
DE102004062356A1 (de) * 2004-12-23 2006-07-13 Siltronic Ag Halbleiterscheibe mit einer Halbleiterschicht und einer darunter liegenden elektrisch isolierenden Schicht sowie Verfahren zu deren Herstellung
DE102005000826A1 (de) 2005-01-05 2006-07-20 Siltronic Ag Halbleiterscheibe mit Silicium-Germanium-Schicht und Verfahren zu deren Herstellung
FR2884647B1 (fr) * 2005-04-15 2008-02-22 Soitec Silicon On Insulator Traitement de plaques de semi-conducteurs
EP1719993A1 (en) * 2005-05-06 2006-11-08 STMicroelectronics S.r.l. Integrated differential pressure sensor and manufacturing process thereof
CN1312328C (zh) * 2005-05-16 2007-04-25 浙江大学 用于纳米光子技术的单晶硅纳米膜的制备方法
US7629209B2 (en) * 2005-10-17 2009-12-08 Chunghwa Picture Tubes, Ltd. Methods for fabricating polysilicon film and thin film transistors
JP4342503B2 (ja) * 2005-10-20 2009-10-14 富士通マイクロエレクトロニクス株式会社 半導体装置および半導体装置の検査方法
KR101171189B1 (ko) * 2005-10-21 2012-08-06 삼성전자주식회사 더미 글래스 기판과 표시장치의 제조방법
FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede
US7799640B2 (en) * 2006-09-28 2010-09-21 Semiconductor Components Industries, Llc Method of forming a semiconductor device having trench charge compensation regions
KR100882932B1 (ko) 2007-06-11 2009-02-10 삼성전자주식회사 반도체 기판 및 그 제조 방법, 반도체 소자의 제조 방법 및이미지 센서의 제조 방법
US20090280588A1 (en) * 2008-05-06 2009-11-12 Leo Mathew Method of forming an electronic device including removing a differential etch layer
EP2161741B1 (en) * 2008-09-03 2014-06-11 Soitec Method for fabricating a semiconductor on insulator substrate with reduced SECCO defect density
US20100187572A1 (en) * 2009-01-26 2010-07-29 Cho Hans S Suspended mono-crystalline structure and method of fabrication from a heteroepitaxial layer
DE102009030298B4 (de) 2009-06-24 2012-07-12 Siltronic Ag Verfahren zur lokalen Politur einer Halbleiterscheibe
JP5585056B2 (ja) * 2009-11-19 2014-09-10 富士電機株式会社 Ｓｏｎ半導体基板の製造方法
JP5891597B2 (ja) * 2011-04-07 2016-03-23 富士電機株式会社 半導体基板または半導体装置の製造方法
CN102294655A (zh) * 2011-08-10 2011-12-28 开化美盛电子科技有限公司 一种粘固硅棒的载体的制作方法
US9406551B2 (en) * 2012-09-27 2016-08-02 Infineon Technologies Austria Ag Method for manufacturing a semiconductor substrate, and method for manufacturing semiconductor devices integrated in a semiconductor substrate
DE102015209889B4 (de) 2015-05-29 2018-12-06 Siltronic Ag Strukturierte Halbleiterscheibe und Verfahren zu deren Herstellung
US10833175B2 (en) * 2015-06-04 2020-11-10 International Business Machines Corporation Formation of dislocation-free SiGe finFET using porous silicon
WO2018026367A1 (en) * 2016-08-03 2018-02-08 Hewlett-Packard Development Company, L.P. Conductive wire disposed in a layer
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US10943813B2 (en) 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
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CN113471289B (zh) * 2021-05-19 2024-07-16 广东省大湾区集成电路与系统应用研究院 一种绝缘体上硅衬底及其制备方法、应用

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Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2280412A3 (en) * 2002-11-29 2011-02-16 STMicroelectronics S.r.l. Semiconductor substrate comprising at least a buried insulating cavity
EP1427010A1 (en) 2002-11-29 2004-06-09 STMicroelectronics S.r.l. Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
US7193256B2 (en) 2002-11-29 2007-03-20 Stmicroelectronics S.R.L. Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
US7585743B2 (en) 2002-11-29 2009-09-08 Stmicroelectronics S.R.L. Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
DE10326578B4 (de) * 2003-06-12 2006-01-19 Siltronic Ag Verfahren zur Herstellung einer SOI-Scheibe
US7122865B2 (en) 2003-06-12 2006-10-17 Siltronic Ag SOI wafer and process for producing it
EP1577656A1 (en) * 2004-03-19 2005-09-21 STMicroelectronics S.r.l. Method for manufacturing a semiconductor pressure sensor
US8575710B2 (en) 2004-03-19 2013-11-05 Stmicroelectronics S.R.L. Capacitive semiconductor pressure sensor
US8173513B2 (en) 2004-03-19 2012-05-08 Stmicroelectronics S.R.L. Method for manufacturing a semiconductor pressure sensor
DE102004030612B3 (de) * 2004-06-24 2006-04-20 Siltronic Ag Halbleitersubstrat und Verfahren zu dessen Herstellung
US7803695B2 (en) 2004-06-24 2010-09-28 Siltronic Ag Semiconductor substrate and process for producing it
US7491966B2 (en) 2004-06-24 2009-02-17 Siltronic Ag Semiconductor substrate and process for producing it
CN115023802A (zh) * 2020-03-27 2022-09-06 索泰克公司 包含在SiC制载体衬底上的单晶SiC制薄层的复合结构的制造方法
CN115023802B (zh) * 2020-03-27 2025-06-06 索泰克公司 包含在SiC制载体衬底上的单晶SiC制薄层的复合结构的制造方法

Also Published As

Publication number Publication date
EP1402567B1 (de) 2006-04-26
US20040142542A1 (en) 2004-07-22
US20060202310A1 (en) 2006-09-14
WO2003003430A2 (de) 2003-01-09
EP1626440B1 (de) 2007-11-14
EP1402567A2 (de) 2004-03-31
JP2004533726A (ja) 2004-11-04
ATE324670T1 (de) 2006-05-15
DE50206581D1 (de) 2006-06-01
DE50211238D1 (de) 2007-12-27
JP4331593B2 (ja) 2009-09-16
EP1626440A1 (de) 2006-02-15
US7417297B2 (en) 2008-08-26
KR100587997B1 (ko) 2006-06-08
CN1522461A (zh) 2004-08-18
TW575910B (en) 2004-02-11
US7052948B2 (en) 2006-05-30
KR20040015282A (ko) 2004-02-18
WO2003003430A3 (de) 2003-03-20
CN100372060C (zh) 2008-02-27

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