CN1860608A - 半导体装置、半导体装置的制造方法 - Google Patents
半导体装置、半导体装置的制造方法 Download PDFInfo
- Publication number
- CN1860608A CN1860608A CNA2003801106287A CN200380110628A CN1860608A CN 1860608 A CN1860608 A CN 1860608A CN A2003801106287 A CNA2003801106287 A CN A2003801106287A CN 200380110628 A CN200380110628 A CN 200380110628A CN 1860608 A CN1860608 A CN 1860608A
- Authority
- CN
- China
- Prior art keywords
- layer
- semiconductor device
- insulating layer
- forming
- ferroelectric capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/57—Capacitors with a dielectric comprising a perovskite structure material comprising a barrier layer to prevent diffusion of hydrogen or oxygen
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2003/016986 WO2005067051A1 (ja) | 2003-12-26 | 2003-12-26 | 半導体装置、半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1860608A true CN1860608A (zh) | 2006-11-08 |
CN100505265C CN100505265C (zh) | 2009-06-24 |
Family
ID=34746774
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2003801106287A Expired - Fee Related CN100505265C (zh) | 2003-12-26 | 2003-12-26 | 半导体装置、半导体装置的制造方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US20060261387A1 (zh) |
JP (1) | JP4610486B2 (zh) |
CN (1) | CN100505265C (zh) |
WO (1) | WO2005067051A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103378052A (zh) * | 2012-04-20 | 2013-10-30 | 台湾积体电路制造股份有限公司 | 半导体器件及其制造方法以及形成导电部件的方法 |
CN106558620A (zh) * | 2015-09-29 | 2017-04-05 | 联华电子股份有限公司 | 半导体元件及其形成方法 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7265403B2 (en) * | 2004-03-30 | 2007-09-04 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
CN100466260C (zh) * | 2004-04-14 | 2009-03-04 | 富士通微电子株式会社 | 半导体装置及其制造方法 |
JP2008198885A (ja) * | 2007-02-15 | 2008-08-28 | Fujitsu Ltd | 半導体装置およびその製造方法 |
WO2008120286A1 (ja) * | 2007-02-27 | 2008-10-09 | Fujitsu Microelectronics Limited | 半導体記憶装置、半導体記憶装置の製造方法、およびパッケージ樹脂形成方法 |
JP5280716B2 (ja) * | 2007-06-11 | 2013-09-04 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US8445913B2 (en) | 2007-10-30 | 2013-05-21 | Spansion Llc | Metal-insulator-metal (MIM) device and method of formation thereof |
JP2009182181A (ja) * | 2008-01-31 | 2009-08-13 | Toshiba Corp | 半導体装置 |
JP4792097B2 (ja) | 2009-03-25 | 2011-10-12 | 株式会社東芝 | 不揮発性記憶装置及びその製造方法 |
KR101854197B1 (ko) * | 2011-05-12 | 2018-06-21 | 삼성디스플레이 주식회사 | 표시 기판 및 이의 제조 방법 |
US9006808B2 (en) | 2013-09-09 | 2015-04-14 | Cypress Semiconductor Corporation | Eliminating shorting between ferroelectric capacitors and metal contacts during ferroelectric random access memory fabrication |
SG10201608814YA (en) | 2015-10-29 | 2017-05-30 | Semiconductor Energy Lab Co Ltd | Semiconductor device and method for manufacturing the semiconductor device |
JP6853663B2 (ja) * | 2015-12-28 | 2021-03-31 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US11075113B2 (en) * | 2018-06-29 | 2021-07-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal capping layer and methods thereof |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3417167B2 (ja) * | 1995-09-29 | 2003-06-16 | ソニー株式会社 | 半導体メモリ素子のキャパシタ構造及びその形成方法 |
JP2917916B2 (ja) * | 1996-06-12 | 1999-07-12 | 日本電気株式会社 | 強誘電体を用いた半導体集積回路とその製造方法 |
TW347570B (en) * | 1996-12-24 | 1998-12-11 | Toshiba Co Ltd | Semiconductor device and method for manufacturing the same |
JP2000133633A (ja) * | 1998-09-09 | 2000-05-12 | Texas Instr Inc <Ti> | ハ―ドマスクおよびプラズマ活性化エッチャントを使用した材料のエッチング方法 |
JP2002280528A (ja) * | 1999-05-14 | 2002-09-27 | Toshiba Corp | 半導体装置及びその製造方法 |
US6576546B2 (en) * | 1999-12-22 | 2003-06-10 | Texas Instruments Incorporated | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications |
US6485988B2 (en) * | 1999-12-22 | 2002-11-26 | Texas Instruments Incorporated | Hydrogen-free contact etch for ferroelectric capacitor formation |
JP2002176149A (ja) * | 2000-09-28 | 2002-06-21 | Sharp Corp | 半導体記憶素子およびその製造方法 |
US6734477B2 (en) * | 2001-08-08 | 2004-05-11 | Agilent Technologies, Inc. | Fabricating an embedded ferroelectric memory cell |
US6709875B2 (en) * | 2001-08-08 | 2004-03-23 | Agilent Technologies, Inc. | Contamination control for embedded ferroelectric device fabrication processes |
JP2003115576A (ja) * | 2001-10-03 | 2003-04-18 | Matsushita Electric Ind Co Ltd | 電子デバイスの製造方法 |
US6828161B2 (en) * | 2001-12-31 | 2004-12-07 | Texas Instruments Incorporated | Method of forming an FeRAM having a multi-layer hard mask and patterning thereof |
US20030143853A1 (en) * | 2002-01-31 | 2003-07-31 | Celii Francis G. | FeRAM capacitor stack etch |
US6713310B2 (en) * | 2002-03-08 | 2004-03-30 | Samsung Electronics Co., Ltd. | Ferroelectric memory device using via etch-stop layer and method for manufacturing the same |
JP4090766B2 (ja) * | 2002-03-19 | 2008-05-28 | 富士通株式会社 | 半導体装置の製造方法 |
JP4011391B2 (ja) * | 2002-05-01 | 2007-11-21 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JP3847683B2 (ja) * | 2002-08-28 | 2006-11-22 | 富士通株式会社 | 半導体装置の製造方法 |
JP2004349474A (ja) * | 2003-05-22 | 2004-12-09 | Toshiba Corp | 半導体装置とその製造方法 |
US7425512B2 (en) * | 2003-11-25 | 2008-09-16 | Texas Instruments Incorporated | Method for etching a substrate and a device formed using the method |
-
2003
- 2003-12-26 JP JP2005513102A patent/JP4610486B2/ja not_active Expired - Fee Related
- 2003-12-26 CN CNB2003801106287A patent/CN100505265C/zh not_active Expired - Fee Related
- 2003-12-26 WO PCT/JP2003/016986 patent/WO2005067051A1/ja active Application Filing
-
2006
- 2006-04-25 US US11/410,322 patent/US20060261387A1/en not_active Abandoned
-
2010
- 2010-06-22 US US12/821,080 patent/US20100261296A1/en not_active Abandoned
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103378052A (zh) * | 2012-04-20 | 2013-10-30 | 台湾积体电路制造股份有限公司 | 半导体器件及其制造方法以及形成导电部件的方法 |
CN103378052B (zh) * | 2012-04-20 | 2016-06-08 | 台湾积体电路制造股份有限公司 | 半导体器件及其制造方法以及形成导电部件的方法 |
CN106558620A (zh) * | 2015-09-29 | 2017-04-05 | 联华电子股份有限公司 | 半导体元件及其形成方法 |
CN106558620B (zh) * | 2015-09-29 | 2021-09-07 | 联华电子股份有限公司 | 半导体元件及其形成方法 |
Also Published As
Publication number | Publication date |
---|---|
US20060261387A1 (en) | 2006-11-23 |
WO2005067051A1 (ja) | 2005-07-21 |
CN100505265C (zh) | 2009-06-24 |
JP4610486B2 (ja) | 2011-01-12 |
US20100261296A1 (en) | 2010-10-14 |
JPWO2005067051A1 (ja) | 2007-07-26 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081107 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081107 Address after: Tokyo, Japan Applicant after: FUJITSU MICROELECTRONICS Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Japan's Kanagawa Prefecture Yokohama Patentee before: Fujitsu Microelectronics Ltd. |
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CP02 | Change in the address of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Tokyo, Japan Patentee before: Fujitsu Microelectronics Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090624 Termination date: 20191226 |
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CF01 | Termination of patent right due to non-payment of annual fee |