CN100466260C - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN100466260C CN100466260C CNB2004800413263A CN200480041326A CN100466260C CN 100466260 C CN100466260 C CN 100466260C CN B2004800413263 A CNB2004800413263 A CN B2004800413263A CN 200480041326 A CN200480041326 A CN 200480041326A CN 100466260 C CN100466260 C CN 100466260C
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- semiconductor device
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- interlayer dielectric
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- 238000000034 method Methods 0.000 title claims abstract description 39
- 239000004065 semiconductor Substances 0.000 title claims description 35
- 239000011229 interlayer Substances 0.000 claims abstract description 43
- 239000003990 capacitor Substances 0.000 claims abstract description 37
- 239000001257 hydrogen Substances 0.000 claims abstract description 34
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 21
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 9
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims abstract 11
- 239000002305 electric material Substances 0.000 claims description 35
- 238000009826 distribution Methods 0.000 claims description 33
- 238000004519 manufacturing process Methods 0.000 claims description 26
- 238000005036 potential barrier Methods 0.000 claims description 11
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 6
- 238000009832 plasma treatment Methods 0.000 claims description 6
- 229910052715 tantalum Inorganic materials 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 5
- 238000007254 oxidation reaction Methods 0.000 claims description 5
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 3
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 3
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 3
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 abstract description 6
- 230000004888 barrier function Effects 0.000 abstract 1
- 230000009977 dual effect Effects 0.000 abstract 1
- 230000003449 preventive effect Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 135
- 150000002431 hydrogen Chemical class 0.000 description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 239000010410 layer Substances 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 7
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 229910052791 calcium Inorganic materials 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- VRIVJOXICYMTAG-IYEMJOQQSA-L iron(ii) gluconate Chemical compound [Fe+2].OC[C@@H](O)[C@@H](O)[C@H](O)[C@@H](O)C([O-])=O.OC[C@@H](O)[C@@H](O)[C@H](O)[C@@H](O)C([O-])=O VRIVJOXICYMTAG-IYEMJOQQSA-L 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- 238000009941 weaving Methods 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/57—Capacitors with a dielectric comprising a perovskite structure material comprising a barrier layer to prevent diffusion of hydrogen or oxygen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2004/005302 WO2005101509A1 (ja) | 2004-04-14 | 2004-04-14 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1914734A CN1914734A (zh) | 2007-02-14 |
CN100466260C true CN100466260C (zh) | 2009-03-04 |
Family
ID=35150259
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800413263A Expired - Fee Related CN100466260C (zh) | 2004-04-14 | 2004-04-14 | 半导体装置及其制造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7781812B2 (zh) |
JP (1) | JP4893304B2 (zh) |
CN (1) | CN100466260C (zh) |
WO (1) | WO2005101509A1 (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008010758A (ja) | 2006-06-30 | 2008-01-17 | Fujitsu Ltd | 半導体装置及びその製造方法 |
KR100806034B1 (ko) * | 2006-12-05 | 2008-02-26 | 동부일렉트로닉스 주식회사 | Mim 캐패시터를 가지는 반도체 소자 및 그 제조방법 |
FR2916187B1 (fr) * | 2007-05-14 | 2009-07-17 | Marguerite Deperrois | Bouchon pour recipient formant reservoir d'additif |
JP2009064935A (ja) * | 2007-09-06 | 2009-03-26 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
KR101061353B1 (ko) * | 2008-12-24 | 2011-08-31 | 주식회사 하이닉스반도체 | 반도체 소자의 레저부아 캐패시터의 제조 방법 |
JP5423723B2 (ja) * | 2011-04-08 | 2014-02-19 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
CN102420105B (zh) * | 2011-06-07 | 2013-09-11 | 上海华力微电子有限公司 | 铜大马士革工艺金属-绝缘层-金属电容制造工艺及结构 |
CN102420174B (zh) * | 2011-06-07 | 2013-09-11 | 上海华力微电子有限公司 | 一种双大马士革工艺中通孔填充的方法 |
CN102420177A (zh) * | 2011-06-15 | 2012-04-18 | 上海华力微电子有限公司 | 一种超厚顶层金属的双大马士革工艺制作方法 |
KR102546639B1 (ko) | 2017-11-21 | 2023-06-23 | 삼성전자주식회사 | 반도체 장치 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822986A (ja) * | 1994-07-05 | 1996-01-23 | Sony Corp | 絶縁膜の成膜方法 |
JP2001244426A (ja) * | 1999-12-22 | 2001-09-07 | Texas Instr Inc <Ti> | 強誘電メモリ・セルの製造方法 |
JP2001358309A (ja) * | 1999-05-14 | 2001-12-26 | Toshiba Corp | 半導体装置 |
JP2004079596A (ja) * | 2002-08-12 | 2004-03-11 | Renesas Technology Corp | 半導体装置 |
US20040046185A1 (en) * | 2002-08-30 | 2004-03-11 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10135425A (ja) * | 1996-11-05 | 1998-05-22 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2000082684A (ja) | 1998-07-01 | 2000-03-21 | Toshiba Corp | 半導体装置の製造方法 |
US6611014B1 (en) | 1999-05-14 | 2003-08-26 | Kabushiki Kaisha Toshiba | Semiconductor device having ferroelectric capacitor and hydrogen barrier film and manufacturing method thereof |
JP2001284448A (ja) | 2000-03-29 | 2001-10-12 | Seiko Epson Corp | 半導体装置及びその製造方法 |
KR100442103B1 (ko) * | 2001-10-18 | 2004-07-27 | 삼성전자주식회사 | 강유전성 메모리 장치 및 그 형성 방법 |
US6500678B1 (en) * | 2001-12-21 | 2002-12-31 | Texas Instruments Incorporated | Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing |
US6713342B2 (en) * | 2001-12-31 | 2004-03-30 | Texas Instruments Incorporated | FeRAM sidewall diffusion barrier etch |
CN100505265C (zh) * | 2003-12-26 | 2009-06-24 | 富士通微电子株式会社 | 半导体装置、半导体装置的制造方法 |
-
2004
- 2004-04-14 CN CNB2004800413263A patent/CN100466260C/zh not_active Expired - Fee Related
- 2004-04-14 JP JP2006512220A patent/JP4893304B2/ja not_active Expired - Fee Related
- 2004-04-14 WO PCT/JP2004/005302 patent/WO2005101509A1/ja active Application Filing
-
2006
- 2006-07-06 US US11/480,906 patent/US7781812B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822986A (ja) * | 1994-07-05 | 1996-01-23 | Sony Corp | 絶縁膜の成膜方法 |
JP2001358309A (ja) * | 1999-05-14 | 2001-12-26 | Toshiba Corp | 半導体装置 |
JP2001244426A (ja) * | 1999-12-22 | 2001-09-07 | Texas Instr Inc <Ti> | 強誘電メモリ・セルの製造方法 |
JP2004079596A (ja) * | 2002-08-12 | 2004-03-11 | Renesas Technology Corp | 半導体装置 |
US20040046185A1 (en) * | 2002-08-30 | 2004-03-11 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
CN1914734A (zh) | 2007-02-14 |
US7781812B2 (en) | 2010-08-24 |
JP4893304B2 (ja) | 2012-03-07 |
JPWO2005101509A1 (ja) | 2008-03-06 |
US20060249768A1 (en) | 2006-11-09 |
WO2005101509A1 (ja) | 2005-10-27 |
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