CN1828881A - 电子装置 - Google Patents
电子装置 Download PDFInfo
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- CN1828881A CN1828881A CNA2006100080340A CN200610008034A CN1828881A CN 1828881 A CN1828881 A CN 1828881A CN A2006100080340 A CNA2006100080340 A CN A2006100080340A CN 200610008034 A CN200610008034 A CN 200610008034A CN 1828881 A CN1828881 A CN 1828881A
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- metal film
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- metal
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
- B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
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Abstract
根据本发明的电子装置具备由夹在各自形成的连接部分之间的连接层连接且热膨胀率不同的一对构件,上述连接层是通过使由彼此不同的材料在上述连接部分分别形成的金属层仅在其接触界面的附近熔融的该金属层间的扩散反应形成的。上述金属层的至少一个是通过电镀形成,这样,以可吸收上述一对构件的热膨胀率差的充分厚度形成上述连接层。由于上述一对构件连接后的上述连接层的熔融温度比上述扩散反应中的其熔融温度升高,所以能够防止由于在该连接后进行的加热处理而引起的该连接层的破损,能够确保电子装置的高可靠性。
Description
技术领域
本发明涉及以车载用电源组件为代表的电子装置,是关于将半导体元件等电子器件组装在衬底上的结构。
背景技术
由于对环境问题的关注等,以混合动力车为代表的利用电动机驱动的汽车今后会越来越普及。另外,在以往由液压控制的动力转向和刹车等上也有采用使用电动机的电动控制单元(Electric Control Unit,ECU)的倾向。电动机控制用的ECU使用流动大电流的IGBT(Insulated Gate Bipolar Transistor)芯片和FET(Field Effect Transistor)芯片,从该芯片(半导体元件等电子器件)散发数十瓦~数百瓦的热。因此,这些芯片和装备了这些芯片的电子装置需要进行水冷却或空气冷却。在图1所示的电动机控制用ECU模块的剖面构造的一例中,FET芯片1的下部漏电极通过焊锡3连接在高热传导的陶瓷衬底7的电极5上,该陶瓷衬底7由高热传导的树脂粘接剂11粘接在散热器上。FET芯片1的上部栅电极及源电极是由多个引线接合13连接在陶瓷衬底7上的规定的电极15上。需要这样的多个引线接合的电子装置的构造,由于其制造工艺过程需要很大的设备投资,另外,其制造本身需要长时间及高成本。进而由于需要使引线接合用的电极15的表面保持清洁,所以芯片1钎焊连接在衬底7上后,需要另外的清洗工序。
这样,由于装备在电子装置(例如,电源组件(Power Module))上的FET芯片的发热量有增大的倾向,所以希望该构造具有更高的散热性。这样的要求不仅限于汽车用电子装置(车载用电源组件),在铁路车辆的变换器、发电机、照明器具和热器具的控制系统等上使用的其他的电子装置上也是同样。在这些电子装置的制造中,如果能够废除上述的引线接合工序,则可望大幅度降低制造成本。
通过图2所示的以往的电子装置构造能达到上述目标。即:衬底7使用热传导率高的陶瓷,用焊锡5将芯片1装备在该陶瓷衬底7上,进而用焊锡将该陶瓷衬底7连接在散热用散热器19上。作为替代通常的引线接合的连接构件,使用热传导性良好的Cu(铜)等形成的金属制框架21,用焊锡将其与芯片电极及衬底7上的电极23连接。
另外,与焊接技术相关的报告也刊载在下述非专利文献1中。
非专利文献1:Ricky W.Chuang et.al 51th Electronic Components andTechnology Conference,P.671-674
发明内容
实现图2所示构造的制造工艺存在以下的问题。首先,焊接部从以往的1层增加为3层。在这里,将即便是多个焊接部但在同时进行连接没有问题的部位称为1层的焊接部。对具有这样的多层的焊接部的构造,需要按适当的顺序完成焊接。例如,首先用焊锡A形成芯片1与衬底7的连接部3,其次,分别同时用焊锡B形成芯片1与金属制框架21的连接部25及设于衬底7上面的电极15与金属制构架21的连接部23。最后,用焊锡C连接衬底7和散热器19(替代上述树脂粘接剂的连接部11)。假设不使用3种焊锡A~C,而用同一焊锡同时进行连接,则有时会由于金属制构架21的旋转等而发生连接位置的偏移,由于芯片1的旋转等而发生连接位置的偏移,以及上述焊接部的断路(或导通不良)、电路短路(短路)等各种问题。另外,如果用同一焊锡按上述的顺序进行连接,由于电子装置要经受最多达3次的加热过程,所以源于设于此的接合部(该焊锡材料层)和电极的金属间化合物生长,导致电子装置的可靠性低下等问题。
如果使用焊锡A~C这3种焊锡,则能够解决这样的问题。例如,如果作为焊锡A使用Pb(铅)-10%Sn(锡)(熔点:大致320℃),作为焊锡B使用Sn-3%Ag(银)-0.5%Cu(熔点:大致217℃),作为焊锡C使用Sn-37%Pb(熔点:183℃),则不会发生这样的问题,能按上述的顺序将芯片1与衬底7、芯片1及衬底7的电极15与金属构架21、以及衬底7与散热器19顺次连接并组装电子装置。但是,由于要求不包含含有Pb的焊锡材料的电子装置的市场需求,组合上述熔点不同的3种焊锡材料而制造出的电子装置不具有商品价值,即便替代该焊锡材料的组合只使用不含Pb的焊锡材料制造电子装置,也很难充分确保其可靠性。
针对这样的问题,如果利用例如上述非专利文献1中公开的技术,则在理论上能够仅用不含Pb的焊锡材料进行如上所述的3层的连接。即:按0.03微米(μm)的厚度在电子器件一侧电极上形成Cr(铬),在其上按5微米的厚度形成Sn,按1.11微米的厚度形成In(铟),使其相互接触,在该叠层构造的最表面上按0.05微米的厚度形成Au(金)。在衬底一侧的电极上按0.03微米的厚度形成Cr,在Cr层的最表面上按0.05微米的厚度形成Au。在适当的条件下,通过在Sn和In的共晶温度(118℃)以上的温度在例如150℃下加热,从Sn和In的界面附近产生熔融,进而使固相的Sn的整体进行In的扩散,完成连接。连接部的Sn和In的合金部分由于呈现富Sn的组成,所以该合金部分的熔融温度上升,在例如175℃以下的温度不再熔融。
即使与移动机器等的民生用品比较也要求非常高的可靠性的车载用电子设备,在如上述的连接中会产生以下的问题。首先,在连接了Si芯片(在硅基体材料上形成的电子器件)和衬底的电子装置中,在该电子装置(其包含的Si芯片和衬底的连接部)从连接Si芯片和衬底时的温度向常温(室温)冷却的过程中,会由于Si和衬底的热膨胀率差而发生Si芯片的损坏。另外,在衬底与散热金属板(散热器)的连接上,即便仅在100周期以下反复进行按1周期在-55~150℃范围使该电子装置的氛围气温度变化的耐久温度循环试验,也会由于衬底和散热金属板的热膨胀率的差,在它们之间的连接层内发生损坏。
本发明为了能够实现由多层焊接部组装电子装置的组装构造,并提高这些焊接部的可靠性,提供以下的手段。
即,为了降低芯片等构件和与其连接和固定相关的部分产生的应力、应变,本发明使2个构件之间形成的连接部的厚度(高度)增大。将在实施例中后述的方法是:在2个构件例如在Si芯片和衬底上形成组成各自不同的金属层,通过使这些金属层接触并使双方的金属层的构成元素扩散来连接该2个构件,在该方法中,本发明是在该2个构件的至少一方(例如Si芯片一侧或衬底一侧)通过电镀等形成厚的该金属层。这样,通过充分确保由分别设于2个构件上的金属层形成的连接部(连接层)的最终的连接厚度,并使上述应力和应变被该连接部吸收,由此避免例如Si芯片的损坏和连接部的损坏。另外,实现本发明所需的上述金属层的电镀工序的时间和随之增加的成本是很小的。
在上述的非专利文献1中公开的技术中,由于是在电子器件及衬底二者上通过溅射形成上述金属层,所以按数微米以上的厚度形成各金属层实质上很困难。本发明鉴于在非专利文献1中被忽视的连接部的可靠性(例如对温度变化的耐性),提供适宜实现可实用的电子装置的构造。
根据本发明的电子装置的一个例子配备有电子器件以及衬底,所述的电子器件具备第1电极和在该第1电极的表面形成的至少1层的第1金属膜,所述的衬底具备与上述电子器件的上述第1电极电连接的第2电极和在该第2电极表面形成的至少1层的第2金属膜。上述电子器件和上述衬底是通过以下方式连接,即,使上述第1金属膜的最表面和上述第2电极的最表面接触,在第1金属膜及第2金属膜的各自的熔融温度以下且在第1金属膜和第2金属膜的共晶温度以上使第1金属膜和第2金属膜的最表面接触的界面附近熔融,通过第1金属膜和第2金属膜的扩散反应在界面附近形成包含第1金属膜及第2金属膜的各个构成元素的合金部分,由此实现连接。连接了上述电子器件和上述衬底后的上述合金部分的熔融开始温度,比连接电子器件和衬底时的上述界面附近的上述第1金属膜和上述第2金属膜的熔融开始温度升高(变高)。而且,上述第1金属膜及上述第2金属膜中的至少一方包含通过电镀形成的至少1个金属层。
代替在上述第1金属膜及上述第2金属膜中的至少一方包含通过电镀形成的至少1个金属层,也可以在第1金属膜及第2金属膜中的至少一方包含形成了10微米以上的厚度的至少1个金属层。另外,还可以使通过第1金属膜及第2金属膜在电子器件与衬底之间形成的连接部的厚度达到20微米以上。
作为用于连接的一对构件的一个例子,例示了电子器件和衬底。第1金属膜及上述第2金属膜不限于由一层的金属层形成,也可以叠层形成由不同的材料组成该一方或双方的多个金属层。
作为上述的电子装置的构造特征的一例,例举了上述第1金属膜和上述第2金属膜接触的上述界面的附近存在的稳定的金属间化合物。
作为上述电子器件,在与形成了上述第1电极的主面相反一侧的另外的主面上使用形成了第3电极的Si功率器件,在设有上述衬底的上述第2电极的主面通过金属引线形成与上述第3电极电连接的第4电极时,分别在上述引线上形成上述第1金属膜,在上述第3电极上形成上述第2金属膜。而且,使分别形成的上述第1金属膜的最表面和上述第2电极的最表面接触,在上述熔融温度以下且在第1金属膜和第2金属膜的共晶温度以上使第1金属膜及第2金属膜的最表面接触的界面附近熔融,通过第1金属膜和第2金属膜的扩散反应在界面附近形成包含第1金属膜及第2金属膜的各个构成元素的合金部分,由此连接上述引线和上述第3电极,使上述引线和上述第3电极连接后的上述合金部分的熔融开始温度比连接引线和第3电极时的上述界面附近的上述第1金属膜与上述第2金属膜的熔融开始温度高。
上述的根据本发明的电子装置的一例,是通过被各个主面夹住的接合层接合具有彼此不同的热膨胀率的第1构件和第2构件,该接合层至少是由第1金属及与该第1金属不同的第2金属形成的,该电子装置例如如同下面所述。第一,该接合层中的第1金属的浓度是,相对于接合层的厚度方向(从第1构件的主面到第2构件的主面的方向)的中心来说在第2构件一侧低下。第二,相对于上述接合层的厚度方向,上述第1构件一侧的区域包括上述第1金属与上述第2金属的浓度比彼此不同的2种的共晶组织(晶粒),第2金属的组织(晶粒)残留在相对于其厚度方向的中心接近第2构件的另外的区域。第三,上述接合层包括:至少包含上述第1金属和上述第2金属的多个固溶体的组织;以及第1金属和第2金属的浓度比彼此不同的2种类的共晶组织;该共晶组织分别多个地离散存在于多个固溶体的组织(晶粒)之间(间隙中)。
根据本发明的电子装置的另外的一例是设置有:衬底、装载在衬底的一方的主面上的Si功率器件、以及连接在衬底的另一方的主面上的金属板;在与上述Si功率器件的上述衬底的一方的主面相反一侧的面上形成的第1电极和在衬底的一方的主面上形成的第2电极是由导电金属材料电连接的。而且,在导电金属材料与第2电极之间插入金属制的块,对于导电金属材料不进行在上述衬底的厚度方向上弯曲的加工。
根据本发明,能够提供具有充分可靠性的电子装置,且能够降低制造成本。
附图说明
图1是现有技术中的引线接合型(wire bonding type)的电动机控制用ECU的剖面图;
图2是现有技术中的引线(lead)连接型的电动机控制ECU的剖面图;
图3是表示现有技术中的通常的引线(lead)材料的结构例的图;
图4是根据本发明的电子装置上装载的芯片及其电极结构的剖面图;
图5是根据本发明的电子装置上使用的衬底的一部分及其电极结构的剖面图;
图6是根据本发明的电子装置上使用的基体金属的一部分及其电极结构的剖面图;
图7是根据本发明的电子装置上使用的隔离部件及其电极结构的剖面图;
图8(a)及图8(b)是在根据本发明的电子装置的制造方法中,将芯片及隔离部件连接在衬底上的工艺过程的示意图;
图9(a)~图9(d)是根据本发明的电子装置的一例的电动机控制用ECU的制造工艺过程的示意图;
图10是根据本发明的电动机控制ECU的剖面图;
图11是本发明的实施例2中说明的电动机控制ECU的剖面图;
图12(a)~12(e)是在本发明的实施例3中的根据本发明的电子装置(连接部)的特征的说明中参照的说明图,其中,图12(a)表示Si芯片(第1构件)被连接在衬底(第2构件)上之前的断面形状,图12(b)表示由在Si芯片的电极(连接部)上形成的金属A与在衬底的配线层(连接部)上形成的金属B的扩散反应形成的接合层(连接层)的剖面,图12(c)表示接合层中的金属B的浓度的分布曲线(实线)和其假定曲线(虚线),图12(d)表示接合层中的晶粒分布的一例,图12(e)表示该接合层中的晶粒分布的另一例。
具体实施方式
以下说明本发明的实施方式。
实施例1
下面,用实现具有充分的可靠性的电动机控制用电动控制单元(以下简称为ECU)的适宜的实施例说明本发明的电子装置。
首先,图4中示出在5mm见方、0.3mm厚度的Si基体材料上形成了MOS-FET(Metal-Oxide Semiconductor Field Effect Transistor)的电子器件(以下称为MOS-FET芯片或Si芯片)的示意图。由于该MOS-FET芯片在Si基体材料1的厚度方向上形成了流动载流子(电子和空穴)的通道,所以在Si基体材料1的2个主面(在图4中是上面和下面)上分别形成夹着该通道的2个电极(源电极和漏电极)。另外,控制通道中的载流子流动的栅电极在图4中被省略了。具有这样的结构的MOS-FET芯片,例如在电源组件等中可以用来作为转换大电流的功率器件。
作为MOS-FET芯片的源电极,在Si基体材料的一方的主面(上面)上形成的铝电极25的上面,分别形成3微米(μm)厚度的Ni(镍)镀层29、0.05微米厚度的Au镀层31。在Si芯片背面(Si基体材料1的另一方的主面,上述一方的主面的相反一侧)上作为漏电极形成的Ag电极27上,同样也分别形成3微米厚度的Ni镀层29、0.05微米厚度的Au镀层31。在这里,Ni及Au镀层是通过化学镀形成的。形成较厚的该镀Ni层时,可提高连接部的可靠性,如果为此目的而进行电镀,则能够加快镀层形成速度,降低Si芯片的制造成本。
其次,在图5中示出装载了上述MOS-FET芯片的衬底的示意图。衬底使用由热传导率高的Si3N4(氮化硅)组成的厚度0.3mm的陶瓷7作为绝缘层,在该陶瓷(以下也简称为“衬底”)7的一方的主面上作为配线及电极层形成厚度0.5mm的Cu 5的图案。在陶瓷7的背面(陶瓷7的另一方的主面,上述一方的主面的相反一侧),为了防止由于比陶瓷7厚的Cu 5的图案造成的陶瓷(衬底)7的翘曲,例如按0.4mm的厚度形成考虑了Cu 5的配线密度和图案的厚度的Cu整体连续图案(solid pattern)9。在装载芯片用的电极(Cu5的图案)及背面的Cu整体连续图案9上进一步分别利用电镀形成厚度30微米的Sn膜33。在Sn膜33的上面利用溅射形成厚度1微米的In膜35,进而在In膜35上利用溅射形成防止表面氧化用的厚度0.05微米的Au膜31′。图4中所示的MOS-FET芯片1是,在该上述另一方的主面上形成的漏电极27与在衬底(陶瓷)7的另一方的主面上形成的Cu 5的图案之一连接。
接下来,在图6中示出与上述衬底7的上述另一方的主面(Cu的整体连续图案9)连接并且还作为散热器发挥作用的金属板(以下称为基体金属)的示意图。在承担上述MOS-FET芯片1的散热及上述衬底7的增强的2mm厚度的Cu基体37上的衬底7的装载位置上,利用电镀形成厚度30微米的Sn膜33。在Sn膜33的上面利用溅射形成厚度1微米的In膜35,进而在In膜35上利用溅射形成防止表面氧化用的厚度0.05微米的Au膜31′。另外,也可以根据情况不形成图6所示的Cu基体37和Sn膜33之间的Ni电镀层29。
作为连接Si芯片1的源电极25(29、31)和衬底7上的电极5(33、35、31′)的构件即引线材料,使用Cu-Mo合金(例如Cu:40%、Mo(钼):60%)。引线材料的厚度为0.4mm,与后述的隔离部件及芯片电极的图案一起,通过电镀在引线材料上选择性地形成厚度30微米的Sn膜。在其上面,利用溅射形成1微米厚度的In,再利用溅射在In膜上形成防止表面氧化用的厚度0.05微米的Au膜。
隔离部件是与Si芯片1大致相同厚度的部件,通过使用该部件,不用将引线材料进行弯曲加工,就能够进行源电极25与衬底的电极5的电连接。如果不使用隔离部件,Si芯片1上的垫片(作为源电极例示的构件25、29、31)和衬底上的垫片(作为电极例示的构件5、33、35、31′)产生的高低差大约相当芯片1的厚度左右,所以,将引线和芯片上的垫片之间以及引线和衬底上面的垫片之间用焊锡进行连接(也包括本实施例以外的一般的焊接)的场合,如图3所示,需要对引线进行能够吸收上述高低差的弯曲加工。本发明人发现,在实际进行了弯曲加工的引线上可能产生裂纹等缺陷。这种缺陷使得合格率降低,导致成本提高,所以组合采用隔离部件和无弯曲加工的引线材料,可提高电子装置的可靠性。
上述的隔离部件的示意图如图7所示。该隔离部件与引线材料相同,具备由Cu-Mo合金(例如Cu:40%,Mo:60%)组成的厚度0.3mm的基体材料(块)39。在该基体材料39的两面即与隔离部件上的引线的连接面及与衬底的连接面上,分别形成3微米厚度的Ni镀层29、0.05微米厚度的Au镀层31。
如上所述,在电极和与其类似的金属构件25、27、5、9、29、39上通过电镀或溅射形成了金属层的Si芯片1、衬底7、金属板37、隔离部件39,分别按如下所述相互连接。首先,在衬底7上将Si芯片1和隔离部件39装载在设于衬底7的上述一方的主面上的规定的垫片(5、33、35、31′)上,在氢还原气氛中于150℃下加热30分钟。在图8中简单地示出该工艺过程。Si芯片1的漏电极27及隔离部件(基体材料)39分别与衬底7的电极5连接后,漏电极27及隔离部件(基体材料)39和衬底7的电极5之间夹着的Ni电镀层29的一部分、Au层31、31′、In膜35以及Sn电镀层33组成的叠层结构成为以Sn-In合金为主要成分,包含Ni、Sn-Ni化合物、Au-Sn化合物、Au-In化合物的金属层41。
由于该金属层41宏观上具备富Sn的组成,所以在将上述Si芯片1及隔离部件39连接在衬底7上时(初期连接时),其熔融温度比上述叠层结构熔融的温度(150℃左右)升高。在图9(a)中,示出了Si芯片1及隔离部件39连接在衬底7上后的结构,上述金属层41与Ni镀层29一起作为连接部43显示(漏电极27由于很薄而省略了)。在如此将Si芯片1及隔离部件39连接在衬底7上的结构中,可确认在Si芯片1上不会产生裂纹等损坏。
下面,如图9(b)所示,从Si芯片1上面的垫片(25、29、31)跨越隔离部件39上面的垫片(29、31)配置引线21(例如以金属箔或金属板的形式供给),在与上述的连接工序相同的条件(氢还原氛围气,150℃、30分钟)下加热。这时,由于衬底7和Si芯片1及隔离部件39之间的连接部41如前所述熔融温度上升,所以不会熔融。另外,图9(b)显示将引线21与Si芯片1及隔离部件39连接后的结构,通过在Si芯片1及隔离部件39上形成的Ni镀层29及Au镀层31、以及在引线21上形成的Sn镀膜(厚度30微米)、In膜(厚度1微米)、以及Au镀膜(厚度0.05微米)的熔融产生的相互间的扩散,形成各个连接部44(源电极25由于很薄而省略了)。
进而,将如图9(b)所示连接了Si芯片1、隔离部件39及引线21的衬底7,如图9(c)所示装载在上述的金属板(Cu基体)37的规定位置(29、33、35、31′)上,同样进行150℃、30分钟的加热。在该加热工序中,先前形成的连接部43、44不熔融。在衬底7的上述另一方的主面上形成的金属层(Cu的整体连续图案9,也可以图案形成配线)和金属板37之间,通过在金属层9上形成的Sn镀层33、In膜35、及Au层31′,以及在金属板37上形成的Ni镀层29、Sn镀层33、In膜35、及Au膜31′的熔融产生的相互间的扩散,形成连接部45。
最后,如图9(d)所示,用树脂17将固定在金属板37上的衬底7、Si芯片1、隔离部件39以及引线21整体进行模制成型。在图9(a)至图9(d)中示出这一系列的制造工艺过程的概略情况,在图10中示出结果所得到的最终结构。但在图10中省略了与上述连接相关的金属层的详细的结构。
对于这样完成了的模块(参照图10),进行每1个周期从-55~150℃的温度变化的温度循环试验,反复进行了1000次温度循环。其结果,在上述的连接部43、44、45上没有产生损坏或缺陷,能够确认该模块具有充分的可靠性。在进行另外模拟时,可以得知,对芯片1和衬底7的连接部43,如果芯片1的尺寸为1mm或以上,与连接部43的厚度为5微米的模块相比较,将其做成10微米的模块的可靠性提高到2倍或以上,将其做成30微米的模块的可靠性提高到5倍或以上。同样可以确定,对其他的连接部44、45,通过将连接部厚度做成10微米或以上,模块的可靠性提高到2倍或以上,作为车载电子设备具有充分的可靠性的可能性提高。
实施例2
以下用图11说明本发明的电子装置的另外的实施例。本实施的电子装置(模块)与实施例1的不同在于,取代由绝缘材料组成的衬底7,使用由树脂46将金属基体(例如Cu基体)47的一方的主面绝缘了的衬底(为了方便称为Cu基体衬底)。该Cu基体衬底由于要求在电子装置的结构整体上提高散热性,所以作为绝缘树脂46使用了热传导率为2W/m·K或以上的材料。由于在衬底内有实施例1中的基体金属37,所以在衬底以外不需要另外设置散热、增强用的基体衬底,因此,能够减少一个连接部的层次,由于工序减少可望带来成本降低。
另外,通过上述的Cu基体衬底取代了装备Al金属基体的衬底,虽然比Cu基体衬底的散热性略为低下,但这样能够达到电子装置整体的轻量化。
实施例3
在这里,关于上述的实施例1及实施例2,参照图12考察根据本发明的电子装置上的连接部的特征。
在被接合的2个构件的各自的热膨胀率不同的场合,在它们之间形成的连接部(以下称为接合层)的厚度抑制该2个构件的一方的热膨胀(变形)对另一方产生的影响。图12(a)中例示的Si芯片和衬底的场合,前者的热膨胀率是由硅的热膨胀率支配,后者的热膨胀率是由成为衬底的主要构成要素的例如陶瓷材料、玻璃纤维环氧树脂材料、金属板的热膨胀率支配。因此,接合层至少是按10μm,最好是按20~100μm的厚度形成,这也是工业上要求的。该厚度tL依赖于电子装置所控制的电流量及其使用环境,反映例如用功率组件中的弱电设备不可见的构件的温度造成的变形。因此,在如图12(a)所示的2个构件上分别形成、并在其间如图12(b)所示形成接合层的金属A及与该金属A组成不同的金属B中的至少一方,最好是通过电镀形成。另外,根据需要,也可以通过电镀形成金属A及金属B双方。采用非专利文献1中记载的溅射法,以充分的厚度形成这些金属A、金属B中的至少一方在工业上是不可能的,不能确保符合上述要求的接合层的厚度。
一方面,在形成接合层这种现象中,本发明不一定要如非专利文献1中所述,通过2种金属的固相-液相扩散使接合层的组成变成一样。例如,即便接合层的组成在其厚度方向(换言之,从被接合的2个构件的一方向另一方)变化,也能得到上述的效果。当金属A为Sn,金属B为In,形成显示Sn(85%)-In(15%)的熔融温度的接合层的场合,按非专利文献1的方法,金属A和金属B的扩散充分进行,因此在接合层的整个区域形成了Sn-In的γ固溶体的组织(晶粒,稳定的金属间化合物),接合层一致显示该组成或其近旁的组成。
一方面,如果从宏观上领会本发明,则金属A和金属B的熔融仅在它们接触的界面及其附近产生。可以认为,这是金属A和金属B连接时的加热温度能够可以低于连接得到的接合层熔融温度的理由。在图12(c)中显示的接合层中的金属B的浓度分布的一例中,其值在接合前的金属B一侧(接合层与衬底的配线的界面一侧)是一定的,在接合前的金属A一侧(接合层与Si芯片的电极的界面一侧)也是在金属A和金属B接触界面附近保持一定,但在接合层与Si芯片的电极的界面一侧如果接近到一定程度,则会急剧减少。金属A一侧的金属B的浓度的这种变化,与按Fick定律设想描绘金属B的元素从金属A与金属B的接触界面向金属A扩散的虚线的曲线不同。
另外,接合层中的晶粒的分布也可以考虑图12(d)及图12(e)的2例。在图12(d)的场合,在发生了金属A和金属B相互扩散的区域,形成了由金属A的浓度高的晶粒和金属B的浓度高的晶粒形成的共晶组织,在其附近区域,与金属A和金属B的浓度的比率相应,单位体积中的前者的晶粒和后者的晶粒的个数不同。当金属A为Sn,金属B为In时,前者成为γ固溶体,后者成为β固溶体。可是,在接合层的与Si芯片的电极的界面一侧残留有金属B没有充分扩散的区域,残留金属A自身的组织。
在图12(e)的场合,取决于金属A的厚度tA与金属B的厚度tB的组成的固溶体(金属A的浓度高的固溶体)形成初晶,上述的共晶组织进入其间隙。进而,当金属A和金属B之间存在所谓的稳定的金属间化合物时,有时候在金属A和金属B充分相互扩散的区域中只存在由金属A和金属B而形成的金属间化合物,金属A和金属B的组成比也会一样。另一方面,在该扩散不充分的区域,金属A和金属B的组成比根据共晶组织或金属间化合物以外的部分即固溶体的体积或数量而变化。
参照图12(c)~图12(e)说明的各个事例,不仅在分别作为金属A使用Sn、作为金属B使用In形成的接合层上能够发生,在金属A使用Sn、金属B使用Bi(铋)形成的接合层,在金属A使用Ag、金属B使用Sn形成的接合层,以及在金属A使用Cu、金属B使用Sn形成的接合层中也能够发生。
另外,如图12(a)所示,也可以在被连接的2个构件的一方(在这里是Si芯片)上将金属A的膜和与金属A不同的金属C的膜进行叠层,在将该一方的构件与另一方的构件(在这里是衬底)接合之前,在金属A与金属B之间使各个元素扩散。如果比金属A的膜更薄地形成金属C的膜,则该金属C的膜的最表面是由金属A和金属C的固溶体组成的金相组织形成。即便在该固溶体与该另一方的构件上形成的金属B之间使分别含有的元素扩散,也能够发生参照图12(c)~图12(e)说明了的各个事例。在这种场合,由于只要金属A和金属C的固溶体的组成与金属B的组成不同即可,所以金属C可以是与金属B相同的材料,也可以是与金属B不同的材料。在图12(a)中,虽然是通过电镀形成比金属B的膜及金属C的膜更厚的金属A的膜,但也可以通过电镀形成较厚的金属B的膜,通过溅射形成比金属B的膜更薄的金属A的膜及金属C的膜。
从参照图12(c)~图12(e)说明了的各个事例中可以得出结论:根据接合层的厚度的这种变化,是将该接合层整体的熔融温度提高到期望值,进而吸收因被接合的2个构件的热膨胀率差而从其一方向另一方施加的应力和应变的一个因素。
本发明也能够应用到汽车用电子设备、铁道用变换器等产业用发电机等上。
Claims (6)
1.电子装置,其特征在于:
具备电子器件以及衬底,所述的电子器件具有第1电极和在该第1电极的表面形成的至少1层的第1金属膜,所述的衬底具有与上述电子器件的上述第1电极电连接的第2电极和在该第2电极表面形成的至少1层的第2金属膜;
上述电子器件和上述衬底是通过以下方式连接,即,使上述第1金属膜的最表面和上述第2电极的最表面接触,在第1金属膜及第2金属膜的各自的熔融温度以下且在第1金属膜和第2金属膜的共晶温度以上使第1金属膜和第2金属膜的最表面接触的界面附近熔融,通过第1金属膜和第2金属膜的扩散反应在该界面附近形成包含第1金属膜及第2金属膜的各个构成元素的合金部分,由此实现连接;
连接了上述电子器件和上述衬底后的上述合金部分的熔融开始温度,比连接该电子器件和衬底时的上述界面附近的上述第1金属膜和上述第2金属膜的熔融开始温度升高,而且,上述第1金属膜及上述第2金属膜中的至少一方包含通过电镀形成的至少1个金属层。
2.电子装置,其特征在于:
具备电子器件以及衬底,所述的电子器件具有第1电极和在该第1电极的表面形成的至少1层的第1金属膜,所述的衬底具有与上述电子器件的上述第1电极电连接的第2电极和在该第2电极表面形成的至少1层的第2金属膜;
上述电子器件和上述衬底是通过以下方式连接的,即,使上述第1金属膜的最表面与上述第2电极的最表面接触,在该第1金属膜及该第2金属膜的各自的熔融温度以下且在该第1金属膜与该第2金属膜的共晶温度以上使该第1金属膜及该第2金属膜的该最表面接触的界面附近熔融,通过该第1金属膜和该第2金属膜的扩散反应,在该界面附近形成包含该第1金属膜及该第2金属膜的各自的构成元素的合金部分,从而连接上述电子器件和上述衬底;
连接了上述电子器件和上述衬底后的上述合金部分的熔融开始温度,比连接该电子器件和该衬底时的上述界面附近的上述第1金属膜和上述第2金属膜的熔融开始温度高;
上述第1金属膜及上述第2金属膜中的至少一方包含形成10微米或以上厚度的至少1个金属层,或者,通过该第1金属膜及该第2金属膜在上述电子器件与上述衬底之间形成的连接部的厚度为20微米或以上。
3.根据权利要求1或权利要求2所述的电子装置,其特征在于,在上述第1金属膜与上述第2金属膜接触的上述界面的附近,存在稳定的金属间化合物。
4.根据权利要求1~3中任一项所述的电子装置,其特征在于:
上述电子器件是在与形成上述第1电极的主面相反一侧的另外的主面上形成了第3电极的Si功率器件;
在设有上述第2电极的上述衬底的主面上形成通过金属引线与上述第3电极电连接的第4电极;
分别在上述引线上形成上述第1金属膜,在上述第3电极上形成上述第2金属膜;
上述引线和上述第3电极通过以下方式连接,即,通过使分别形成的上述第1金属膜的最表面与上述第2电极的最表面接触,在上述熔融温度以下且在该第1金属膜和该第2金属膜的共晶温度以上使该第1金属膜及该第2金属膜的该最表面接触的界面附近熔融,通过该第1金属膜和该第2金属膜的扩散反应,在该界面附近形成包含该第1金属膜及该第2金属膜的各自的构成元素的合金部分,从而连接上述引线和上述第3电极;
上述引线和上述第3电极被连接后的上述合金部分的熔融开始温度,比连接该引线和该第3电极时的上述界面附近的上述第1金属膜和上述第2金属膜的熔融开始温度高。
5.电子装置,具备衬底、装载在该衬底的一方的主面上的Si功率器件,以及连接在该衬底的另一方的主面上的金属板,在与上述Si功率器件的上述衬底的一方的主面相反一侧的面上形成的第1电极和在该衬底的一方的主面上形成的第2电极是通过导电金属材料电连接的,其特征在于,在上述导电金属材料与上述第2电极之间插入金属制的块,该导电金属材料不进行使其在上述衬底的厚度方向弯曲的加工。
6.根据权利要求5所述的电子装置,其特征在于:
上述Si功率器件及上述块和上述衬底的连接、上述Si功率器件及上述块和上述导电金属材料的连接,以及上述衬底和上述金属板的连接中的至少1个分别是在被连接的2个构件的一方形成第1金属膜,在其另一方形成上述第2金属膜;
使上述第1金属膜的最表面与上述第2电极的最表面接触,在该第1金属膜及该第2金属膜的各自的熔融温度以下且在该第1金属膜与该第2金属膜的共晶温度以上使该第1金属膜及该第2金属膜的该最表面接触的界面附近熔融,通过该第1金属膜和该第2金属膜的扩散反应,在该界面附近形成包含该第1金属膜及该第2金属膜的各自的构成元素的合金部分;
使上述连接后的上述合金部分的熔融开始温度比在该连接的上述界面附近的上述第1金属膜和上述第2金属膜的熔融开始温度高。
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CN104851843A (zh) * | 2014-02-17 | 2015-08-19 | 三菱电机株式会社 | 电力用半导体装置 |
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2005
- 2005-02-28 JP JP2005052249A patent/JP4325571B2/ja not_active Expired - Fee Related
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2006
- 2006-01-19 TW TW095102077A patent/TWI300619B/zh not_active IP Right Cessation
- 2006-02-23 CN CNB2006100080340A patent/CN100421244C/zh not_active Expired - Fee Related
- 2006-02-27 KR KR1020060018725A patent/KR100731243B1/ko active IP Right Grant
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Cited By (8)
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CN105517947A (zh) * | 2013-09-13 | 2016-04-20 | Ev集团E·索尔纳有限责任公司 | 用于施加接合层的方法 |
US9911713B2 (en) | 2013-09-13 | 2018-03-06 | Ev Group E. Thallner Gmbh | Method for applying a bonding layer |
CN105517947B (zh) * | 2013-09-13 | 2019-04-23 | Ev 集团 E·索尔纳有限责任公司 | 用于施加接合层的方法 |
CN110071049A (zh) * | 2013-09-13 | 2019-07-30 | Ev 集团 E·索尔纳有限责任公司 | 用于施加接合层的方法 |
US10438925B2 (en) | 2013-09-13 | 2019-10-08 | Ev Group E. Thallner Gmbh | Method for applying a bonding layer |
TWI750526B (zh) * | 2013-09-13 | 2021-12-21 | 奧地利商Ev集團E塔那有限公司 | 施用黏結層之方法 |
CN110071049B (zh) * | 2013-09-13 | 2023-12-08 | Ev 集团 E·索尔纳有限责任公司 | 用于施加接合层的方法 |
CN104851843A (zh) * | 2014-02-17 | 2015-08-19 | 三菱电机株式会社 | 电力用半导体装置 |
Also Published As
Publication number | Publication date |
---|---|
TWI300619B (en) | 2008-09-01 |
KR100731243B1 (ko) | 2007-06-22 |
US20060192291A1 (en) | 2006-08-31 |
JP2006237419A (ja) | 2006-09-07 |
US7535092B2 (en) | 2009-05-19 |
CN100421244C (zh) | 2008-09-24 |
KR20060095502A (ko) | 2006-08-31 |
TW200723494A (en) | 2007-06-16 |
JP4325571B2 (ja) | 2009-09-02 |
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