CN1592953A - 半导体芯片的制造方法 - Google Patents
半导体芯片的制造方法 Download PDFInfo
- Publication number
- CN1592953A CN1592953A CNA038015021A CN03801502A CN1592953A CN 1592953 A CN1592953 A CN 1592953A CN A038015021 A CNA038015021 A CN A038015021A CN 03801502 A CN03801502 A CN 03801502A CN 1592953 A CN1592953 A CN 1592953A
- Authority
- CN
- China
- Prior art keywords
- semiconductor chip
- support plate
- semiconductor wafer
- gas
- manufacture method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Images
Classifications
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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Abstract
在将由通道划分的区域中形成了电路的半导体晶片W分割成各个电路的半导体芯片的情况下,通过靠激发而降低粘结力的粘结片,在支承板(13)上粘贴半导体晶片W的表面,使半导体晶片W的背面(10)露出,对与支承板(13)一体的半导体晶片W的背面(10)进行研磨,在将背面(10)向上保持的状态下,将研磨结束的与支承板(13)一体的半导体晶片W分割成半导体芯片C,激发粘结片,使粘结力下降,将半导体芯片C从支承板(13)中拆下。由于半导体晶片和半导体芯片始终被支承在支承板上,所以可以防止发生破损、变形等。
Description
技术领域
本发明涉及在对半导体晶片的背面进行研磨后,进行切割而形成半导体芯片的过程中,用于防止半导体晶片和半导体芯片产生破损、变形等的半导体芯片的制造方法。
背景技术
如图14所示,对在由通道S划分的多个区域C中形成了电路的半导体晶片W的背面进行研磨,形成期望的厚度之后,将通道S纵横地切割而形成IC、LSI等的半导体芯片。
在对背面进行研磨时,由于表面侧被研磨装置保持,所以为了保护表面上形成的电路,通常在表面上粘贴保护带。此外,为了实现各种电子装置的小型化、薄型化,在将半导体晶片W的厚度例如很薄地研磨至100μm以下的情况下,研磨后的半导体晶片W像纸那样柔软,难以处理,所以为了容易进行其后的运送,通过将半导体晶片W的表面粘贴支承在刚性强的支承板上,从而容易进行运送。
但是,在使用切割装置切割因背面研磨变薄的半导体晶片中,由于将半导体晶片从支承板中剥离而需要重贴在切割带上,所以在剥离或粘贴时有损伤半导体晶片的危险。特别是对于通过研磨其厚度在100μm以下、50μm以下非常薄地形成的半导体晶片来说,不损伤地重贴非常困难。
此外,例如在日本特开平10-284449号公报中公开的发明中,在半导体晶片的表面粘贴在保持带上的状态下进行研磨和切割,所以不需要从研磨转移到切割时的重贴,但在切割后,从切割带中剥离半导体芯片时,有产生半导体芯片破裂和破碎等破损、变形等的危险。
发明内容
因此,本发明的目的在于,在对半导体晶片进行研磨,将该半导体晶片进行切割来制造半导体芯片时,防止在半导体晶片和半导体芯片中产生破损、变形等。
本发明提供半导体芯片的制造方法,该方法用于半导体晶片的分割,将通过通道划分的区域中形成了电路的半导体晶片分割成各个电路的半导体芯片,该方法包括:通过靠激发而粘结力下降的粘结片,在支承板上粘贴半导体晶片的表面,使该半导体晶片的背面露出的支承板一体化工序;对与该支承板一体的半导体晶片的背面进行研磨的研磨工序;在背面向上保持的状态下对与该研磨工序结束的该支承板一体的半导体晶片进行切割,分割成半导体芯片的切割工序;以及激发该粘结片来降低粘结力,将该半导体芯片从该支承板中拆卸的分离工序。
而且,这种半导体芯片的制造方法将以下条件作为附加的主要条件:在粘结片中包含靠激发产生气体的气体产生剂;激发是紫外线,气体产生剂靠该紫外线而产生气体;在分离工序中,仅对要从支承板分离的半导体芯片照射紫外线;粘结片含有在从丙烯酸系、烯烃系、聚碳酸酯系中选择至少一种以上的树脂中偶氮化合物构成的气体发生剂;支承板由透明或半透明的材质构成;支承板由玻璃构成,其厚度在0.5mm至2.5mm内;在支承板的外周部中,形成表示通道位置的对准标记。
根据这样构成的半导体芯片的制造方法,通过靠激发而降低粘结力的粘结片,将半导体晶片粘贴在刚性强的支承板上,在该状态下进行研磨、切割,然后予以激发来降低粘结力后,可以进行半导体芯片的拾取,所以在这些工序中,或在工序间的运送时,可以安全、可靠并且容易地进行半导体芯片的拾取,在半导体芯片上不产生破裂和破碎等的破损、变形。
附图说明
图1是表示采用本发明的半导体晶片的立体图;
图2是表示构成本发明的支承板一体化工序的立体图;
图3是表示半导体晶片和其支承板为一体的状态的立体图;
图4是放大表示粘结片的第一例的局部的剖面图;
图5是放大表示粘结片的第二例的局部的剖面图;
图6是放大表示粘结片的第三例的局部的剖面图;
图7是表示构成本发明的研磨工序的实施中使用的研磨装置一例的立体图;
图8是表示构成本发明的切割工序的实施中使用的切割装置一例的立体图;
图9是表示切割工序中一方向的通道都被切削状态的立体图;
图10是表示通过切割工序通道都被纵横地切削状态的立体图;
图11是表示构成本发明的分离工序的立体图;
图12是以工序表示本发明的说明图;
图13是表示支承板的第二例的立体图;
图14是表示半导体晶片的平面图。
具体实施方式
作为用于实施本发明的优选方式,下面说明对图1所示的半导体晶片W的背面进行研磨,将通道S纵横地切削(切割)来制造各个半导体芯片C的方法。
在图1所示的半导体晶片W中,在由通道S划分的区域的表面上形成电路。如图2所示,在将半导体晶片W翻过来使其背面10朝上的状态下,通过粘结片12,将半导体晶片W的表面粘贴在支承板13上,如图3所示成为一体(支承板一体化工序)。即,将半导体晶片W的表面11粘贴在粘结片12上。
粘结片12具有靠激发而粘结力下降的性质,例如是含有通过从表面放出气体而降低粘结力的气体发生剂的粘结片。作为这种情况下的激发,例如使用紫外线。
粘结片12可以是如图4所示的粘结片12a那样在两面有具有粘结剂层14、15的粘结性无支承带,也可以是如图5所示的粘结片12b那样在基材16的两面上形成粘结剂层17、18而构成的类型。此外,如图6所示的粘结片12c所示,也可以是仅一层粘结剂层19构成的无支承带。
在如图5的粘结片12b那样使用基材16的类型的情况中,在粘结剂层17是靠光而降低粘结力的粘结剂层的情况下,期望基材16是透过或通过光的基材,例如可列举丙烯酸、烯烃、聚碳酸酯、氯乙烯、ABS、聚对苯二甲酸乙二酯(PET)、尼龙、聚氨酯、聚酰亚胺等透明树脂构成的片、具有网格结构的片、打孔的片等。
构成粘结片12a、12b、12c的粘结剂层14、17、19含有靠激发而产生气体的气体发生剂,作为这种激发,可列举光、热、超声波等,其中期望是光或热。此外,作为光,可列举紫外线和可见光等。
作为气体发生剂,没有特别限定,例如偶氮化合物、叠氮化合物是适用的。作为偶氮化合物,例如可列举:2,2’-偶氮双(N-丁基-2-甲基丙酰胺),2,2’-偶氮双{2-甲基-N-[1,1-双(羟甲基)-2-羟乙基]丙酰胺,2,2’-偶氮双{2-甲基-N-[2-(1-羟丁基)]丙酰胺,2,2’-偶氮双[2-甲基-N-(2-羟乙基)丙酰胺],2,2’-偶氮双[N-(2-丙烯基)-2-甲基丙酰胺],2,2’-偶氮双(N-丁基-2-甲基丙酰胺),2,2’-偶氮双(N-环己基-2-甲基丙酰胺),2,2’-偶氮双[2-(5-甲基-2-咪唑啉-2-基)丙烷]二氢氯化物,2,2’-偶氮双[2-(2-咪唑啉-2-基)丙烷二氢氯化物,2,2’-偶氮双[2-(2-咪唑啉-2-基)丙烷]硫酸氢酯二水合物,2,2’-偶氮双[2-(3,4,5,6-四氢嘧啶-2-基)丙烷]二氢氯化物,2,2’-偶氮双{2-[1-(2-羟乙基)-2-咪唑啉-2-基]丙烷}二氢氯化物,2,2’-偶氮双[2-(2-咪唑啉-2-基)丙烷],2,2’-偶氮双(2-甲基丙脒)氢氯化物,2,2’-偶氮双(2-氨基丙烷)二氢氯化物,2,2’-偶氮双[N-(2-羧酰基)-2-甲基丙脒],2,2’-偶氮双{2-[N-(2-羧乙基)脒]丙烷},2,2’-偶氮双(2-甲基丙酰胺肟),二甲基2,2’-偶氮双(2-甲基丙酸酯),二甲基2,2’-偶氮双异丁酸酯,4,4’-偶氮双(4-氰甲酸),4,4’-偶氮双(4-氰戊酸),2,2’-偶氮双(2,4,4-三甲基戊烷)等。在半导体晶片的制造工序中,有一个暴露于高温下的工序。例如,在对半导体晶片的背面进行研磨的研磨工序中,因摩擦热产生高温,所以在这些工序中期望使用热分解温度高的2,2’-偶氮双(N-丁基-2-甲基丙酰胺),2,2’-偶氮双(N-丁基-2-甲基丙酸胺),2,2’-偶氮双(N-环己基-2-甲基丙酰胺)。这些偶氮化合物通过光、热等的激发而产生氮气。
此外,作为叠氮化合物例如可列举:3-叠氮甲基-3-甲基氧杂环丁烷,对苯二酰叠氮,对叔丁基苯甲酰叠氮,和由3-叠氮甲基-3-甲基氮杂环丁烷开环聚合所得的缩小甘油叠氮聚合物等有叠氮基的聚合物。这些叠氮化合物通过光、热及冲击等的激发而产生氮气。
在这些气体发生剂中,由于叠氮化合物通过提供冲击而容易分解并放出氮气,所以有难以处理的问题。而且,如果叠氮化合物一旦开始分解,则因产生连锁反应,爆发性地放出氮气,不能进行其控制,所以还有因爆发性地产生氮气而损伤半导体晶片的问题。由于这样的问题,所以叠氮化合物的使用量受限定。
另一方面,偶氮化合物与叠氮化合物不同,不因冲击而产生气体,所以处理非常容易。此外,也没有引起连锁反应而爆发性地产生气体,所以不损伤半导体晶片,如果中断光的照射,也中断气体的产生,所以具有可进行适合于用途的粘结性控制的优点。因此,作为气体发生剂,期望使用偶氮化合物。
通过在粘结剂层14、17、19中含有上述的气体发生剂,如果激发粘结剂层14、17、19,则从气体发生剂中产生气体而降低粘结力,然后可以容易地剥离半导体芯片。
气体发生剂也可以分散在粘结剂层14、17、19中,但这种情况下粘结剂层整体为发泡体而过于柔软,有不容易剥离粘结剂层的危险。因此,如仅使其含在表层部分中,则通过从气体发生剂中产生的气体而减少粘结片和半导体芯片的粘结面积,而且气体从半导体芯片上剥落粘结剂层的粘结面的至少一部分,使粘结力下降。
作为仅在粘结剂层14、17、19的表层部分含有气体发生剂的方法,例如可列举在粘结剂层上以1~20μm左右的厚度涂布含有气体发生剂的粘结剂的方法,在预先制作的粘结剂层14、17、19的表面上通过涂布或喷射等喷涂含有气体发生剂的挥发性液体,从而在粘结剂层表面上均匀地附着气体发生剂的方法等。
在粘结剂层表面上附着气体发生剂的情况下,期望附着与粘结剂相容性良好的气体发生剂。即,如果在粘结剂表面上大量附着气体发生剂,则粘结力下降,而在粘结剂和气体发生剂相容的情况下,由于附着的气体发生剂被粘结剂吸收,所以粘结力没有下降。
再有,表层部分的厚度取决于粘结剂层的厚度,但期望是从粘结剂表面至20μm的部分。此外,在这里所说的表层部分中,包含在粘结剂表面上均匀地附着气体发生剂的形态和粘结剂表面上附着的气体发生剂与粘结剂相容并被粘结剂层吸收的形态。
期望构成粘结剂层14、17、19的粘结剂是弹性模量靠激发而上升的粘结剂。这种情况下,使弹性模量上升的激发可以与用于从气体发生剂产生气体的激发相同,也可以不同。作为这种粘结剂,例如可列举由在分子内有游离基聚合性的不饱和键的丙烯酸烷基酯系和/或甲基丙烯酸烷基酯系的聚合性聚合物,和以游离基聚合性多官能低聚物或单体为主要成分,根据需要包含光聚合引发剂的光固化性粘结剂,或分子内有游离基聚合性的不饱和键的丙烯酸烷基酯系和/或甲基丙烯酸烷基酯系的聚合性聚合物,和以游离基聚合性多官能低聚物或单体为主要成分,包含热聚合引发剂的热固化型粘结剂等构成。
这样的光固化型粘结剂或热固化型粘结剂等固化性粘结剂通过光的照射或加热,将粘结剂层的整体均匀并且迅速地聚合交联一体化,所以聚合固化造成的弹性模量的上升明显,粘结力极大地下降。此外,如果在硬的固化物中从气体发生剂中产生气体,则产生的大部分气体放出到外部,放出的气体将半导体芯片和粘结剂层的粘结面的至少一部分剥离,使粘结力下降。
例如可以将分子内具有官能团的(甲基)丙烯酸系聚合物(以下称为含官能团(甲基)丙烯酸聚合物)进行预先合成,通过分子内与上述官能团反应的官能团和有游离基聚合性不饱和键的化合物(以下为含官能团不饱和化合物)进行反应而获得上述聚合性聚合物。再有,在本说明书中,(甲基)丙烯酸意味着丙烯酸或甲基丙烯酸。
上述含官能团(甲基)丙烯酸系聚合物作为常温下具有粘结性的聚合物,与普通的(甲基)丙烯酸系聚合物的情况同样,以烷基的碳数通常在2~18的范围内的丙烯酸烷基酯和/或甲基丙烯酸烷基酯为主要单体,将其和含官能团单体、根据需要而可与它们进行共聚的其他改性用单体通过常规方法进行共聚来获得。上述含官能团(甲基)丙烯基系聚合物的重均分子量通常为20万~200万左右。
作为含官能团的单体,例如可列举:丙烯酸、甲基丙烯酸等含羧基的单体;丙烯酸羟乙基酯、甲基丙烯酸羟乙基酯等含羟基的单体;丙烯酸缩水甘油酯、甲基丙烯酸缩水甘油酯等含环氧基的单体;丙烯酸异氰酸乙酯、甲基丙烯酸异氰酸乙酯等含异氰酸酯基的单体;丙烯酸氨乙基酯,甲基丙烯酸氨乙基酯等含氨基的单体等。
作为上述共聚性的其它改性用单体,例如可列举醋酸乙烯、丙烯腈、苯乙烯等普通的(甲基)丙烯酸系聚合物中使用的各种单体。
作为在上述含官能团的(甲基)丙烯酸系聚合物中起反应的含官能团不饱和化合物,根据含官能团(甲基)丙烯酸系聚合物的官能团,可以使用与上述含官能团单体相同的单体。例如,在含官能团(甲基)丙烯酸系聚合物的官能团为羧基的情况下使用含环氧基单体或含异氰酸酯基单体,在官能团为羟基的情况下使用含异氰酸酯基单体,在官能团为环氧基的情况下使用含羧基单体或含丙烯酰胺等的酰胺基单体,在官能因为氨基的情况下使用含环氧基单体。
作为上述多官能低聚物或单体,期望分子量在1万以下,为了通过加热或光的照射产生的粘结剂层的三维网状化效率高,期望其分子量在5000以下更好,并且,其分子内的游离基聚合性不饱和键数下限为2个,上限为20个。作为这种优选的多官能低聚物或单体,例如可列举:三羟甲基丙烷三丙烯酸酯、四羟甲基甲烷四丙烯酸酯、五赤藓醇三丙烯酸酯、五赤藓醇四丙烯酸酯、二季戊四醇单羟基五丙烯酸酯、二季戊四醇六丙烯酸酯、1,4-丁二醇二丙烯酸酯、1,6-己二醇二丙烯酸酯、聚乙二醇二丙烯酸酯、市场上出售的酯类低聚物丙烯酸酯或上述同样的甲基丙烯酸酯等。这些多官能低聚物或单体可单独使用,也可以同时使用两种以上。
作为上述光聚合引发剂,例如可列举通过照射波长250-800nm的光而被激活的光聚合引发剂:甲氧基苯乙酮等苯乙酮衍生物;苯偶姻丙醚、苯偶姻异丁醚等苯偶姻系化合物;苄基二甲基缩酮、苯乙酮二乙基缩酮等缩酮衍生物;氧化膦衍生物;双(η5-环戊二烯基)钛衍生物;二苯甲酮、米蚩酮、氯噻吨酮、十二烷基噻吨酮、二甲基噻吨酮、二乙基噻吨酮、α-羟基环己基苯甲酮、2-羟基甲基苯基丙烷等光游离基聚合引发剂。此等光聚合此发剂可单独使用,也可以同时使用两种以上。
作为热聚合引发剂,可列举通过热进行分解,产生引发聚合固化的活性基团的热聚合引发剂,具体地说,例如可列举:过氧化二枯基、过氧化二叔丁基、过苯甲酸叔丁酯、过氧化氢叔丁基、过氧化苯甲酰、氢过氧化枯烯、过氧化氢二异丙苯、萜烷过氧化氢、过氧化二叔丁基等。其中由于热分解温度高,所以期望采用氢过氧化枯烯、萜烷过氧化氢、过氧化二叔丁基等。在这些热聚合引发剂中,作为市场上出售的没有特别限定,例如Perbutye D,PerbutyeH,Perbntyl P和Permentha H(皆为“日本油脂”制)等。这些热聚合引发剂可单独使用,也可以同时使用两种以上。
在上述固化型粘结剂中,除了上述成分以外,以调节作为粘结剂的凝聚力为目的,根据需要,也可向异氰酸酯化合物、三聚氰胺化合物、环氧化合物等普通粘结剂中配混各种多官能性化合物。此外,也可配混可塑性树脂、表面活性剂、石蜡、微粒填充剂等公知的添加剂。
如图2所示,构成图4所示的粘结剂层15、图5所示的粘结剂层18的粘结剂粘结在基板13上,不一定具有靠激发来降低粘结力的性质,但在需要将粘结片12从基板13中剥离的情况下,如上述说明,期望由靠其中一种激发来降低粘结力的粘结剂构成。
图2所示的支承板13由玻璃、金属、硬质树脂等硬质部件构成,其刚性强,可以稳定地支承被粘贴的半导体晶片W而不产生弯曲。例如,在玻璃的情况下,只要其厚度在0.5mm~2.5mm范围,就可以获得足够的刚性。此外,在上述说明的激发是光时,如果由透明或半透明的部件构成支承板13,则可以透过光。再有,期望玻璃表面平滑,以在磨削加工时获得平面。
通过粘结片12进行粘贴,与支承板13为一体的半导体晶片W例如使用图7所示的研磨装置20来研磨其背面。
在研磨装置20中,形成以下结构:从底座21的端部将壁部22竖立设置,在该壁部22的内侧面上将一对导轨23在垂直方向上配置,随着支承部24沿导轨23滑动并上下移动,支承部24上安装的研磨部件25上下移动。此外,在底座21上,将转盘26可旋转地配置,而且在转盘26上将保持半导体晶片的夹盘27可旋转地配置多个。
在研磨部件25中,在有垂直方向的轴心的主轴28的前端安装固定器29,而且在其下部安装研磨轮30,在研磨轮30的下部固定研磨磨具31,随着主轴28的旋转,研磨磨具31旋转。
在使用研磨装置20进行半导体晶片W的研磨时,支承板13朝下保持在夹盘27上,使与支承板13一体的半导体晶片W位于研磨部件25的正下方。即,使半导体晶片W的背面10与研磨磨具31对置。
然后,如果旋转主轴28,同时下降研磨部件25,则随着主轴28的旋转研磨轮30旋转,同时旋转的研磨磨具31接触半导体晶片W并施加按压力,从而背面10被研磨磨具31研磨,达到期望的厚度(研磨工序)。
接着,例如使用图8所示的切割装置40,对研磨工序结束的形成了期望厚度的半导体晶片W进行切割。
在该切割装置40中,研磨工序结束后的半导体晶片W仍然与支承板13为一体,即在将半导体晶片W的背面10朝上的状态下,在运送盒41中装入多个。
在与支承板13一体的半导体晶片W通过运入运出部件42从盒41中运出并装载在虚置区域43中后,被第一运送部件44吸附,通过其旋转运送到夹盘45上,在支承板13朝下的状态下被装载(半导体晶片W的背面朝上的状态)吸引保持。
接着,通过将保持了半导体晶片W的夹盘45在+X方向上移动,从而位于对准部件46的正下方。在对准部件46中,配有从半导体晶片W的背面10透过光并可检测表面的通道等的红外线摄像机47,随着对准部件46在Y轴方向上移动,通过红外线摄像机47透过支承板13上支承的半导体晶片W的背面10来对其表面进行摄像,进行预先存储在存储器等中的关键图形图像和摄影的图像的图形匹配处理,来检测要切削的通道。
配有旋转刀片48的切削部件49与对准部件46一体地形成。此外,旋转刀片48与红外线摄像机47的Y坐标相等。即,两者在X轴方向上位于一直线上。
因此,如果通过对准部件46检测出通道,则自动地进行该通道和旋转刀片48的Y轴方向的定位。然后,保持被支承板13支承的半导体晶片W的夹盘45进一步在+X方向上移动,旋转刀片48高速旋转,同时切削部件49下降,从背面10侧切入检测出的通道,切削该通道。
然后,将夹盘45在X方向上往复移动,同时将切削部件49每隔通道间隔在Y轴方向上分度送出,如图9所示,切削同方向的所有通道。
而且,将夹盘45旋转90度后进行与上述同样地进行切削,如图10所示,切削切割所有的通道,分割为各个半导体芯片(切割工序)。
这样,在切割后,各个半导体芯片C仍为粘贴在支承板13上的状态,所以需要将半导体芯片C从支承板13中剥离拾取。
多个半导体芯片C和支承板13通过图2所示的粘结片12为一体,所以通过激发粘结片12来降低粘结片12的粘结力,形成容易剥离半导体芯片C的状态。
例如,在粘结片12中含有靠紫外线产生气体的气体发生剂的情况下,如图11所示,从支承板13的下方的照射部50照射紫外线来产生气体,从而与半导体芯片C之间产生气体,所以可以降低粘结力。
此时,也可以在粘结片12的整体上一次照射紫外线,但如果整体的粘结力下降,则在被拾取前半导体芯片C有脱落的危险,所以如图11所示,期望仅对被拾取之前的半导体芯片C照射紫外线。然后,对于粘结力下降的部分上粘贴的半导体芯片来说,可以容易地从支承板13中分离(分离工序)。
此外,也可以在对粘结片12整体照射紫外线使其粘结力下降到某一范围时,在分离之前再对要分离的部分照射紫外线。也可以局部地加热,分离成每个片。
如果以工序区分图示以上说明的半导体晶片的分割方法,则如图12(A)~图12(D)所示。首先,在图12(A)所示的支承板一体化工序中,将半导体晶片W以使其背面10朝上粘贴在支承板13上,在该状态下保持在研磨装置的夹盘27上,在图12(B)所示的研磨工序中通过研磨磨具31来研磨背面。
然后,在图12(C)所示的切割工序中,在仍然粘贴在支承板13上的状态下,将半导体晶片W保持在切割装置的夹盘45上,使半导体晶片被切割。最后,通过切割形成的各个半导体芯片在图12(D)所示的分离工序中被拾取,从支承板13中拆下。
这样制造的半导体芯片C在研磨时、切割时、从研磨到切割的运送时的任何过程中,都被刚性强的支承板13支承,所以在各个过程中不发生破裂、破碎、变形等。因此,最终制造的半导体芯片的质量高,成品率也提高。
特别是例如在厚度为50μm以下那样的通常制造过程中破损、变形等多的半导体晶片的情况下,可以制造高质量的半导体芯片而不产生破损等。
再有,在上述方式中,在切割装置40中使用红外线进行对准,但如图13所示,如果将支承板51比半导体晶片W形成得大,在露出的外周部52中预先形成表示通道位置的对准标记53,则即使不使用红外线摄像机,也可以通过普通摄像来对对准标记53进行摄像,从而检测要切削的通道并进行对准。
如以上那样,根据本发明的半导体芯片的制造方法,可通过靠激发而降低粘结力的粘结片,将半导体晶片粘贴在刚性强的支承板上,在该状态下进行研磨、切割,然后激发并降低粘结力后进行半导体芯片的拾取,所以在这些工序中,或在工序间的运送时,始终稳定地支承半导体晶片或半导体芯片,同时可安全、可靠并且容易地进行半导体芯片的拾取。因此,没有破裂和破碎等破损、变形等,可用于质量高并且成品率高的半导体芯片的制造。特别是在制造厚度为50μm以下那样非常薄的半导体芯片的情况下,也可以具有同样的效果,是非常有用的。
Claims (8)
1.一种半导体芯片的制造方法,该方法用于半导体晶片的分割,将通过通道划分的区域中形成了电路的半导体晶片分割成各个电路的半导体芯片,该方法包括:
通过靠激发而粘结力下降的粘结片,在支承板上粘贴半导体晶片的表面,使该半导体晶片的背面露出的支承板一体化工序;
对与该支承板一体的半导体晶片的背面进行研磨的研磨工序;
在背面向上保持的状态下对与该研磨工序结束的该支承板一体的半导体晶片进行切割,分割成半导体芯片的切割工序;以及
激发该粘结片来降低粘结力,将该半导体芯片从该支承板中拆卸的分离工序。
2.如权利要求1所述的半导体芯片的制造方法,其中,在粘结片中含有靠激发产生气体的气体发生剂。
3.如权利要求2所述的半导体芯片的制造方法,其中,激发是紫外线,气体产生剂靠该紫外线而产生气体。
4.如权利要求3所述的半导体芯片的制造方法,其中,在分离工序中,仅对要从支承板分离的半导体芯片照射紫外线。
5.如权利要求3所述的半导体芯片的制造方法,其中,粘结片含有在从丙烯酸系、烯烃系、聚碳酸酯系中选择至少一种以上的树脂中偶氮化合物构成的气体发生剂。
6.如权利要求1至权利要求5任何一项所述的半导体芯片的制造方法,其中,支承板由透明或半透明的材质构成。
7.如权利要求6所述的半导体芯片的制造方法,其中,支承板由玻璃构成,其厚度在0.5mm至2.5mm内。
8.如权利要求1所述的半导体芯片的制造方法,其中,在支承板的外周部中,形成表示通道位置的对准标记。
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2003
- 2003-04-09 KR KR10-2004-7005551A patent/KR20040094390A/ko not_active Application Discontinuation
- 2003-04-09 AU AU2003236002A patent/AU2003236002A1/en not_active Abandoned
- 2003-04-09 JP JP2003582801A patent/JP4791693B2/ja not_active Expired - Lifetime
- 2003-04-09 WO PCT/JP2003/004472 patent/WO2003085714A1/ja not_active Application Discontinuation
- 2003-04-09 EP EP03745974A patent/EP1494272A1/en not_active Withdrawn
- 2003-04-09 CN CNB038015021A patent/CN100334689C/zh not_active Expired - Lifetime
- 2003-04-09 US US10/490,557 patent/US7335578B2/en not_active Expired - Lifetime
- 2003-04-10 TW TW092108248A patent/TW200402842A/zh unknown
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CN101479835B (zh) * | 2006-06-27 | 2010-12-01 | 3M创新有限公司 | 制备分割芯片的方法 |
CN101831253A (zh) * | 2009-03-11 | 2010-09-15 | 日东电工株式会社 | 无基材压敏粘合片、其生产方法及使用其的研磨方法 |
CN102842494A (zh) * | 2011-06-23 | 2012-12-26 | 株式会社迪思科 | 晶片的加工方法 |
CN105990207A (zh) * | 2014-09-16 | 2016-10-05 | 株式会社东芝 | 半导体装置的制造方法及半导体制造装置 |
US10199253B2 (en) | 2014-09-16 | 2019-02-05 | Toshiba Memory Corporation | Method for manufacturing semiconductor devices through peeling using UV-ray |
CN105990207B (zh) * | 2014-09-16 | 2019-08-16 | 东芝存储器株式会社 | 半导体装置的制造方法及半导体制造装置 |
Also Published As
Publication number | Publication date |
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AU2003236002A1 (en) | 2003-10-20 |
EP1494272A1 (en) | 2005-01-05 |
WO2003085714A1 (fr) | 2003-10-16 |
US7335578B2 (en) | 2008-02-26 |
JPWO2003085714A1 (ja) | 2005-08-18 |
US20040259332A1 (en) | 2004-12-23 |
CN100334689C (zh) | 2007-08-29 |
TW200402842A (en) | 2004-02-16 |
JP4791693B2 (ja) | 2011-10-12 |
KR20040094390A (ko) | 2004-11-09 |
AU2003236002A8 (en) | 2003-10-20 |
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