CN1575511A - 用于接触基片的电接触面的方法和由具有电接触面的基片形成的装置 - Google Patents

用于接触基片的电接触面的方法和由具有电接触面的基片形成的装置 Download PDF

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CN1575511A
CN1575511A CNA028190637A CN02819063A CN1575511A CN 1575511 A CN1575511 A CN 1575511A CN A028190637 A CNA028190637 A CN A028190637A CN 02819063 A CN02819063 A CN 02819063A CN 1575511 A CN1575511 A CN 1575511A
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film
contact
substrate
aforementioned
window
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K·海泽
L·阿米格斯
H·施瓦茨鲍尔
N·泽利格尔
K·维德纳
J·扎普夫
M·雷汗
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Siemens AG
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Siemens AG
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Abstract

在一种用于接触基片(1)的一个表面(20)上的电接触面(21，112)的方法中，在该表面上在真空下层压基于由聚酰亚胺或者环氧化物形成的薄膜(3)，使得该薄膜紧紧覆盖在具有接触面的表面上并与其粘接。在表面上的每一要接触的接触面通过打开薄膜上的窗口(31)露出，每一露出的接触面与一个金属层平面接触。应用：允许大电流密度的功率半导体芯片的大平面接触。

Description

用于接触基片的电接触面的方法 和由具有电接触面的基片形成的装置
本发明涉及接触基片的一个表面上的一个或者多个电接触面的方法和由具有在一个表面上安排多个电接触面的基片制成的装置。
功率半导体芯片之间的相互接触及与带状导线之间进行接触时用到最多的技术是粗金属丝连接法(见Harmann，G.，“微电子导线键合、材料、处理、可靠性及成品率”，Mc Graw Hill 1998)。这种技术是利用超声波能量通过金属间化合物在直径典型为几百μm的铝制金属丝与在芯片和功率模块上由铝和铜组成的接触面之间来实现牢固连接的。
如果不使用上述键合法，也可以使用薄封装(ThinPak)方法(见Temple，V，“SPCO ThinPak包装，用于功率模块和功率组件的理想部件块”，IMAPS 99会议，芝加哥1999)。在这一方法中，芯片表面通过焊料接触，该焊料是通过一个陶瓷板的窗口嵌入的。
另外一种MPIPPS(金属杆互联平行板结构，见Haque S.，等人.，“一项利用金属杆互联平行板结构将功率电子构建块打包的新技术”，IEEE Trans Adv.Pckag.，Vol.22，No.2，1999年5月)技术中，是通过钎焊的铜柱来构成触点的。
另外一种用于接触的方法是利用倒装法中的焊料凸块实现的(Liu X.，等人.，“利用倒装法将集成功率电子模块打包的技术”，应用功率电子会议及展览会，APEC’2000)。这种技术可以达到一种很好的散热效果，因为可以将那些功率半导体直接焊接在DCB基片(DCB即Direct Copper Bonding，直接铜连接)的上下侧(见Gillot，C.，等人，“多功率芯片模块的最新打包技术”，IEEE工业应用会议IAS’99，1999)。
(Lu，G.-Q.，“3-D，模块中的功率器件的无导线键合互连可降低电阻、寄生参量及噪音”PCIM 2000年5月，pp.40-68)中提到的技术是通过蒸发上的铜导线进行大面积的接触，其中带状导线的绝缘是通过气相淀积(CVD技术)的绝缘层来实现的(功率模块覆盖式结构)。
在(Krokoszinski，H.-J.，Esrom，H.，“用于功率模块互连的箔片”，HybridCircuits 34，1992年9月)中提到了通过粘贴工艺或焊接工艺利用结构化的箔片进行接触的技术。
在摩托罗拉公司申请的美国专利5,616,886中提到了无键合模块的概念，但并没有做详细阐释。
本发明旨在提供一种与基片表面上的一个或多个电接触面进行接触的方法。与传统的同类方法相比，本方法的突出优势在于，可以大面积接触且承受高的电流密度。
这一任务由具有在权利要求1中所提到的诸多特征的方法解决。
本发明所提供的这种与基片表面上的一个或多个电接触面进行接触的方法，包括下列步骤：
-在真空条件下将由电绝缘的塑料材料构成的薄膜层压胶合到基片表面上，使薄膜紧紧覆盖并附着在具有一个或多个接触面的该表面上，
-通过打开薄膜中的各个窗口将该表面上需要接触的各个接触面剥露使其露出，并且
-使每个露出的接触面都与一个导电材料层平面接触。
这里所说的基片，可以是由有机材料或无机材料组成的任何一种电路底板。比如说可以是一个印刷电路(PCB)版、直接铜连接板(DCB)、绝缘金属(IM)板、高温烧制陶瓷(HTCC)板或低温烧制陶瓷(LTCC)板。
至于层压胶合一步，最好在真空压力机中进行。可使用诸如真空拉伸、液体真空压制、真空气体压制法或其它层压技术。所使用的压力最好能够前后一致。这一层压可在100℃到250℃的温度范围及1巴到10巴的压力范围内进行。至于层压的各项精确的处理参数，如压力、温度、时间等等，还会因基片的拓扑形状、薄膜的塑料材料及薄膜厚度的不同而不同。
建议在进行平面接触时使用物理或化学淀积法将导电材料淀积。这类的物理方法指溅射和气相喷镀法(物理气相淀积法，PVD)。化学淀积法可以是气相(化学蒸汽淀积法)和/或液相(液相化学蒸汽淀积法)。也可以先使用其中一种方法覆盖上一薄子层导电层，在此基础上再用电镀淀积出一个较厚的导电层。
按照本发明，首先是要有一个带表面的基片，该表面上面有一个或多个半导体芯片尤其是功率半导体芯片，在每个芯片上面又有一个或多个接触面；同时在该表面上在真空条件下层压胶的薄膜，该薄膜紧紧覆盖着该表面，包括每个半导体芯片和每个接触面，同时也紧紧粘着在该表面上，包括每个半导体芯片
在构造薄膜时，可以克服500μm以下的高低差。这一高低差是由于基片的布局和其上面安排的半导体芯片造成的。
这一薄膜可以由任何热塑性塑料、热固性塑料或它们的混合物构成。按照本发明的方法，构造该薄膜时最好使用基于聚酰亚胺(PI)、聚乙烯(PE)、聚苯酚、聚醚酮(Polyetheretherketon(PEEK))和/或环氧化物的塑料材料。为了更好地使该薄膜粘着在基片表面上可构造一个粘着层。
该薄膜的厚度范围可达10μm到500μm。按照本发明中的方法一般使用的所层压的薄膜厚度范围优选为25μm到150μm之间。
进行完层压处理后特别要进行退火处理。通过这一热处理可以使薄膜更好地附着在基片表面上。
在其中一种改进结构中，上面的层压胶合步骤(包括退火处理或不包括)被多次重复使用，一直到所层压的薄膜达到一定厚度。比如，原来较薄的薄膜经过这一反复处理后可成为较厚的层压薄膜。这些薄膜优选是由一种塑料材料构成的。当然，也完全可以由多种不同的塑料材料构成。这样最后形成的就是一个多层的层压薄膜。
在一个比较特殊的改进结构中，使用激光烧蚀在薄膜中打开一个窗口。所使用的激光波长范围在300nm和1100nm之间，功率范围在1W和100W之间。比如可以使用波长为924nm的CO2激光。在打开窗口时，注意不要对薄膜下方的铝制芯片触点造成损坏。
另外一种改进结构使用的是光敏薄膜，并且在打开窗口时使用的是光刻工艺。该光刻工艺的步骤如下：对光敏薄膜进行曝光，然后对薄膜上经过曝光和/或未经曝光的地方进行显影，最后再将这些曝过光或未曝过光的部分除去。
将窗口打开后必要时还要对薄膜剩余物进行清洁处理。这一步骤可采用化学湿法进行。特别也可以想到等离子体清洁法。
另一种改进结构使用了由多个彼此叠加的由不同导电材料构成的子层组合而成的导电材料层。比如，可以将不同的金属层彼此叠加覆盖上去。这些子层或者说金属层的数量一般为2到5个。由这些子层构成的导电层例如可以集成一个起防止扩散作用的子层。一种这样的子层可以例如由钛钨合金构成(TiW)。在构造这种多层结构时最好直接在要接触的表面上覆盖上一层起粘合或改进粘合作用的子层。这种子层可以是由钛构成的。
在另一种特殊改进结构中，在平面接触后在导电材料层中或上面要至少构造出一条带状导线。这一带状导线可直接附于该导电材料层上。为形成带状导线特别是进行对导电层的结构化。也就是说，该带状导线是在该导电层中形成的。这一带状导线例如用于半导体芯片的电接触。
在对导电层进行结构化时一般使用光刻工艺。为此可以先在导电层上涂上一层光刻胶，烘燥、随后曝光和显影。有时为了使涂上去的光刻胶进行后面的其它处理工艺时保持稳定，还要进行退火处理。至于光刻胶可以使用传统的阳性或阴性的光致抗蚀剂。在涂敷光刻胶时可使用喷射或浸渍技术。也可使用电淀积法(静电或电泳淀积法)。
在结构化时也可以使用光敏薄膜，对其进行层压、并进行可与涂上的光刻胶可比的曝光和显影。
为形成带状导线可按下列步骤进行：第一分步骤将导电层结构化，然后在下一个分步骤中所形成的带状导线上再进行金属化，以对该带状导线进行强化处理。例如在通过结构化得到的带状导线上电镀铜，淀积厚度为1μm到400μm。随后，除去光刻胶或所层压的薄膜。在进行上述除去处理时例如可使用有机溶剂、碱性显影剂或其它类似溶剂。随后进行的微差腐蚀又将未经金属化强化处理的金属导电层除去。这样，经强化处理过的带状导线就留存下来。
在一个特殊的改进结构中，为了制造一种多层式装置，会多次用到层压、剥露、接触和形成带状导线等步骤。
本发明有利地提供了一种用于半导体芯片，尤其是功率半导体芯片，上面的连接垫或接触面的电接触和布线的新型技术。此外，本发明的方法还提出了一种可实现高速、低损耗通断的低电感接线的平面连接及绝缘技术。
本发明的方法中在真空条件下对薄膜进行层压处理时使用的是等静态下的层压。通过对薄膜进行层压处理可制造一个电绝缘层。利用本发明中的薄膜层压技术制造绝缘层具有下列优点：
-可在高温下使用。比如，由聚酰亚胺构成的薄膜最高可抗300℃的高温。
-工艺成本低，比如与气相淀积绝缘层相比。
-通过使用较厚的绝缘层，可实现较高的绝缘场强。
-生产能力强，比如DCB基片在使用过程中可进行各种工艺处理。
-绝缘性能均匀稳定，因为由于对薄膜进行加工处理是在真空中进行的，因此可以防止夹杂空气。
-由于整个芯片接触面都可用，因此可以确保高电流的通过。这里芯片的接触面积可以实现从60mm2到100mm2。
-通过平面接触可对各芯片进行均一性控制。
-平面式接触面的结构使触点的电感小于粗金属丝键合结构中的电感。
-因为较低的热机械应力与相竞争的方法相比，这种接触方式在遇到外界震动和机械冲击时具有高度的稳定性，和具有很高的负荷变换稳定性。。
-适用于多层布线结构。
-平面式的连接技术不需要高的构建高度。因此整个装置结构紧凑。
-在多层式的连接结构中大面积的金属化层可起到屏蔽作用。这一点尤其有利于电路的电磁兼容性能(EMV)(寄生发射、抗干扰性等)。
本发明还提供了相应的装置，该装置具有权利要求13中提到的特征，它按照该项权利要求是一个由带表面的基片所构成的装置，在这个表面上安排电接触面，其中在该表面上在真空条件下层压胶合一个由电绝缘材料构成的薄膜，该薄膜紧紧附着并粘合在表面上，同时薄膜在每个接触面上都有一个窗口，通过这个窗口使该接触面从薄膜露出，同时与一个导电材料层平面接触。
根据权利要求13的装置的优选和有利的改进结构在权利要求14和15中加以说明。
在下面的说明中将以图示为例详细阐释本发明。
图1表示本发明装置的一个实施例的垂直截面。
图2示意表示本发明方法的一个实施例。
在图1所示的实例中，数字1代表整个基片。图中所示的基片1例如具有一个DCB基片，众所周知该基片由陶质层10、覆盖在其下表面102上的铜质层12和覆盖在与下表面102相反的上表面101上的铜质层11所构成。
位于陶质层10上表面101的铜质层11在一定区域向下到上表面101被除去，使得在这些地方上表面101的上方是空的，但这对本发明不造成任何影响。
剩余的铜质层11的背向陶质层10的上表面111上安装的是一些半导体芯片2，这些芯片可能相同也可能不同。
这些半导体芯片主要是功率半导体芯片，每个芯片2与一个未示出的接触面接触，它存在于芯片2面向铜质层11的下表面202上，平面式接触层11的上表面111。例如这一接触面与铜质层11焊接在一起。
在每个芯片2背向铜质层11及其下表面202的上表面201上，都有一个触点21它有一个背向芯片2的接触面210。
如果半导体芯片2例如是一个晶体管，那么这一芯片2的下表面202上的接触面就是一个集电极触点或漏极触点的接触面，而该芯片2的上表面201上的触点21就是一个发射极或源极触点，其接触面为接触面210。
数字20代表装配半导体芯片2的基片1的整个上表面。该表面由陶质层10的上表面101的显露部分和位于芯片2之外的铜质层11的上表面101的显露部分及由所有芯片2自身的空白表面组成。所谓芯片自身的空白表面，是指由该芯片2的上表面201和侧表面203所构成的部分。
在本发明中，基片1的表面20是一个有重要意义的表面。
按照发明中的要求，在基片1的表面20上有一个在真空条件下层压胶合而成的薄膜3，该薄膜3由电绝缘的塑料材料所组成，使薄膜3紧紧覆盖并粘合在具有接触面210的表面20上(图2，301)。
层压胶合的薄膜3的作用是作为绝缘层和带状导线5的载体。
薄膜3的构成材料是一种基于聚酰亚胺和环氧化物组成的塑料材料。
为使薄膜3更好地粘合在表面20上，可以再进行一次退火处理。薄膜3的典型厚度d在25-150μm之间。为达到比较高的厚度，也可以用几个较薄的膜3叠合而成。这样可以更容易达到以kV范围的绝缘场强。
现在将薄膜3中的各个窗口31打开，就可以使基片1的表面20上的每个要接触的接触面都成为显露的表面(图2，302)。
要接触的接触面，不仅指半导体芯片2上面的接触面210，也可以是位于铜质层或其它金属层11的上表面111上、各通过打开薄膜3中的窗口31所显露区域112。
打开薄膜3的窗口31时所使用的方法主要是激光烧蚀法。
随后对各个显露的接触面210和112进行优选金属导电材料构成的层4的平面接触，方法是将显露的接触面210和112用常规方法金属化和结构化，并从而实现平面接触(图2，303)。
导电材料层4例如可以整个表面地覆盖在每一接触面210、112上，在在薄膜3背向基片1的表面20的上表面301上，然后例如利用光刻工艺对其进行结构化，使其与接触面210和112保持平面接触，并且在接触面210和112的外部形成带状导线5。
优选为此执行下列几个工艺步骤(半加性结构)：
i)溅射一层约100nm厚的钛粘着层和一层约200nm厚的铜导电层4(图2，303)。
ii)使用厚光刻胶层或光敏薄膜7进行光刻工艺(图2，304)
iii)通过导电层6对显露区域进行电镀加厚。该导电层的厚度可达500μm.
iv)除掉光刻胶层对铜和钛施加并进行差异腐蚀。
也可以在薄膜3背向基片1的表面20的上表面301上敷上一层掩膜，该掩膜可以使接触面210和112及带状导线5的区域露置出来；再将由导电材料构成的导电层4整个面积地覆盖在该掩膜和接触面210、112及没有掩膜的区域上。然后将掩膜与位于其上的导电层4取下来，使只剩下无掩膜区域上的平面接触的接触面210、112和带状导线5。
总之，不管哪种情况，已提供一种装置，该装置由一个带表面20的基片1构成，在表面20上安置电接触面210，112，其中在表面20上通过真空层压胶合形成一个由电绝缘材料构成的薄膜3形式的绝缘层，薄膜3是紧紧附着和粘合在表面20上。同时，在该装置中，薄膜3在每个接触面210和112处都有窗口31，通过这个窗口使接触面210和112从薄膜3露出并且与导电层4及另外与一个导电材料层6平面接触。
本装置的特殊结构可由前面的说明得出。

Claims (15)

1.与一个基片(1)的表面(20)上的一个或多个电接触面(21)接触的方法，包括下列步骤：
-在真空条件下将由电绝缘的塑料材料构成的薄膜(3)层压胶合到基片(1)的表面(20)上，使薄膜(3)把具有接触面(210、112)的表面(20)紧紧覆盖并附着在该表面(20)上，
-通过打开薄膜(3)中的各个窗口(31)将表面(20)上需要接触的各个接触面(210、112)露置出来，并且
-每个露置出来的接触面(210、112)都与一个导电材料层(4、6)平面接触。
2.根据权利要求1的方法，其中，使用一个带表面(20)的基片(1)，该表面上面装配一个或多个半导体芯片(2)，在每个芯片上面又各有一个或多个要接触的接触面(210)；其中在表面(20)上在真空条件下层压胶合薄膜(3)，使该薄膜(3)紧紧覆盖该表面(20)，包括每个半导体芯片2和每个接触面，同时也紧紧粘着在该表面(20)，包括每个半导体芯片(2)上面。
3.根据权利要求2的方法，其中，其所使用的基片(1)是一个带有表面(20)的基片，在该表面上装配一个或多个功率半导体芯片(2)。
4.根据前述权利要求中之一的方法，其中，其所使用的薄膜(3)是由基于聚酰亚胺、聚乙烯、聚苯酚、聚醚酮(Polyetheretherketon)和/或环氧化物等塑料材料构成的。
5.根据前述权利要求中之一的方法，其中，其所使用层压胶合的薄膜(3)的厚度(d)范围是在25到150μm之间。
6.根据前述权利要求中之一的方法，其中，在完成对薄膜(3)的层压胶合之后要进行退火处理。
7.根据前述权利要求中之一的方法，其中，其层压胶合的过程要一直重复持续进行，直到层压胶合的薄膜达到一定的厚度。
8.根据前述权利要求中之一的方法，其中，其薄膜(3)中的窗口(31)是通过激光烧蚀技术打开的。
9.根据前述权利要求中之一的方法，其中，其所使用的薄膜(3)是光敏性的，并且其上面的窗口(31)是通过光刻工艺打开的。
10.根据前述权利要求中之一的方法，其中，所使用的层是由多个由不同导电材料构成的子层叠合而成的。
11.根据前述权利要求中之一的方法，其中，在平面接触后在由导电材料构成的层中和/或表面上产生至少一条带状导线。
12.根据前述权利要求中之一的方法，其中，为了制造多层式装置，多次执行层压胶合、剥露、接触和形成带状导线等步骤。
13.由带表面(20)的基片(1)所构成的装置，在这个表面上安置电接触面(210、112)，其中在表面(20)上在真空条件下层压胶合一个由电绝缘材料构成的薄膜(3)，该薄膜紧紧附着和粘合在表面(20)上，同时薄膜(3)在每个接触面(210、112)上都有一个窗口(31)，通过这个窗口使该接触面(210、112)从薄膜(3)露出，同时与一个导电材料层(4、6)平面接触。
14.根据权利要求13的装置，在基片(1)的表面(20)上面至少在一个半导体芯片(2)上有至少一个接触面(210)，其中薄膜(3)紧紧附着在半导体芯片(2)上面，并且在半导体芯片(2)上面的接触面(210)处有一个窗口(31)，通过这个窗口使该接触面(210)从薄膜(3)露出同时与一个导电材料层(4、6)平面接触。
15.根据权利要求14的装置，其中，半导体芯片(2)是功率半导体芯片。
CNA028190637A 2001-09-28 2002-09-25 用于接触基片的电接触面的方法和由具有电接触面的基片形成的装置 Pending CN1575511A (zh)

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KR100896906B1 (ko) 2009-05-12
EP1430524A2 (de) 2004-06-23
US7402457B2 (en) 2008-07-22
JP2005515616A (ja) 2005-05-26
WO2003030247A2 (de) 2003-04-10

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