WO2003030247A3 - Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen - Google Patents

Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen Download PDF

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Publication number
WO2003030247A3
WO2003030247A3 PCT/DE2002/003615 DE0203615W WO03030247A3 WO 2003030247 A3 WO2003030247 A3 WO 2003030247A3 DE 0203615 W DE0203615 W DE 0203615W WO 03030247 A3 WO03030247 A3 WO 03030247A3
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WO
WIPO (PCT)
Prior art keywords
contact surfaces
substrate
electrical contact
contact
film
Prior art date
Application number
PCT/DE2002/003615
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English (en)
French (fr)
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WO2003030247A2 (de
Inventor
Kerstin Haese
Laurence Amigues
Herbert Schwarzbauer
Norbert Seliger
Karl Weidner
Joerg Zapf
Matthias Rebhan
Original Assignee
Siemens Ag
Kerstin Haese
Laurence Amigues
Herbert Schwarzbauer
Norbert Seliger
Karl Weidner
Joerg Zapf
Matthias Rebhan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by Siemens Ag, Kerstin Haese, Laurence Amigues, Herbert Schwarzbauer, Norbert Seliger, Karl Weidner, Joerg Zapf, Matthias Rebhan filed Critical Siemens Ag
Priority to US10/491,137 priority Critical patent/US7402457B2/en
Priority to JP2003533338A priority patent/JP2005515616A/ja
Priority to EP02774408A priority patent/EP1430524A2/de
Priority to AU2002340750A priority patent/AU2002340750A1/en
Priority to KR1020047004531A priority patent/KR100896906B1/ko
Publication of WO2003030247A2 publication Critical patent/WO2003030247A2/de
Publication of WO2003030247A3 publication Critical patent/WO2003030247A3/de

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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/085—Using vacuum or low pressure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469—Circuit made after mounting or encapsulation of the components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Die Bonding (AREA)

Abstract

Bei dem Verfahren zum Kontaktieren elektrischer Kontaktflächen (21, 112) auf einer Oberfläche (20) eines Substrats (1) wird eine Folie (3) auf Polyimid- oder Epoxidbasis unter Vakuum auf die Oberfläche auflaminiert, so dass die Folie die Oberfläche mit den Kontaktflächen eng anliegend bedeckt und auf dieser Oberfläche haftet, jede zu kontaktierende Kontaktfläche auf der Oberfläche wird durch Öffnen jeweiliger Fenster (31) in der Folie freigelegt, und jede freigelegte Kontaktfläche wird mit einer Schicht (4) aus Metall flächig kontaktiert. Anwendung: Großflächige Kontaktierung von Leistungshalbleiterchips, die eine hohe Stromdichte erlaubt.
PCT/DE2002/003615 2001-09-28 2002-09-25 Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen WO2003030247A2 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US10/491,137 US7402457B2 (en) 2001-09-28 2002-09-25 Method for making contact with electrical contact with electrical contact surfaces of substrate and device with substrate having electrical contact surfaces
JP2003533338A JP2005515616A (ja) 2001-09-28 2002-09-25 基板の電気的コンタクト面の接続方法及び電気的コンタクト面を備えた基板からなるデバイス
EP02774408A EP1430524A2 (de) 2001-09-28 2002-09-25 Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen
AU2002340750A AU2002340750A1 (en) 2001-09-28 2002-09-25 Method for contacting electrical contact surfaces of a substrate and device consisting of a substrate having electrical contact surfaces
KR1020047004531A KR100896906B1 (ko) 2001-09-28 2002-09-25 기판의 전기적 콘택트면들과 콘택트하기 위한 방법 및전기적 콘택트면들을 갖는 기판을 포함하는 디바이스

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DE10147935.2 2001-09-28
DE10147935 2001-09-28

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WO2003030247A2 WO2003030247A2 (de) 2003-04-10
WO2003030247A3 true WO2003030247A3 (de) 2003-10-09

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US (1) US7402457B2 (de)
EP (1) EP1430524A2 (de)
JP (1) JP2005515616A (de)
KR (1) KR100896906B1 (de)
CN (1) CN1575511A (de)
AU (1) AU2002340750A1 (de)
WO (1) WO2003030247A2 (de)

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KR100896906B1 (ko) 2009-05-12
WO2003030247A2 (de) 2003-04-10
JP2005515616A (ja) 2005-05-26
KR20040037173A (ko) 2004-05-04
US7402457B2 (en) 2008-07-22
CN1575511A (zh) 2005-02-02
US20050032347A1 (en) 2005-02-10
AU2002340750A1 (en) 2003-04-14
EP1430524A2 (de) 2004-06-23

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