CN1178296C - 电路板及其制作方法和高输出模块 - Google Patents

电路板及其制作方法和高输出模块 Download PDF

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CN1178296C
CN1178296C CNB021412944A CN02141294A CN1178296C CN 1178296 C CN1178296 C CN 1178296C CN B021412944 A CNB021412944 A CN B021412944A CN 02141294 A CN02141294 A CN 02141294A CN 1178296 C CN1178296 C CN 1178296C
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circuit board
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田远伸好
依田润
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Sumitomo Electric Industries Ltd
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Abstract

一种电路板包括在陶瓷基底上形成第一金属层图形，在第一金属层上形成第二金属层图形，和形成覆盖第二金属层上表面及其大部分侧表面的第三金属层，其中没有被第三金属层覆盖的第一和部分第二金属层通过刻蚀宽度减小。第一、第二和第三金属层的合并厚度Dμm和相邻的布线图线条之间的距离Lμm之间满足如下关系，D/L＞0.4；其中第一、第二和第三金属层的合并厚度Dμm至少为5μm。该电路板具有精细的和高分辨率的布线图，使在其上面安装至少一个高输出半导体元件、实现小型高性能高输出模块成为可能。

Description

电路板及其制作方法和高输出模块
技术领域
本发明涉及用于半导体器件的陶瓷电路板，并涉及制作这种电路板的方法，以及涉及到高输出模块。
背景技术
半导体元件包括：LD(激光二极管或半导体激光器)，APD(雪崩光电二极管)，和其他这样的光半导体元件；HEMT(高电迁移率晶体管)，HBT(异质双极晶体管)，和其他使用GaAs，InP，Si/SiGe的半导体元件，或者能够高速工作的类似元件；IGBT(绝缘栅双极晶体管)和其他这样的变换器/整流器硅器件；BiTe和其他这样的热电半导体元件。为了更高的集成和速度，用于这些元件范围的电路板需要低电阻，良好的热辐射，很好匹配的热膨胀，和非常精细的布线图。
通过参考图4A-4F描述一种常规电路板。如图4A-4E所示，目前为止该方法一直如下所述。把金属掩模或者光掩模2施加到陶瓷基底1上(图4A)，用蒸镀或溅射形成第一金属层3，并且把金属掩模或者光掩模2去除(图4B)，之后形成抗蚀剂层4(图4C)，然后用蒸镀或溅射形成第二金属层5(图4D)，去除抗蚀剂层得到最终产品(图4E)。
陶瓷基底1用AlN或氧化铝制成。这已经被公开，比如在日本专利2-271585中。第一金属层用作抗蚀剂层，在其中一般使用TaN、NiCr或者钨。第二金属层用作导线或者电感，并且具有层迭结构包括Ti/Mo/Au、Ti/Pt/Au、Cr/Mo/Au或者Ti/V/Au。该层使用钛或者铬与陶瓷基底接触的原因是为了提高对于基底的粘和强度。因为铂、钼或者钒有高的熔点，把它插入中间就是为了防止顶层与用在上述接触部分的金属比如钛或者铬形成合金。金用作顶层，选择它是为了顺利进行引线接合或者芯片焊接。在最终产品中材料组合的例子如图4F所示。
对于用于功率半导体的基底，把铜或者金用蒸镀、镀覆或熔融应用到陶瓷基底的全部上表面，之后用刻蚀形成布线图。
为了生产高输出模块，把半导体元件用芯片焊接方法安装在这些电路板上。
对于目前的高输出模块，除了使模块更小来减少最终器件的尺寸，也需要使布线图更精细、尺寸减小，使其能够处理更高的频率。为了降低高频性能的损失和降低功耗，也有必要降低引线金属部分的电阻，为此有必要采用厚膜技术来提高布线图的厚度。
为了同时满足这两个要求，用作引线的金属层的厚度至少为5μm是必须的，引线厚度D和相邻的布线图线条之间的距离L之间的纵横比(D/L)为D/L＞0.4也是必须的，但是常规电路板不能被处理使得这两个要求能被满足。
这里的原因是用常规实际使用的精细布线方法，在依靠金属掩模或者光掩模用蒸镀方法形成了厚膜抗蚀剂层的基底上面，不能形成精细的布线图，并且为了获得厚膜，蒸镀必须连续进行很长时间，因此实际应用是困难的。此外，当布线图通过刻蚀形成时，因为出现侧面腐蚀，难于进行比引线厚度小的图形的精细处理，并且刻蚀去除尤其困难。因此，不能实现小型化的高性能、高输出模块。
发明内容
本发明的一个目的是提供具有厚膜精细布线图的电路板，并实现小型化高性能高输出模块。
为了解决以上问题，本发明提供一种电路板包括：在陶瓷基底上形成的第一金属层图形；在第一金属层上形成的第二金属层图形；和形成覆盖第二金属层上表面及其大部分侧表面的第三金属层，其中没有被第三金属层覆盖的第一金属层和部分第二金属层通过刻蚀宽度减小，
其中，第一金属层的厚度为0.12到1.2μm，且具有一由Ti/Mo/Ni，Ti/Pt/Ni，Ti/V/Ni，或者Ti/Pd/Ni组成的多层结构，
其中，第二金属层包括选自由铜、镍、银和铝构成的组中的至少一种；
其中，第三金属层由金，Ni/Au，和一包含Ni/中间层/Au的多层基底构成，该中间层适合于防止金的扩散且由钯、铂、钼、钨或者钒构成；
其中第一、第二和第三金属层的合并厚度Dμm和相邻的布线图线条之间的距离Lμm之间满足如下关系，
D/L＞0.4；
其中第一、第二和第三金属层的合并厚度Dμm至少为5μm。
优选地，第二金属层由铜，Cu/Ni，Ni/Cu/Ni，铝，Ni/Al/Ni，Al/Ni，或银构成。
优选地，第三金属层的最外层是金。
优选地，陶瓷基底包含至少一种选自由氧化铝、AlN和Si3N4陶瓷构成的组，该氧化铝陶瓷包含重量含量至少90％的氧化铝，该AlN陶瓷包含重量含量至少90％的AlN，及该Si3N4陶瓷包含重量含量至少90％的Si3N4。
优选地，陶瓷基底为金刚石或者cBN。
本发明还提供一种制作电路板的方法，包括：
在陶瓷基底上蒸镀或者溅射第一金属层；
形成抗蚀剂图形；
用抗蚀剂作为掩模在第一金属层上镀覆形成第二金属层；
把抗蚀剂层制成薄层；
在第二金属层上表面及其大部分侧表面镀覆形成第三金属层；
去除抗蚀剂层，然后刻蚀第一金属层及部分第二金属层，使得没有被第三金属层覆盖的第一金属层和部分第二金属层通过刻蚀宽度减小。
本发明还提供一种高输出模块，其中至少一种发热至少10mW的高输出半导体元件，经过焊料或者导电树脂安装在上述电路板上。
附图说明
图1是描述本发明电路板中布线的例子的截面图。
图2A-2H是描述本发明例子的电路板制作的步骤简图。
图3是在例子中生产的高输出模块的结构简图。
图4A-4E是描述常规电路板制作步骤的简图，图4F表示完成后电路板的材料组合简图。
具体实施方式
本发明的电路板按如下方法制作。首先，在陶瓷基底上蒸镀或者溅射形成与该基底粘接良好的第一金属层，比如Ti/Mo/Ni。在第一金属层上用光掩模形成光刻胶图形。在这个阶段，基底的整个表面能用作电极，因此在没有光刻胶的地方能选择性地镀覆形成第二金属层厚膜。然后将抗蚀剂层的厚度减薄。在第二金属层上面用镀覆形成第三金属层，比如金、Ni/Au或者具有多层结构的层，其中中间层(防止金扩散的层)例如钯，铂，钼，钨或者钒被插入在镍和金层之间，例如是Ni/Pt/Au层。把抗蚀剂层如上所述制成薄层，允许镀覆覆盖第二金属层整个上表面和抗蚀剂层被去掉的侧壁。这之后，抗蚀剂层被全部去除。
然后用刻蚀去除没有被第三金属层覆盖的第一金属层。如果第三金属层的最外层不会被用在第一金属层上的刻蚀液刻蚀，那么被第三金属层覆盖的部分不会被刻蚀，这样容许选择性刻蚀。比如说，如果第三金属层的最外层是金，第一金属层由Ti/Mo/Ni组成，金不会被用于镍和钼的刻蚀液刻蚀，因此金能用作这里刻蚀的掩模。钛只溶解于独立的氢氟酸基刻蚀液，但是由于金甚至不会被这种刻蚀液刻蚀，所以金能够作为选择刻蚀的掩模。
图1描述的例子为用这种方法获得的金属层的层结构。没有被第三金属层的金覆盖的侧壁，已经被侧壁刻蚀挖掉，钛甚至被挖掉的更大。
也可能在开始应用铬基(比如NiCr)金属化图形作为最下面的金属层，来定位光掩模或者作为抗蚀剂层。这最下面的金属层不会被任何刻蚀液刻蚀，因此将保留到最后。它与陶瓷也有良好的粘结性。
对于本发明，能用镀覆方法形成第二金属层，因此金属层能容易地制成厚膜，并且如上面提到，如果第二金属层被第三金属层部分覆盖，第三金属层的最外层不会被用于第一金属层的刻蚀液刻蚀，那么就能通过刻蚀形成布线图。
第一金属层具有多层结构，例如包括Ti/Mo/Ni，Ti/Pt/Ni，Ti/V/Ni，或者Ti/Pd/Ni。第一金属层的厚度适宜为0.12到1.2μm。如果这一层太薄，在基底的整个上表面上获得均匀金属化是困难的，但是如果这一层太厚，将会有太多侧壁刻蚀以至于精细加工是困难的。当第一金属层由Ti/Mo/Ni组成时，钛的厚度应该为0.01到0.3μm，钼的厚度应该为0.01到0.3μm，镍的厚度应该为0.1到0.6μm。
为了使第一、第二和第三金属层的合并厚度至少为5μm，形成在第一金属层上面的抗蚀剂层的厚度应该至少为5μm。如果该抗蚀剂层太薄，第二金属层将覆盖抗蚀剂层的顶部，导致不合要求的蘑菇形状。进而，第二金属层的相邻线条在抗蚀剂层上会互相连接。尽管提高抗蚀剂层的厚度是困难的，通过优化曝光条件能够提高该厚度，使形成带有垂直侧壁的精细布线图是可能的。用SOR(同步加速器轨道辐射)光曝光。形成厚膜抗蚀剂层使上面提到的蘑菇形状减到最小。
用于镀覆的光刻胶的图形精度从亚微米到10nm。光刻胶线条之间的微小间隔部分能用表面活化剂覆盖。能通过抛光或同类方法把抗蚀剂层制成为薄层。
对于本发明的电路板，第二金属层适宜包含至少一种金属选自铜、镍、银和铝。用镀覆形成至少5μm的厚膜是可能的。甚至比如说可以到200μm。保持第二金属层的厚度至少5μm能降低接线的电阻，例如适合于需要粗接线以减少热应力的热电半导体元件，比如珀耳帖元件。第二金属层的例子包括铜、Cu/Ni、Ni/Cu/Ni、铝、Ni/Al/Ni、Al/Ni和银。如果后续要进行合金化处理来提高粘接强度，只用铜是很好的，但是如果在铜的上面形成厚度至少为0.5μm的镍，对金或者Ni/Au的粘接会更好。
最好是尽可能多的第二金属层的侧壁表面被第三金属层覆盖。至少80％的第二金属层的侧壁表面被第三金属层覆盖是适宜的。覆盖至少80％的第二金属层的侧壁表面导致很少的侧壁刻蚀，侧壁刻蚀是在刻蚀第一金属层期间引起的。如果全部第二金属层被覆盖，将有必要减少用于形成第二金属层的抗蚀剂层的厚度。然而，均匀减少抗蚀剂层的厚度到第一金属层的水平是困难的。于是，在第三金属层的形成期间，用于形成第二金属层的抗蚀剂层用作局部掩模，因此整个第二金属层没有被第三金属层完全覆盖。
第三金属层的例子包括金，Ni/Au和多层结构，其中中间层(防止金扩散的层)例如钯，铂，钼，钨或者钒被插入在镍和金层之间，比如Ni/Pt/Au。第三金属层的最外层能是不被用于第一金属层的刻蚀液刻蚀的任何金属，但是在能够有利于进行后续步骤的方面，使用金作为最外层是特别合适的。
对于本发明的电路板，能用镀覆形成第二金属层，因此该金属层能是厚膜，能通过使用抗蚀剂层形成带有垂直侧壁的精细布线图，因此能够进行加工使得引线厚度D(单位为μm)和相邻的布线图线条之间的距离L(单位为μm)之间纵横比(D/L)为D/L＞0.4。在本发明中，引线厚度D是第一、第二和第三金属层的合并厚度，线条间隔L代表被第三金属层覆盖的第二金属层图形的线条之间的距离。
氧化铝可以用作陶瓷基底，但是由于热辐射对于高输出模块是重要的，因此更适宜用金刚石或cBN，或包括AlN和/或Si3N4重量含量至少90％的陶瓷。AlN提供低成本和高抗漏性基底。当需要强度时，使用Si3N4是首选的。也可以使用AlN和Si3N4的混合物。此外，如果基底表面太粗糙，由于分层的第一金属层的厚度，会发生断开，因此可能需要进行表面处理。
本发明也是一种高输出模块，包括至少一个产生至少10mW的热量的高输出半导体元件，通过焊料或者导电树脂连接在上述得到的电路板上。
本发明的例子将参照附图描述。
例1
在图2A中，含有AlN重量比至少90％的高热辐射陶瓷基底，含有钇，热导率为170W/(m·K)，被用作陶瓷基底11。陶瓷基底的表面被处理成表面粗糙度Ra小于0.8μm。这是因为后续层迭的第一金属层的厚度为0.5μm或更小，如果表面太粗糙可能发生断开。
金属掩模12施加到陶瓷基底11上，形成NiCr金属层13作为最下面的金属层。溅射设备用于此目的。尽管这层可以用作抗蚀剂层或者用作后续基底划线期间的定位掩模，这里NiCr层被选择用作抗蚀剂层。图2B描述当金属掩模12已经被除去时的阶段，之后NiCr图形作为最下面的金属层13保留在陶瓷基底11的表面上。
然后，如图2C所示，在陶瓷基底11的整个上表面蒸镀多层结构第一金属层14Ti/Mo/Ni。钛的厚度为0.05μm，钼的厚度为0.05μm，镍的厚度为0.3μm。
这时候，用光掩模形成抗蚀剂层15，如图2D所示。考虑到第二金属层的厚度，抗蚀剂层15的厚度为120μm。
然后，如图2E所示，包括Ni/Cu的第二金属层16用镀覆层迭形成。为了提高镀覆的粘接性，镍厚度为0.5μm，铜厚度为100μm。
如图2F所示，抗蚀剂层的厚度被用O2抛光减少到10μm。这是因为镀金一直进行到第二金属层的侧壁表面的铜部分。在这个阶段，第三金属层17包括Ni/Au被镀覆，使得覆盖铜线部分。镍厚度为1.3μm，金厚度为1.0μm。
除去抗蚀剂层如图2G所示，之后镍和钼被如图2H所示刻蚀。这里，在保护膜除去期间表面上形成镍氧化物膜，因此该氧化物膜被除去之后立刻用反应刻蚀液刻蚀镍和钼。钛用氢氟酸基刻蚀液去除。
第一、第二和第三金属层的合并厚度D(μm)为100μm，图形线条之间的距离L(μm)为40μm。引线之间的电阻至少为1MΩ，所得到的电路板也具有极好的绝缘。
在这个例子中，金属布线图形成在陶瓷基底的一侧，但是也能应用到两侧。
例2
用上述例1中的方法生产具有如图3所示图形的电路板。这里的布线层20中，第一金属层是Ti/Mo/Ni，第二金属层是Ni/Cu，第三金属层是Ni/Au，抗蚀剂层21是Ni/Cr。高输出LD(半导体激光器)18带有集成调制器，发热至少10mW，用焊料通过芯片焊接安装在电路板上，用焊线19进行引线接合，以生产出如图3所示的高输出模块。在安装LD之后，该模块的调制性能的SN比为0.1dB，比使用常规电路板好。用于安装LD的电路板的尺寸仅仅是常规电路板的四分之一，速度限制提高到40Gbps或者更高。
本发明使获得具有厚膜精细布线图形的小型化高性能电路板成为可能。因此获得小型化高性能高输出模块也成为可能。

Claims (7)

1、一种电路板，包括：第一金属层，其在陶瓷基底上形成图形；第二金属层，其在第一金属层上形成图形；和第三金属层，其形成覆盖第二金属层的整个上表面及其大部分侧表面，其中没有被第三金属层覆盖的第一金属层和部分第二金属层通过刻蚀宽度减小，
其中，第一金属层的厚度为0.12到1.2μm，且具有一由Ti/Mo/Ni，Ti/Pt/Ni，Ti/V/Ni，或者Ti/Pd/Ni组成的多层结构，
其中，第二金属层包括选自由铜、镍、银和铝构成的组中的至少一种；
其中，第三金属层由金，Ni/Au，和一包含Ni/中间层/Au的多层基底构成，该中间层适合于防止金的扩散且由钯、铂、钼、钨或者钒构成；
其中第一、第二和第三金属层的合并厚度Dμm和相邻的布线图线条之间的距离Lμm之间满足如下关系，
D/L＞0.4；
其中第一、第二和第三金属层的合并厚度Dμm至少为5μm。
2、如权利要求1的电路板，其中第二金属层由铜，Cu/Ni，Ni/Cu/Ni，铝，Ni/Al/Ni，Al/Ni，或银构成。
3、如权利要求1或2的电路板，其中第三金属层的最外层是金。
4、如权利要求1到3中任一项的电路板，其中陶瓷基底包含至少一种选自由氧化铝、AlN和Si3N4陶瓷构成的组，该氧化铝陶瓷包含重量含量至少90％的氧化铝，该AlN陶瓷包含重量含量至少90％的AlN，及该Si3N4陶瓷包含重量含量至少90％的Si3N4。
5、如权利要求1到3中任一项的电路板，其中陶瓷基底为金刚石或者cBN。
6、一种制作电路板的方法，包括：
在陶瓷基底上蒸镀或者溅射第一金属层；
形成抗蚀剂图形；
用抗蚀剂作为掩模在第一金属层上镀覆形成第二金属层；
把抗蚀剂层制成薄层；
在第二金属层上表面及其大部分侧表面镀覆形成第三金属层；
去除抗蚀剂层，然后刻蚀第一金属层及部分第二金属层，使得没有被第三金属层覆盖的第一金属层和部分第二金属层通过刻蚀宽度减小。
7、一种高输出模块，其中至少一种发热至少10mW的高输出半导体元件，经过焊料或者导电树脂安装在权利要求1的电路板上。
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TW583722B (en) 2004-04-11
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