CN1175089A - 一种装配半导体元件到衬底上的构件及其装配方法 - Google Patents

一种装配半导体元件到衬底上的构件及其装配方法 Download PDF

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CN1175089A
CN1175089A CN97115428A CN97115428A CN1175089A CN 1175089 A CN1175089 A CN 1175089A CN 97115428 A CN97115428 A CN 97115428A CN 97115428 A CN97115428 A CN 97115428A CN 1175089 A CN1175089 A CN 1175089A
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substrate
semiconductor element
projection
resin molding
alloy
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CN1121062C (zh
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山本诚一
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Sharp Corp
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Sharp Corp
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Abstract

一种半导体元件/衬底装配构件,通过下列步骤形成:在第1步骤,在具有导电部分的衬底上覆盖树脂膜;在第2步骤,进行热压,使凸起穿过树脂膜和导电部分接触;在第3步骤,进行热压,使凸起和导电部分在半导体元件和衬底之间形成合金。

Description

一种装配半导体元件 到衬底上的构件及 其装配方法
本发明涉及装配半导体元件到衬底上的构件及其装配方法，特别涉及装配下述半导体元件到衬底上的构件及其装配方法，其中，把有凸起(bump)的半导体元件(芯片)装配到柔韧衬底等的导电部分上。
参考图1A到图1D，叙述现有技术。图1A到图1D表示常规例子中装配半导体元件方法的工序图。
如图1A所示，装配具有由金构成的凸起102的半导体芯片103到柔韧衬底101上，该衬底具有作为导电部分的导体图形100。此处，用锡镀覆导体图形100的表面。至于这些凸起的数目，如果半导体芯片用作IC(集成电路)，其数目对应于端子的数目，通常，该芯片具有几十到几百个凸起。
如图1B所示，如此设置衬底和芯片，使凸起102和导体图形100相互接触，然后把它们相互热压。在280℃到600℃下进行该工艺，每个凸起大约为100μm的方块，对其以10到60gf的负载加压。结果，凸起102和镀在导体图形表面的锡，形成金锡合金层104。因此，半导体芯片103被固定并电连接到柔韧的衬底101上。
如图1C所示，接着把流体的树脂105施加到半导体芯片103和柔韧的衬底101之间，并填充到芯片的侧面，最后形成如图1D所示的半导体芯片的装配构件。
图2表示另一个传统例子的半导体元件的装配构件剖面图。和图1A到图1D所示的元件具有相同功能的元件，用相同的标号表示。在该例中，把具有分散在其中的导电颗粒106的各向异性导电膜107设在柔韧衬底101上，衬底101在其上形成导电图形100。同时通过加热，把具有凸起102的半导体芯片103压在各向异性的导电膜107上面。利用各向异性导电膜107中的导电颗粒106来电连接柔韧衬底101上的凸起102和导体图形100。利用由加热固化的各向异性导电膜107连接半导体芯片103和柔韧衬底101。
在此情况下，所加的压力和图1A到1D的情况相似，而不需要图1A到图1D所示形成合金层的温度，只需要固化各向异性导电膜107；这意味着设定温度大约200℃。
在图1A到图1D所示的传统例子中，在制成如图1D所示的产品时，要进行电测试等工序。即在凸起102和柔韧衬底101的导体图形100之间形成合金层104后，进行检验该产品，然后涂覆树脂105作为填料。然而，在此情况下，通过合金层104已经把半导体芯片103牢固地固定在柔韧衬底101上。
因此，在制成产品后通过电测试等，如发现半导体芯片103有缺陷，则需要剥掉柔韧衬底101上面的导体图形100，以便除去有缺陷的半导体芯片103。这意味着着不能重复利用柔韧衬底101，导致浪费。
而且，在图1B所示的加热步骤，形成合金层104，在柔韧衬底101导体图形100表面上的锡，容易和凸起102相结合。结果，出现这种情况，合金层104大大地伸出半导体芯片103的凸起102和导体图100之间的连接处。如此形成的合金层104直接地和相邻凸起或者其它导体图形相互接触，引起边缘漏电。
还有，由于该衬底是柔韧的衬底，如果衬底在图3所示的圆圈部分A弯曲，过大的合金层104容易和半导芯片103端面相互接触。
在如图2所示的装配构件和装配方法中，采用各向异性导电膜107。然而，导电颗粒106在膜中不总是均匀地分散。在某些区域导电颗粒106以相对大的密度存在。大颗粒密度的这些位置可能使作为半导体芯片103的连接区的电路受到损伤。
此外，导电颗粒106在凸起102和柔韧衬底101之间起电连接的作用，但导电颗粒106的不均匀性增大连接电阻，或者增大不可靠的连接，在最坏情况下，引起断路。
本发明的目的是提供半导体元件的装配构件及其制造方法，其中如果在制成产品后，半导体芯片出现缺陷，则可能替换有缺陷的芯片，以便重复利用衬底，而且还可能建立一个稳定的通路而不引起通常产生的任何边缘漏电问题。
为了获得上述目的和实现本发明，本发明的要点如下：
按照本发明的第一方面，一种通过凸起装配具有凸起的半导体元件到衬底的导电部分的半导体元件/衬底装配构件，其特征是，这些凸起被熔成合金(alloyed)，以便与衬底的导电部分连接在一起，形成的合金部分穿透树脂膜，该树脂膜覆盖包含有导电部分的衬底。
按照本发明的第二方面，具有上述第一特征的半导体元件/衬底装配构件，其特征在于衬底是柔韧型的衬底。
按照本发明的第三方面，具有上述第一特征的半导体元件/衬底装配构件，其特征在于，该树脂膜具有在一定温度范围内引起交链的特性，在该温度范围内，衬底上的凸起和导电部分变成合金。
按照本发明的第四方面，用于装配有凸起的半导体元件使各凸起连到衬底导体部分的半导体元件装配方法，包括下列步骤：
第1步骤，把树脂膜覆盖在具有导电部分的衬底上，
第2步骤，进行热压使凸起穿透树脂膜和导电部分相互接触，
第3步骤，进行热压使凸起和导电部分在半导体元件和衬底之间形成合金。
按照本发明的第五方面，有上述第四特征的半导体元件装配方法，其特征是，该衬底是柔韧型的衬底。
按照本发明第六方面，具有上述第四特征的半导体元件的装配方法，其特征是，该树脂膜具有这样的特性，即在第2步骤期间不发生交链反应，在第3步骤期间发生交链反应以固化树脂膜。
按照上述方案在把半导体元件凸起和导电部分形成合金之前，已经进行适当的电测试。因此，当通过测试判断出半导体芯片有缺陷时，能容易替换有缺陷的半导体芯片，使衬底本身重复使用。因此，和传统结构相比较，可以减少浪费，于是提高成本的效益。
此外，由于当通过热压形成合金层时，由树脂膜包围每个凸起，所以不会出现使镀在导体图形表面上的锡朝向凸起聚集，并形成从半导体芯片端面延的合金层的现象，即不发生上述的现有技术的问题。结果，可以解决传统结构发生的边缘漏电的问题。
尤其对于具有柔韧性的柔韧衬底，上述效果更有效。
图1A到图1D是表示按照已有技术例子把半导体元件装配到衬底的工艺步骤图；
图2是表示按照已有技术另一例子把半导体元件装配到衬底的方法的剖面图；
图3是表示如图1A到图1D所示已有技术例子中存在的问题的剖面图；
图4A到图4D是表示按照本发明实施例把半导体元件装配到衬底上的工艺步骤图。
下面参考图4A到图4D叙述本发明的一个实施例。图4A到图4D是表示按照本发明半导体元件装配方法的工艺步骤图。和图1A到图1D所示已有实施例的元件有相同功能的元件，用相同的标号表示。
如图4A所示，在本实施例中，具有由金构成的凸起102的半导体芯片103装配到其上形成有导体图形100的柔韧的衬底101上。柔韧衬底101中的绝缘材料是由聚酰亚胺或聚脂制成，导体图形100由铜制成，铜的表面镀锡。
其中，导体图形100的镀锡厚度为0.1-5μm，凸起的高度是5-50μm。
如图4B所示，首先，把树脂膜1涂覆在导体图形100和柔韧衬底101的表面上，树脂材料膜1可以采用环氧树脂，聚脂、氟树脂，和上述树脂的任意合成树脂。更具体地说明，例如，能用图2所示传统例子中利用的除掉导电颗粒106的各向异性导电膜107。该厚度至少为10μm，并且大于凸起102的高度。
接着，如图4C所示，在加热的同时，将半导体芯片103的凸起102对着柔韧衬底101上面的导体图形100压上去，它们之间夹有树脂膜1。设定这样的温度范围，使树脂膜1变软但是不固化。设定加热温度大约为100℃。
因为电镀期间晶体生长，使得凸起102表面和导体图形100的镀锡表面变得粗糙，则在上述热压工艺期间，凸起102和导体图形100，彼此穿过树脂膜1相互接触。
在半导体芯片103和柔韧衬底101电连接时，要进行必要的电测试。在这阶段，远没完成最后产品装配，通过暂时电连接进行测试。在此情况，一旦凸起102和导体图形100相互接触，则即使半导体芯片103不压向柔韧的衬底101，该连接状态也继续下去。还有，最好轻微加压，以便保证电连接。由这些测试结果可知，如果半导体芯片103出现缺陷，则从柔韧衬底101上除掉半导体芯片103。
在传统结构中，由于不可避免的是在凸起102和导体图形100之间形成合金层104后除掉有缺陷芯片时，在用力除掉有缺陷的芯片时，则同时也要整个剥掉导体图形100，这样就不可能重新利用衬底。相反，按照本实施例，只是使凸起102和导体图形100触接，而不是相互连接，则可以容易除掉有缺陷芯片，而不会在柔韧衬底的导体图形100中引起高应力。
电测试结果，如果没发现问题，则把半导体芯片103和柔韧衬底101热压在一起，使凸起102和导体图形100形成合金层104，于是完成可靠的芯片和衬底的连接，如图4D所示。其中，热压条件和图1A-图1D所示的情况相同。具体地说，在280℃到600℃的温度下进行该工艺，每个凸起是大约100μm的方块，加压为10到60gf。
当形成上述合金层104时，树脂膜1也变成固化。采用这种方式，必须由于树脂膜1在高温范围下交链实现固化或硬化，在此高温范围能形成合金层。因此本实施例采用具有高温固化特性的树脂膜。
如前所述，在本实施例，由于在如图4C所述前步骤之前，即在由半导体芯片103的凸起102和柔韧衬底101的导电图形100形成合金层104前，进行电检测，如果发现有缺陷的半导体芯片103，能容易替换有缺陷的半导体芯片103，这样能重复地利用柔韧衬底101。这和传统结构相比能提高成本的效益减少浪费。
还有，因为在如图4C所示的步骤，凸起102穿透树脂膜1，如图4D所示，为了形成合金层，通过热压工艺由树脂膜1已经覆盖各凸起102。因此，下述现象没有发生，即在导体图形100表面上的镀锡聚向凸起102，并由此形成从半导体芯片端面向外延伸的合金层。也就是已有技术中存在的问题不再出现。结果，可以解决传统结构中产生的边缘漏电问题。
当把具有柔韧特性的柔韧衬底用作本实施例的衬底时，在生产或者用于图3所示的情况时，可使衬底弯曲。这在传统结构中引起漏电。但是按照本实施例，可以解决该问题，这样使这种结构特别适合于具有柔韧特性的柔韧衬底。
在本实施例，取代采用图2所述各向异性导电膜，通过由合金层104构成半导体芯片103和柔衬底101之间的电连接，使得可以产生可靠的电连接。
虽然，在上述实施例中，利用金作为凸起102的材料和利用锡电镀导体图形100的表面，在其它实施例中，也可以利用焊锡作为凸起102的材料，和利用金涂镀导体图形100。在此情况，凸起102的高度为5-100μm，镀在导体图形100上的金厚度优选为0.05μm或以上。至于相应于图4D步骤中所用温度200-350℃是合适的。所用压力设为与上述实施例相同。
虽然，在上述实施例中，是使用由其上具有导体图形100的绝缘材料构成的柔韧衬底101作为衬底，但也可以使用在衬底和图形之间提供粘合层的结构。衬底的材料不限于其柔韧性，也可以使用由有机材料构成的硬衬底或陶瓷衬底。作为硬衬底可能使用的材料包括环氧树脂、玻璃环氧树脂、聚四氟乙烯、酚醛树脂。作为陶瓷衬底的材料包括氧化铝、氧化锆，氮化硅和碳化硅陶瓷。
如前所述，按照本发明，当从电测试等判定出半导体芯片为有缺陷的半导体芯片时，能容易地只换掉有缺陷的半导体芯片，使得能重复地利用要装配半导体芯片的衬底。因此和传统结构比较可能减少浪费，提高成本的效益。
此外，利用半导体芯片的凸起和衬底的导体图形形成合金层不会从半导体芯片的端面延伸出，使得可以消除由于合金层和图形等的其它区域接触或者和半导体芯片本身的端面接触而产生的传统的漏电问题。
本发明不使用各向异性导电膜，而利用合金层在半导体芯片和衬底之间形成电连接，所以可能产生可靠的电连接。

Claims (6)

1.一种半导体元件/衬底装配构件，利用各凸起把具有凸起的半导体元件装配到衬底的导体部分上，其特征在于，将所述凸起形成合金，以便和衬底上的导体部分连在一起，该合金部分穿过一树脂膜而形成，该树脂膜设置为覆盖包含导体部分的衬底。
2.如权利要求1所述的半导体元件/衬底装配构件，其特征在于，所述衬底是柔韧型的衬底。
3.如权利要求1所述的半导体元件/衬底装配构件，其特征在于，所述树脂膜在使所述各凸起和所述衬底上的导电部分形成合金的温度范围内，具有交链的特性。
4.一种半导体元件的装配方法，用于装配具有凸起的半导体元件，使各凸起和衬底的导电部分相连，其包括下列步骤：
第1步骤，在具有所述导电部分的所述衬底上覆盖一树脂膜；
第2步骤，进行热压使所述凸起穿透该所述树脂膜和所述导电部分接触；以及
第3步骤，进行热压使所述各凸起和所述导电部分在所述半导体元件和衬底之间形成合金。
5.如权利要求4所述的半导体元件装配方法，其特征在于，所述衬底是柔韧型的衬底。
6.如权利要求4所述的半导体元件装配方法，其特征在于，所述树脂膜具有下述特性，在第2步骤期间没有交链反应发生，但在第3步骤期间交链反应发生，以便固化该树脂膜。
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CN1121062C (zh) 2003-09-10
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