KR970067732A - 접착 조성물의 수축으로 인한 파손이 적은 반도체 칩과 기판 사이의 전기적 접속을 갖는 반도체 소자 및 그 실장 방법 - Google Patents

접착 조성물의 수축으로 인한 파손이 적은 반도체 칩과 기판 사이의 전기적 접속을 갖는 반도체 소자 및 그 실장 방법 Download PDF

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KR970067732A
KR970067732A KR1019970007700A KR19970007700A KR970067732A KR 970067732 A KR970067732 A KR 970067732A KR 1019970007700 A KR1019970007700 A KR 1019970007700A KR 19970007700 A KR19970007700 A KR 19970007700A KR 970067732 A KR970067732 A KR 970067732A
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composition layer
adhesive composition
circuit component
electrical circuit
semiconductor device
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KR100244047B1 (ko
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후또시 나까니시
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가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
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Abstract

접착 조성물층 (12) 은 반도체 칩 (10) 의 반대측면을 기판 (11)의 주 표면에 접착시키고, 복원 조성물층(13) 은 반도체 칩의 상면에 형성시켜, 제 1 힘에 기인하는 제 1 모멘트 (M1) 가 제 2 힘 (F2) 에 기인하는 제 2 모멘트 (M2)에 의해서 감소 또는 상쇄되도록, 접착 조성물층 및 복원 조성물층이 열경화되는 동안 수축하는데 기인하는 반대측면에 제 1 힘 (F1) 및 상면 상에 제 2 힘 (F2) 을 인가함으로서, 반도체 칩의 바람직하지 않은 휨을 방지한다.

Description

접착 조성물의 수축으로 인한 파손이 적은 반도체 칩과 기판 사이의 전기적 접속을 갖는 반도체 소자 및 그 실장 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도 3은 본 발명에 따른 반도체 소자의 구조를 도시한 단면도.

Claims (12)

  1. 표면을 갖는 절연판 (11a) 및 상기 절연판의 상기 표면상에 형성된 한 개 이상의 도체 배선 (11b/11c)을 갖는 기판(11;21), 제 1표면, 상기 제 1표면의 반대측의 제 2표면, 및 상기 제 1표면상에 형성되어 한 개 이상의 상기 도체 배선과 접촉하는 한 개 이상의 전극 (10a/10b) 을 갖는 전기 회로 부품 (10;20), 및 상기 전기 회로 부품을 상기 기판에 접착하기 위해 기판의 제 1표면과 상기 전기 부품의 상기 제 1표면 사이에 형성되어, 경화되는 동안 수축에 의해 상기 전기회로 부품의 상기 제 1표면에 상기 제 1힘 (F1)을 인가하는 경화된 접착조성물 (12;22)을 구비하는 반도체 소자에 있어서, 상기 전기회로 부품의 상기 제 2표면상에 복원 조성물층 (13;24)을 형성하여 그 수축에 의해 상기 전기 부품의 상기 제2표면상에 제2힘을 인가함으로서, 상기 전기 회로 부품의 상기 제 1표면상에 인가되는 상기 제 1힘에 기인하는 모멘트를 감소시키는 것을 특징으로 하는 반도체 소자.
  2. 제1항에 있어서, 상기 경화된 접착조성물 및 상기 복원 조성물층을 위한 조성물이 에폭시 시스템의 합성 수지인 것을 특징으로 하는 반도체 소자.
  3. 제1항에 있어서, 상기 합성 수지가 가열에 의해 경화되는 것을 특징으로 하는 반도체 소자.
  4. 제1항에 있어서, 상기 경화된 접착조성물 및 상기 복원 조성물층을 위한 조성물이 에폭시 시스템의 합성 수지이고, 서로의 두께가 거의 같은 것을 특징으로 하는 반도체 소자.
  5. 제1항에 있어서, 바람직하게는 상기 전기 회로 부품의 상기 제 2표면에 접촉하고 상기 복원 조성물층 (24)에 의해 상기 전기 회로 부품에 접착된 히트 싱크(23)를 더 구비하는 것을 특징으로 하는 반도체소자.
  6. a)주 표면상에 한 개 이상의 도체층(11b/11c)으로 형성된 기판(11;21), 상기 주표면 상에 형성된 접착 조성물층(15;30), 전기 회로 부품의 반대측면으로부터 돌출되어 상기 접착 조성물층을 통해 한 개 이상의 상기 도체층에 대향하는 한 개 이상의 전극을 갖는 전기 회로 부품(10;20), 및 상기 전기 회로 부품의 상면에 형성된 복원 조성물층(13;31)을 갖는 중간 구조물을 준비하는단계,
    b)상기 한 개 이상의 전극을 한 개 이상의 도체 층에 접촉하도록 상기 접착 조성물층르로 상기 전기 회로 부품을 누르는 단계, 및
    c)상기 전기 회로 부품을 상기 기판에 고착하기 위해 적어도 상기 접착 조성물층을 경화시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 실장 방법.
  7. 제6항에 있어서, a)단계가
    a-1)상기 전기 회로부품(10)을 준비하는 단계,
    a-2)상기 복원 조성물층(13)으로 상기 전기 회로부품의 상기 상면을 코팅하는 단계,
    a-3)상기 접착 조성물층 (15)으로 상기 기판(11)의 상기 주 표면을 코팅하는 단계 및
    a-4)한 개 이상의 상기 도체층과 한 개 이상의 전극을 정렬시키는 방식으로 상기 접착 조성물층에 상기 전기 회로부품(10)을 위치시키는 단계인 서브 단계를 포함하는 것을 특징으로 하는 반도체 소자의 살장방법.
  8. 제6항에 있어서, 상기 접착 조성물층(15;30)이 가열에 의해 경화되는 것을 특징으로 하는 반도체 소자의 실장 방법.
  9. 제8항에 있어서, 접착 조성물층(15)은 제1온도에서 경화되고, 상기 복원 조성물층 (13)은 상기 제 1온도 보다 낮은 제2온도에서 부드러워지는 것을 특징으로 하는 반도체 소자의 실장방법.
  10. 제9항에 있어서, 열이 상기 복원 조성물층(13)을 통해 상기 접착 조성물층 (15)에 인가되는 것을 특징으로 하는 반도체 소자의 실장 방법.
  11. 제6항에 있어서, 상기 a)단계가
    a-1) 상기 기판(21)을 준비하는 단계,
    a-2)상기 접착 조성물층 (30)으로 상기 기판의 상기 주 표면을 코팅하는 단계,
    a-3)한 개의 이상의 상기 도체층과 한 개 이상의 전극을 정렬시키는 방식으로 상기 접착 조성물층 상에 상기 전기회로 부품을 위치시키는 단계,
    a-4) 상기 복원 조성물층(31)으로 상기 상면을 코팅하는 단계, 및
    a-5) 상기 복원 조성물층에 히트 싱크(23)를 위치시키는 단계인 서브 단계를 포함하고,
    상기 전기회로 부품(20) 은, 한 개 이상의 상기 전극 및 상기 히트 싱크가 상기 접착 조성물층 및 상기 복원 조성물층으로 하강 하도록 상기 히트 싱크(23)를 통해 상기 접착 조성물층으로 각각 눌려지는 것을 특징으로 하는 반도체 소자의 실장방법.
  12. 제11항에 있어서, 상기 복원 조성물층이 상기 c)단계에서 동시에 경화되는 것을 특징으로 하는 반도체 소자의 실장 방법.
KR1019970007700A 1996-03-08 1997-03-07 접착 조성물의 수축으로 인한 파손이 적은 반도체 칩과 기판 사이의 전기적 접속을 갖는 반도체 소자 및 그 실장 방법 KR100244047B1 (ko)

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US6730998B1 (en) * 2000-02-10 2004-05-04 Micron Technology, Inc. Stereolithographic method for fabricating heat sinks, stereolithographically fabricated heat sinks, and semiconductor devices including same
US6502926B2 (en) 2001-01-30 2003-01-07 Lexmark International, Inc. Ink jet semiconductor chip structure
JP4714026B2 (ja) * 2006-01-10 2011-06-29 株式会社東芝 電子部品実装装置、電子部品実装方法及び電子部品装置
KR20090044636A (ko) * 2007-11-01 2009-05-07 삼성전자주식회사 반도체 칩 패키지 및 그의 형성방법
JP5088489B2 (ja) * 2008-03-03 2012-12-05 セイコーエプソン株式会社 半導体モジュール及びその製造方法
JP5533199B2 (ja) * 2010-04-28 2014-06-25 ソニー株式会社 素子の基板実装方法、および、その基板実装構造
US20220352108A1 (en) * 2019-12-04 2022-11-03 3M Innovative Properties Company Circuits Including Micropatterns and Using Partial Curing to Adhere Dies

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JPH05235063A (ja) * 1992-02-21 1993-09-10 Nippon Steel Corp 半導体装置
EP0700947A3 (en) * 1994-09-08 1996-05-01 Sumitomo Chemical Co Epoxy resin composition and plastic-coated semiconductor device
KR0181615B1 (ko) * 1995-01-30 1999-04-15 모리시다 요이치 반도체 장치의 실장체, 그 실장방법 및 실장용 밀봉재
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