CN1141739C - 引线架用复层板、利用了该复层板的引线架、及其制造方法 - Google Patents

引线架用复层板、利用了该复层板的引线架、及其制造方法 Download PDF

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CN1141739C
CN1141739C CNB998114782A CN99811478A CN1141739C CN 1141739 C CN1141739 C CN 1141739C CN B998114782 A CNB998114782 A CN B998114782A CN 99811478 A CN99811478 A CN 99811478A CN 1141739 C CN1141739 C CN 1141739C
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foil material
nickel
lead frame
copper
copper foil
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CN1320276A (zh
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西l谨二
西條谨二
吉田一雄
大泽真司
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Toyo Kohan Co Ltd
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Abstract

一种制造成本低而且具有优良性能的引线架用复层板、利用了该复层板的引线架、及该引线架的制造方法,引线架用复层板通过在0.1-3%的压下率下压焊铜箔材与镍箔材而制造,或通过在0.1-3%的压下率下压焊在单面或两面具有镀镍层的铜箔材与其它铜箔材而制造,或通过在0.1-3%的压下率下压焊铝箔材与镍箔材而制造,或通过在0.1-3%的压下率下压焊在单面具有镀镍层的铜箔材与上述铝箔材以外的铝箔材而制造,该引线架用复层板为铜/镍/铜或铜/镍/铝3层。

Description

引线架用复层板、利用了该复层板 的引线架、及其制造方法
技术领域
本发明涉及一种引线架(lead frame)的制造方法,特别是涉及一种可利用由冷压焊形成的复层板制造的引线架。
背景技术
近年来,随着半导体器件的高集成化、多插脚化(多ピン化)、小型化、或电子设备的小型轻量化,对高密度的安装基板提出了要求。
对于半导体芯片与引线架的连接,针对可比现有连线更能减少组装工序、减小部件尺寸和成本的带凸起(バンプ)的金属引线进行了研究和开发。即,在引线前端形成凸起,通过该凸起与半导体芯片接合。这样,可使部件薄型化。
作为形成凸起的一个方式,尝试着使用3层复层板作为引线架制造用的金属材料。
特开平9-115965号公报公开了利用这样的3层复层板制造引线架的方法。在该制造方法中,由纯铜板夹着高硬度铜板制作复层板。
然而,在上述方法中,由于在复层板内部不存在止蚀层,所以,存在化学腐蚀控制难的问题点。
另外,有的制造引线架的方法由利用了铝和铁系合金的3层复层板作为止蚀层,但由于它们由通常的冷压延形成,所以,压下率必须变高,为此,接合面的平坦性变差,另外,存在热处理时在铜板与止蚀层的界面生成合金、选择腐蚀差的问题。
作为制造引线架的另一方法,具有由蒸镀法形成金属薄膜的方法,但在该方法中,覆膜形成得较薄(几个μm)时,易产生孔,较厚(10μm)时,作业性差,成本高。
发明内容
本发明就是为了解决这样的问题而作出的,其目的在于提供一种引线架用复层板、利用该复层板的引线架及其制造方法,该引线架制造成本低而且选择腐蚀性良好。
本发明的引线架用复层板的制造方法的特征在于:通过在0.1-3%的压下率下压焊(压接)铜箔材与镍箔材而制造。
本发明的引线架用复层板的制造方法的特征在于:通过在0.1-3%的压下率下压焊在单面或两面具有镀镍层的铜箔材与其它铜箔材而制造。
本发明的引线架用复层板的制造方法的特征在于:通过在0.1-3%的压下率下压焊铝箔材与镍箔材而制造。
本发明的引线架用复层板的制造方法的特征在于:通过在0.1-3%的压下率下压焊在单面具有镀镍层的铜箔材与其它铝箔材而制造。
本发明的引线架用复层板的制造方法的特征在于:为铜/镍/铜3层。
本发明的引线架用复层板的制造方法的特征在于:为铜/镍/铝3层。
本发明的引线架的特征在于:对权利要求1-6中任何一项所述的复层板选择性地进行腐蚀,形成凸起。
本发明的引线架制造方法的特征在于:通过在0.1-3%的压下率下将铜箔材或铝箔材与形成止蚀层的镍箔材或形成了镀镍层的铜箔材压焊以形成引线架用复层板,选择性地对该多层复层板腐蚀,形成铜或铝构成的凸起。
本发明的引线架制造方法的特征在于:在真空槽内对上述铜箔材或铝箔材与上述镍箔材或镀镍层的接合面预先进行活化处理后,将上述铜箔材或铝箔材与上述镍箔材或镀镍层层压,在0.1-3%的压下率下进行冷压焊,进行上述活化处理时,(1)在1×10-1~1×10-4Torr的极低压惰性气体氛围中,(2)使具有接合面的上述铜箔材或铝箔材与上述镍箔材或镀镍面分别作为接地一方的电极A,在与受到绝缘支承的另一电极B之间供给1-50MHz的交流,进行辉光放电,(3)而且,露出到由上述辉光放电产生的等离子体中的电极的面积在电极B的面积的1/3以下,(4)进行溅射蚀刻(Sputter-etching)。
本发明的一种引线架制造方法,首先在真空槽内对铜箔材或铝箔材的接合面和镍箔材或镀镍层的接合面预先进行活化处理,层压上述铜箔材或铝箔材至上述镍箔材或镀镍层,然后在0.1-3%的压下率下进行冷压焊,形成上述引线架用复层板,其中:进行上述活化处理时,(1)在1×10-1×10-4Torr的极低压惰性气体氛围中,(2)使具有接合面的上述铜箔材或铝箔材与上述镍箔材或镀镍面分别作为电接地一方的电极A与受到绝缘支承的另一电极B之间供给1-50MHz的交流电,进行辉光放电,(3)进行溅射蚀刻,(4)而且,露出到由上述辉光放电产生的等离子体中的电极A的面积在电极B的面积的1/3以下。
附图说明
图1为本发明一实施形式的引线架的制造方法的工序说明图。
图2为本发明一实施形式的引线架的制造方法的工序说明图。
图3为本发明一实施形式的引线架的制造方法的工序说明图。
图4为本发明一实施形式的引线架的制造方法的工序说明图。
图5为本发明一实施形式的引线架的制造方法的工序说明图。
图6为本发明一实施形式的引线架的制造方法的工序说明图。
图7为本发明一实施形式的引线架的制造方法的工序说明图。
图8为复层金属板的制造装置的断面正面图。
具体实施方式
下面,参照附图所示一实施形式具体说明本发明。
首先,参照图7说明本发明一实施形式的引线架的构造。如图所示,在铜箔材或铝箔材20构成的外引线层10(厚度为10-100μm)的一面接合镍箔材(厚度为5-10μm)或镀镍层构成的止蚀层11(厚0.5-3μm),形成引线。另外,还形成由内引线层的铜箔材24构成的凸起12(厚10-100μm)和外部端子13。通过使半导体芯片14和凸起12接合,形成引线架。
下面,说明上述引线架的制造方法。首先,当制造引线架时,在成为外引线层10的铜箔材20(厚10-100μm)的一面形成作为止蚀层11的镀镍层21(厚0.5-3μm),制造镀镍铜箔材22(参照图1)。
镀镍的铜箔材22卷取在图8所示复层板制造装置的开卷轴23上。另外,成为内引线层的铜箔材24卷取在开卷轴25上。
从开卷轴23、25同时地对镀镍铜箔材22和铜箔材24开卷,将其一部分卷取到凸出于腐蚀室26内的电极辊27、28,在腐蚀室26内,进行溅射蚀刻处理,使其活化。
此时,活化处理如本申请人在这之前由特开平1-224184号公报公开的那样,(1)在1×10-1~1×10-4Torr的极低压惰性气体氛围中,(2)使具有接合面的镀镍铜箔材22和铜箔材24分别作为接地的一方的电极A,在与受到绝缘支承的另一电极B之间供给1-50MHz的交流,进行辉光放电,(3)而且,露出到由上述辉光放电产生的等离子体中的电极的面积在电极B的面积的1/3以下,(4)进行溅射蚀刻。之后,由设于真空槽29内的压延装置30进行冷压焊,将具有3层构造的引线架用复层板31卷取到卷取轴32上加以制造。
在上面说明了对在铜箔材预先形成镀镍层的材料进行压焊的例子,但也可以利用上述设备在铜箔材或铝箔材上压焊镍箔材,以替代镀镍层。在该场合,通过使用上述设备反复进行压焊,可按铜/镍/铜或铜/镍/铝的顺序,制造在中间层介入了镍层的3层复层板(クラッド板)。
下面,说明该场合的制造方法。首先,在制造引线架时,将成为外引线层10的铜箔材或铝箔材20(厚10-100μm)(参照图1)卷取到图8所示复层板制造装置的开卷轴23。另外,将成为止蚀层11的镍箔材21(厚5-10μm)卷取到开卷轴25。
从开卷轴23、25同时将铜箔材或铝箔材20和镍箔材21开卷,将其一部分卷取到凸出于腐蚀室26内的电极辊27、28,在腐蚀室26内,进行溅射蚀刻处理,使接合面活化。之后,将这些活化面作为接合面,由压延装置30进行冷压焊,形成具有2层构造的带镍箔的铜箔材或铝箔材22。之后,将该具有2层构造的复层板卷取到卷取辊32。
接着,将该具有2层构造的带镍箔的铜箔材或铝箔材22再次卷取到开卷轴23。另外,将成为内引线层的铜箔材24卷取到开卷轴25。从开卷轴23、25同时对带镍箔的铜箔材或铝箔材22和铜箔材24开卷,将其一部分卷取到凸出于腐蚀室26内的电极辊27、28,在腐蚀室26内,进行溅射蚀刻处理,使其活化。
在该场合,活化处理也同样地(1)在1×10-1~1×10-4Torr的极低压惰性气体氛围中,(2)使具有接合面的带镍箔的铜箔材或铝箔材22和铜箔材24分别作为接地一方的电极A,在与受到绝缘支承的另一电极B之间供给1-50MHz的交流,进行辉光放电,(3)而且,露出到由上述辉光放电产生的等离子体中的电极的面积在电极B的面积的1/3以下,(4)通过进行溅射蚀刻,如图1所示那样,制造具有3层构造的引线架用复层板31。
另外,通过设置3台以上上述开卷轴,在这些开卷轴上设置铜箔材或铝箔材和镍箔材等,同时从3台以上的卷轴接受箔材的供给,可由1次的压焊制造多层构造的复层板。
接着,在将引线架用复层板32切断成所期望的大小后,经过参照图2-图7说明的以下工序,制造引线架及凸起。
首先,如图2所示那样在铜箔材24的表面涂抹光致抗蚀剂后,进行曝光和显影,形成光致抗蚀剂膜40。
如图3所示,利用硫酸-过氧化氢进行铜箔材24的选择腐蚀,除去铜箔材24留下凸起12和外部端子13。腐蚀时间例如为4分钟左右。在腐蚀铝箔的场合,使用氢氧化钠液。
如图4所示,在凸起12、外部端子13的表面形成光致抗蚀剂膜41,并在成为外引线层10的铜箔材或铝箔材20的表面涂抹光致抗蚀剂,进行曝光和显影,形成光致抗蚀剂膜42。
下面,如图5所示那样,利用氯化铁和氯化铜对成为外引线层10的铜箔材20和镀镍层或镍箔材21进行腐蚀处理,之后,除去光致抗蚀剂膜41、42,形成导体回路43。
另外,在腐蚀铝箔材20的场合,在腐蚀液中使用5%氢氧化钠或氢氧化钾(50℃)。腐蚀时间例如为2分钟左右。使用氯化铁或氯化铜等对镀镍层或镍箔材21进行腐蚀处理,形成导体回路43。
或者,作为对从图4所示那样的外引线层侧进行选择腐蚀的替代方案,也可如图6所示那样,避开凸起间的谷底地在凸起12、外部端子13的表面和侧面形成光致抗蚀剂膜41,并在外引线层10的铜箔材或铝箔材20的表面形成光致抗蚀剂膜42。
在该场合,也可利用氯化铁或氯化铜等从镀镍层或镍箔材21侧朝外引线层侧的铜箔材20进行腐蚀处理。
在形成铝箔材20的场合,首先由氯化铁或氯化铜等腐蚀镀镍层或镍箔材21,之后,由5%氢氧化钠或氢氧化钾(50℃)对铝箔材20进行腐蚀。
如图7所示,将半导体14与凸起12接合。
产业上利用的可能性
如以上说明的那样,对于本发明的引线架用复层板,由于通过压焊铜箔材或铝箔材与镍箔材,或以层压的状态压焊在单面或两面具有镀镍层的铜箔材与其它铜箔材,制造引线架用复层板,所以,消除蒸镀法中产生的孔,提高质量,同时,通过层压进行压焊即可制造,所以可降低引线架用复层板的制造成本。
由于在0.1-3%的低压下率的条件下进行压焊,所以可减小接合界面的应力,保持接合界面的平坦度,而且不需要用于恢复加工性的热处理,在界面不生成合金,所以,可利用引线架用复层板制造选择腐蚀性优良的引线架。
对于本发明的引线架,由于对上述引线架用复层板进行选择性腐蚀形成凸起,所以,可有效地以低成本制造薄型的引线架。
在本发明的引线架的制造方法中,通过层压并压焊形成引线层的铜箔材或铝箔材与形成止蚀层的镀镍层或镍箔材,形成引线架用复层板,选择性地对多层复层板进行腐蚀,形成铜或铝构成的凸起,制造引线架,所以,可有效地以低成本制造具有均匀的凸起的薄型引线架。
对于本发明的引线架的制造方法,在预先于真空槽内对铜箔材或铝箔材与镀镍层或镍箔材的接合面进行活化处理后,重合铜箔材或铝箔材与上述镀镍层或镍箔材,以0.1-3%的压下率进行冷压焊,所以,减小了接合界面的应力,从而可保持接合界面的平坦度,而且,不需用于恢复加工性的热处理,不在界面生成合金,所以,可利用该多层复层板制造选择腐蚀性优良的引线架。

Claims (7)

1.一种引线架用复层板的制造方法,其特征在于:通过在0.1-3%的压下率下冷压焊在单面或两面具有镀镍层的铜箔材与其它铜箔材而制造。
2.一种引线架用复层板的制造方法,其特征在于:通过在0.1-3%的压下率下冷压焊铝箔材与镍箔材而制造。
3.一种引线架用复层板的制造方法,其特征在于:通过在0.1-3%的压下率下冷压焊在单面具有镀镍层的铜箔材与其它铝箔材而制造。
4.如权利要求1所述的复层板的制造方法,其特征在于:该复层板为铜/镍/铜3层。
5.如权利要求2或3所述的复层板的制造方法,其特征在于:该复层板为铜/镍/铝3层。
6.一种引线架制造方法,其特征在于:通过在0.1-3%的压下率下将铜箔材或铝箔材与形成止蚀层的镍箔材或形成了镀镍层的铜箔材冷压焊形成引线架用复层板,选择性地对该多层复层板腐蚀,形成铜或铝构成的凸起。
7.一种引线架制造方法,
首先在真空槽内对铜箔材或铝箔材的接合面和镍箔材或镀镍层的接合面预先进行活化处理,
层压上述铜箔材或铝箔材至上述镍箔材或镀镍层,然后在0.1-3%的压下率下进行冷压焊,形成上述引线架用复层板,其中:
进行上述活化处理时,
(1)在1×10-1×10-4Torr的极低压惰性气体氛围中,
(2)使具有接合面的上述铜箔材或铝箔材与上述镍箔材或镀镍面分别作为电接地一方的电极A与受到绝缘支承的另一电极B之间供给1-50MHz的交流电,进行辉光放电,
(3)进行溅射蚀刻,
(4)而且,露出到由上述辉光放电产生的等离子体中的电极A的面积在电极B的面积的1/3以下。
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KR20010089283A (ko) 2001-09-29
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CN1320276A (zh) 2001-10-31
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