CN1125491C - 多层镀层引线架 - Google Patents

多层镀层引线架 Download PDF

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CN1125491C
CN1125491C CN98104431A CN98104431A CN1125491C CN 1125491 C CN1125491 C CN 1125491C CN 98104431 A CN98104431 A CN 98104431A CN 98104431 A CN98104431 A CN 98104431A CN 1125491 C CN1125491 C CN 1125491C
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金重道
白铃昊
福京纯
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Haesung DS Co Ltd
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Abstract

本发明提出了一种多层镀层引线架。该引线架的结构具有顺序地形成在一铁合金衬底上的一第一贵金属镀层，一中间镀层和一第二贵金属镀层。该引线架在所有特性如连线键合性，抗腐蚀和可焊接性上均有改善。

Description

多层镀层引线架
技术领域
本发明涉及引线架，更具体地说，涉及一种多层镀层引线架，其中镀层的结构得到了改善，以使一个预镀层架(PPF)过程施加到铁合金的衬底上。
背景技术
半导体引线架是半导体封装中的和半导体晶片一起的一个重要元件。引线架把半导体封装的内部和外部相连，并支持半导体晶片。通常，这样的半导体引线架由模压或蚀刻方法制造。
按照模压方法，用压模设备把一个薄金属板材料制成一个预定形状。这样的模压方法主要用于批量生产引线架。
而蚀刻方法是一种化学腐蚀，在这种方法中，用化学物质将材料的预定部分腐蚀掉，这种方法用于少量生产引线架。
根据引线架在衬底上的安装类型，由上述方法制造的半导体引线架有各种各样的结构。图1表示一种半导体引线架的一般结构。
在图1中，该引线架包括模盘11用于安装并固定存储晶片，内引线12通过连线键合连接到晶片上，外引线13用于连接外部电路。
具有上述结构的半导体引线架通过与半导体的其它部件组合例如存储晶片就形成一个半导体封装。
为了改善半导体晶片与引线架内引线12之间的连线键合，模盘11和内引线12被镀上金属。另外，为了改善焊接性，焊料层涂敷在外引线13的预定部分上。
然而，在焊料层涂敷过程中，涂敷液经常侵占内引线12的区域，所以，需要一个清除该不需要的涂敷液的额外步骤。
为解决该问题，曾提出一种预镀层架(PPF)方法。根据该预镀层架方法，一种具有优良焊接湿润性的材料在半导体封装处理前涂在衬底上，以形成一个镀层。由上述方法获得的镀层结构示于图2，3和4中。
参照图2，一镍(Ni)镀层22，和一钯(Pd)或Pd/Ni合金镀层23，顺序地形成在铜(Cu)衬底21上，形成了一个多层镀层。
图3的引线架包括一Ni镀层32，一Pd/Ni合金镀层33，一Ni镀层34，和一Pd镀层35，其中的镀层32，33，34和35顺序地形成在Cu衬底31上。
根据图4中的引线架，一Ni镀层42和一Pd或金(Au)镀层43，顺序地形成在Cu衬底41上。另外，一Pd/Ni合金镀层44，一Pd或Au镀层43′和一Pd镀层45形成在Pd或Au镀层43上。
然而，从图2到图4的引线架，通过用铜或铜合金作为衬底材料，根据一预镀层架过程制造，并且，把用于形成图2到图4中引线架的预度层架过程实施到合金42制成的衬底上是困难的。这里，合金42由Ni、Fe和少量其它元素组成，并被广泛地用作引线架衬底材料。然而，合金42被盐性环境的组装过程严重腐蚀。这是由于在合金42的Fe和镀层的Pd之间的电化学电势上的巨大差别导致的电化腐蚀引起的。
发明内容
为解决上述问题，本发明的目的在于提供一种引线架，通过改善其中的镀层结构，该引线架具有优良的抗蚀性，以及良好的焊接和连线键合性。
为完成上述目的，此提供一多层镀层引线架包括：一铁合金的衬底，和顺序地形成在衬底上的一第一贵金属镀层，一中间镀层，以及一第二贵金属镀层。
较好地，中间镀层包括一铜(Cu)镀层和一镍(Ni)镀层。
附图说明
通过参照附图对本发明最佳实施例的详细描述，本发明的上述目的和优点将会更加明了，附图中：
图1是一般引线架结构的平面图；
图2、3和4是表示传统引线架的镀层结构的剖视图；
图5是埃万斯(Evans)图；以及
图6是表示根据本发明的一个引线架镀层结构的剖视图。
具体实施方式
本发明的特点在于铁合金的衬底在初始时镀以贵金属或其合金。在形成这样的贵金属镀层后，形成一中间镀层和一最外镀层，来完成镀层。这里，一钯(Pd)镀层可形成在中间镀层和最外镀层之间。此处，含有Pd的镀层改善中间镀层和最外镀层之间的粘合性，以及减小镀层的表面粗糙度，由此改善可焊接性和连线键合。
本发明的原理将参照瓦格纳(Wagner)的混合分子电极理论进行描述。
在电化学领域里，通常金属的腐蚀率可用下述等式(1)表述。
   i＝ioexp(ΔE/β)    ……(1)这里的io为交换电流密度，β为达菲尔(Tafel)常数，ΔE为氧化反应电势和还原反应电势之差。
根据混合分子电极理论，腐蚀反应由氧化反应和还原反应构成，并且，当氧化反应率和还原反应率相等时，腐蚀反应率就可以确定了。
金属的腐蚀反应特性可以用图5中的Evans图容易地表示，其中，等式(1)的ΔE和电流密度i之间的关系表示为半对数型。
一般地，具有原子价v的金属M的腐蚀通过下面的氧化还原反应发生。
氧化反应(在引线架和镀层的介面处)：
    
还原反应(在镀层和外围大气的介面处)：
    
该金属的腐蚀率可以在“ΔE对logi”氧化反应曲线和“ΔE对logi”还原反应曲线的交点上确定。
为了降低金属的腐蚀率，氧化反应率和还原反应率都必须减小。然而，当氧化还原反应在中性和盐性环境中时，还原反应是固定的。因此，为了降低金属的腐蚀率，改变金属的还原反应是必需的。
如前面所述，金属氧化反应主要发生在引线架和第一金属镀层之间的介面处。因此，确定第一镀层的电化学电势的数值变得非常重要。腐蚀率随着引线架和第一镀层之间的电化学电势差的降低而降低。
例如，如图5中所示，金属的电化学电势以Mn，Fe，Cu，和Pd的顺序增加。并且，金属的整体腐蚀率以Mn，Fe，Cu和Pd的顺序大大地降低。
在本发明中，根据上述原理，通过在铁引线架上镀一贵金属如钯(Pd)的层预镀(strike layer)来降低氧化反应率。由此来减缓腐蚀率。
下面，参照图6，对根据本发明最佳实施例的引线架结构进行描述。
第一贵金属镀层62由从下面一组中选出的金属形成即钯(Pd)，金(Au)，铂(Pt)，铑(Rh)，银(Ag)，钌(Ru)和其合金，并形成在铁合金衬底61上。这里，衬底的厚度最好为0.01～5mm。
用于形成第一贵金属镀层的合金包括：一种Pd-Au合金，含有50％或少于此重量的Au；一种Pd-Co合金，含有50％或少于此重量的Co；一种Pd-W合金，含有50％或少于此重量的钨(W)；一种Pd-Ti合金，含有50％或少于此重量的钛(Ti)；一种Pd-Sn合金，含有50％或少于此重量的锡(Sn)；一种Pd-Ni合金，含有50％或少于此重量的镍(Ni)；以及一种Pd-Mo合金，含有50％或少于此重量的钼(Mo)。上述的百分比基于合金的重量。第一贵金属镀层减小了氧化还原间的电化学电势差，如上所述，借此就可以改善抗腐蚀性。另外，较好地是，第一贵金属层的厚度为0.01～10μm。
铜镀层63形成在第一贵金属镀层62上，铜镀层63由铜或合铜金形成，该合金包括作为主要元素的铜和基于整个合金重量的50％或多于此重量的其它金属。另一种金属从下列组中选出，即Sn，Ni，Mo，Mn和Co。较好地是，铜镀层63的厚度为0.01～10μm。
铜镀层63改善了第一贵金属镀层62和Ni镀层64之间的粘合性，并阻止了金属原子从衬底的扩散。
Ni镀层64形成为中间层以阻止活化铜生成物的出现，例如氧化铜或铜硫化物，活化铜生成物通过和扩散到最外层表面的铜原子的反应获得。Ni镀层64由Ni或Ni合金形成，Ni合金包括作为主要元素的Ni和基于整个合金重量的50％或多于此重量的其它金属。另一种金属从下列组中选出，即Cu、Sn、Mn、Co和W。较好地是，Ni镀层64的厚度为0.01～10μm。
一Pd镀层65形成在Ni镀层64上，Pd镀层由Pd或Pd合金形成，Pd合金包括作为主要元素的Pd和基于整个合金重量的50％或多于此重量的金属。另一种金属从下列组中选出，即Mo、W、Ti、Sn、Ni、Ag和Co。Pd镀层65的厚度为0.01～10μm。Pd镀层65复盖住Ni镀层64上的细孔，以平滑Ni镀层64的表面粗糙度。相应地，能够在后续步骤中形成均匀的最外层的厚度。
上述的Pd镀层65显著地减小了在盐性环境中的局部腐蚀，增加了Ni镀层64和作为最外镀层的第二贵金属镀层62′之间的键合力。相应地，在安装半导体晶片到引线架的基座上之后的调整和成形步骤中，裂缝的产生和扩宽可以减到最小。结果是，通过阻止Ni从含有Ni的镀层64上的扩散而改善了可焊接性和连线键合性，以及抗腐蚀性。
第二贵金属镀层62′形成在Pd镀层65上，贵金属镀层62′由从下列组中选出的金属形成即Pd、Au、Pt、Ag、Ru、Rh及其合金。作为最外镀层，Pd镀层65保护下面的镀层并阻止其它所有镀层的氧化，以及改善可焊接性和连线键合性。
此处，较好地是，第二贵金属镀层62′的厚度为0.01～10μm。
在具有上述结构的引线架中，一连线键合区，或包括该连线键合区的整个引线架被镀以金属层。
下面，将参照例子对本发明详细描述。
但是，本发明并不局限于下述例子。
<例子>
在Fe-Ni衬底上完成预处理后，一个Pd预镀层形成到约为3μ英寸。在用Cu镀完Pd镀层到约厚2μm，具有Cu镀层的组合结构被接着镀以Ni和Ni-Pd合金，厚度分别为约1μm厚和约3μ英寸厚。然后，厚度约为3μ英寸的Pd镀层形成在已镀的Ni-Pd合金镀层上。Mo.GL-2(S)(德格萨公司Degussa Co.)用于镀Pd和镀Ni-Pd，焦磷酸铜溶液(勃昂温化学制品公司Poong Won Chemical CO.)用于镀铜，以及Mo.6450(Deguss Co.)用于镀Ni。
<对比例子1>
在完成合金42制造的衬底上的预处理后，衬底被顺序地镀以Cu、Ni和Pd，由此完成一个具有三层镀层结构的引线架。
<对比例子2>
在完成合金42制造的衬底上的预处理后，衬底被顺序地镀以Ni，Cu，Ni和Pd，由此来完成一个具有4层镀层结构的引线架。
然后，可焊接性测试(美国军用标准883D，方法2003.7MIL-STD-883D，Method 2003.7)，用于评价在盐性环境中抗腐蚀性的盐水喷洒测试(MIL-STD-883D，Method 1009.8)以及连线键合测试，实施在通过例子和对比例子1及2制造的多层镀层引线架上。结果示在表1中。
                      表1
    举例   可焊接性   连线键合性   抗腐蚀
例子     好   12.01gf(优)     好
对比例子1     差   4.61gf(差)     差
对比例子2     差   8.40gf(一般)     差
从表1中看到，由例子制造的引线架与对比例子1及2相比具有较好的可焊接性、连线键合性及抗腐蚀性。
如上所述，根据本发明的引线架在所有特性上如连线键合，抗腐蚀和可焊接性，都有改善。因此，可以期望在半导体封装过程中有高的成品率，故提高了生产率。

Claims (8)

1.一种多层镀层引线架，包括一个铁合金衬底，和顺序地形成在衬底上的一个第一贵金属镀层，一个中间镀层和一个第二贵金属镀层。
2.根据权利要求1所述的多层镀层引线架，其中，中间镀层包括一铜(Cu)镀层和一镍(Ni)镀层，并且，所述的镍镀层是在所述的铜镀层上形成的。
3.根据权利要求2所述的多层镀层引线架，其中，Cu镀层由Cu或Cu合金形成，该Cu合金至少包括一种从下列组中选出的金属，即锡(Sn)，镍(Ni)，钼(Mo)，锰(Mn)及钴(Co)。
4.根据权利要求2所述的多层镀层引线架，其中，镍镀层由镍或镍合金形成，该镍合金至少包括一种从下列组中选出的金属，即铜(Cu)，锡(Sn)，钼(Mo)，锰(Mn)及钨(W)。
5.根据权利要求2所述的多层镀层引线架，进一步地包括一在Ni镀层和第二贵金属镀层之间的钯(Pd)镀层。
6.根据权利要求5所述的多层镀层引线架，其中，Pd镀层由Pd或Pd合金形成，该Pd合金至少包括一种从下列组中选出的金属，即钼(Mo)，钨(W)，钛(Ti)，锡(Sn)，镍(Ni)，银(Ag)，金(Au)及钴(Co)。
7.根据权利要求1所述的多层镀层引线架，其中，第一贵金属镀层由从下列组中选出的至少一种金属形成，即钯(Pd)，金(Au)，铂(Pt)，铑(Rh)，钌(Ru)，银(Ag)，或由所选择的金属的合金形成。
8.根据权利要求1所述的多层镀层引线架，其中，第二贵金属镀层由从下列组中选出的至少一种金属形成，即钯(Pd)，金(Au)，铂(Pt)，铑(Rh)，钌(Ru)，银(Ag)，或由所选择的金属的合金形成。
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