CN112242441A - 高电子迁移率晶体管 - Google Patents
高电子迁移率晶体管 Download PDFInfo
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Abstract
本发明公开一种高电子迁移率晶体管,包含一缓冲层、一载流子传输层、一载流子供应层、一栅极、一源极电极以及一漏极电极。缓冲层位于一基底上。载流子传输层位于缓冲层上。载流子供应层位于载流子传输层上。栅极位于载流子供应层上。源极电极以及漏极电极位于栅极的相对两侧,其中源极电极以及漏极电极都包含由下而上堆叠的一导电层以及一导电氧化层。
Description
技术领域
本发明涉及一种高电子迁移率晶体管,且特别是涉及一种具有多层材质的源漏极电极的高电子迁移率晶体管。
背景技术
高电子迁移率晶体管具有于电子、机械以及化学等特性上的众多优点,例如宽带隙、高击穿电压、高电子迁移率、大弹性模数(elastic modulus)、高压电与压阻系数(highpiezoelectric and piezoresistive coefficients)等。上述优点使高电子迁移率晶体管可用于如高亮度发光二极管、功率开关元件、调节器、电池保护器、面板显示驱动器、通讯元件等应用的元件的制作。
高电子迁移率晶体管(High electron mobility transistor,HEMT)也是场效应晶体管的一种,它使用两种具有不同带隙的材料形成异质结作为载流子通道,而不像金属氧化物半导体场效晶体管那样,直接使用掺杂的半导体而不是异质结来形成导电通道。其中,砷化镓、砷镓铝三元化合物半导体是构成这种装置的可选材料,当然根据具体的应用场合,可以有其他多种组合。例如,含铟的装置可表现出更好的高频性能,而近年来发展的氮化镓高电子迁移率晶体管则凭借其良好的高频特性吸引了大量关注。
发明内容
本发明提出一种高电子迁移率晶体管,其源极电极以及漏极电极都包含由下而上堆叠的一导电层以及一导电氧化层,其中导电氧化层取代常用的金,因而能降低制作工艺成本又能维持电极的低接触阻抗。
本发明提供一种高电子迁移率晶体管,包含一缓冲层、一载流子传输层、一载流子供应层、一栅极、一源极电极以及一漏极电极。缓冲层位于一基底上。载流子传输层位于缓冲层上。载流子供应层位于载流子传输层上。栅极位于载流子供应层上。源极电极以及漏极电极位于栅极的相对两侧,其中源极电极以及漏极电极都包含由下而上堆叠的一导电层以及一导电氧化层。
基于上述,本发明提出一种高电子迁移率晶体管,其包含依序堆叠的一缓冲层、一载流子传输层以及一载流子供应层位于一基底上;一栅极位于载流子供应层上;以及一源极电极以及一漏极电极位于栅极的相对两侧,其中源极电极以及漏极电极都包含由下而上堆叠的一导电层以及一导电氧化层。如此一来,导电层可提供低电阻率,而导电氧化层能防止导电层氧化,且导电氧化层的制造成本低于一般常用的金。
附图说明
图1为本发明一实施例的高电子迁移率晶体管的剖面示意图;
图2为本发明一实施例的高电子迁移率晶体管的剖面示意图;
图3为本发明一实施例的高电子迁移率晶体管的剖面示意图;
图4为本发明一实施例的高电子迁移率晶体管的剖面示意图。
主要元件符号说明
100:高电子迁移率晶体管
110:基底
120:缓冲层
130:载流子传输层
140:载流子供应层
150:栅极
152:底部
154:顶部
162、262:源极电极
162a、164a:导电层
162b、164b:导电氧化层
164、264:漏极电极
170、270、370:掺杂区
D:通道区
S1、S2、S3:底面
T1、T2、T3:顶面
具体实施方式
图1绘示本发明一实施例的高电子迁移率晶体管的剖面示意图。如图1所示,提供一基底110。基底110例如是一硅基底、一含硅基底、一三五族覆硅基底(例如GaN-on-silicon)、一石墨烯覆硅基底(graphene-on-silicon)、一碳化硅基底、一氧化铝基底或一硅覆绝缘(silicon-on-insulator,SOI)基底等半导体基底。基底110可为单层基底、多层基底、梯度基底或上述的组合。
形成一缓冲层120于基底110上。缓冲层120可包含一堆叠的三五族半导体层,其中堆叠的三五族半导体层的晶格由下而上可具有梯度渐变的变化。缓冲层120可例如为氮化镓或氮化铝,但本发明不以此为限。缓冲层120可例如以一分子束外延制作工艺(molecular-beam epitaxy,MBE)、一有机金属气相沉积(metal organic chemical vapordeposition,MOCVD)制作工艺、一化学气相沉积(chemical vapor deposition,CVD)制作工艺、一氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺形成,但本发明不限于此。
形成一载流子传输层130于缓冲层120上。在本实施例中,载流子传输层130可例如为一三五族半导体层,但本发明不以此为限。较佳者,载流子传输层130可例如为一非有意掺杂的氮化镓层。载流子传输层130可例如以一分子束外延制作工艺(molecular-beamepitaxy,MBE)、一有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、一化学气相沉积(chemical vapor deposition,CVD)制作工艺、一氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺等形成,但本发明不限于此。
形成一载流子供应层140于载流子传输层130上,使载流子传输层130及载流子供应层140的接触界面形成一通道区D,此通道区D即为二维电子气形成导通电流之处,且在此状态下的高电子迁移率晶体管通常具有正常开启(Normally on)的操作方式。由于载流子传输层130与载流子供应层140的材料能带间隙(band gap)不同之故,载流子传输层130与载流子供应层140的界面形成异质结(heterojunction)。异质结处的能带弯曲,导带(conduction band)弯曲深处形成量子井(quantum well),将压电效应(piezoelectricity)所产生的电子约束于量子井中,因此在载流子传输层130及载流子供应层140的界面处形成二维电子气(two-dimensional electron gas,2DEG),进而形成导通电流。
在本实施例中,载流子供应层140可例如为一三五族半导体层,但本发明不以此为限。较佳者,载流子供应层140可例如为一非有意掺杂的氮化铝镓(AlxGa1-xN)层、一N型氮化铝镓(AlxGa1-xN)层或一P型氮化铝镓(AlyGa1-yN)层等。在一实施例中,载流子供应层140可例如由一外延制作工艺形成,其可例如包含硅或锗的掺质。或者,载流子供应层140可例如以一分子束外延制作工艺(molecular-beam epitaxy,MBE)、一有机金属气相沉积(metalorganic chemical vapor deposition,MOCVD)制作工艺、一化学气相沉积(chemicalvapor deposition,CVD)制作工艺、一氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺等所形成,但本发明不限于此。
形成一栅极150于载流子供应层140上。栅极150包含一底部152以及一顶部154,其中底部152及顶部154较佳包含不同材料。较佳者,底部152可例如为一P型氮化铝镓(AlyGa1-yN)层,而顶部154可例如为一金属,其可例如包含金、银或铂等萧特基(Schottky)金属,但本发明不以此为限。形成栅极150于载流子供应层140上的方法可例如为依序形成一半导体底层以及一栅极材料层于载流子供应层140上,再利用光刻暨蚀刻制作工艺去除部分半导体底层与部分栅极材料层以形成栅极150。随着仅由金属所构成的栅极电极结构开始导入于由P型氮化镓(GaN)所构成的材料作为栅极电极下半部,高电子迁移率晶体管在此环境模式下即由正常开启操作模式转换为正常关闭(Normally off)的操作方式。
形成一源极电极162以及一漏极电极164于栅极150的相对两侧。在本发明中,源极电极162包含由下而上堆叠的一导电层162a以及一导电氧化层162b,以及漏极电极164包含由下而上堆叠的一导电层164a以及一导电氧化层164b。较佳者,导电氧化层162b/164b的厚度小于导电层162a/164a的厚度。在一实施例中,导电氧化层162b/164b仅位于导电层162a/164a的表面,或者导电氧化层162b/164b仅覆盖导电层162a/164a的顶面。在一优选的实施例中,导电层162a/164a包含金属,其可例如为钛、铝、钨或钯;导电氧化层162b/164b包含氧化铟锡,但本发明不限于此。在本实施例中,导电层162a/164a为钛,而导电氧化层162b/164b为氧化铟锡。
详细而言,源极电极162以及漏极电极164部分位于载流子供应层140中。源极电极162以及漏极电极164的顶面T1/T2高于载流子供应层140的一顶面T3。较佳者,源极电极162的一底面S1、漏极电极164的一底面S2以及载流子供应层140的一底面S3共平面,以直接接触载流子传输层130及载流子供应层140的接触界面形成的二维电子气载流子通道。源极电极162与漏极电极164较佳由金属所构成,但有别于栅极150的顶部154由萧特基金属所构成,源极电极162以及漏极电极164较佳由欧姆接触金属所构成,其中源极电极162与漏极电极164可各自包含钛、铝、钨、钯或其组合。
在一实施例中,可先以光刻暨蚀刻制作工艺在部分栅极150两侧的载流子供应层140中形成凹槽,再以电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physical vapor deposition,PVD)制作工艺、化学气相沉积制作工艺(chemical vapor deposition,CVD)制作工艺、或上述组合于凹槽内形成电极材料,然后再蚀刻将电极材料图案化以形成源极电极162与漏极电极164。如此,形成一高电子迁移率晶体管100。
以下,可再提供一改良的高电子迁移率晶体管。图2绘示本发明一实施例的高电子迁移率晶体管的剖面示意图。如图2所示,在形成图1的高电子迁移率晶体管100之后,可再形成掺杂区170于源极电极162与漏极电极164的正下方。掺杂区170可例如掺杂硅或锗等,但本发明不以此为限。以掺杂硅为例,掺杂区170可例如以沉积硅质层并进行热扩散形成,或者直接掺杂硅形成,但本发明不限于此。较佳者,掺杂区170仅位于源极电极162与漏极电极164的正下方。因为源极电极162与漏极电极164更容易形成于掺杂区170上,因而掺杂区170较佳直接接触源极电极162与漏极电极164。
在本实施例中,掺杂区170仅位于源极电极162与漏极电极164的正下方的部分载流子传输层130中。在其他实施例中,如图3所示,掺杂区270仅位于源极电极262与漏极电极264的正下方的部分的载流子传输层130以及载流子供应层140中。或者,如图4所示,掺杂区370仅位于源极电极362与漏极电极364的正下方的部分载流子供应层140中。
综上所述,本发明提出一种高电子迁移率晶体管,其包含一缓冲层位于一基底上;一载流子传输层位于缓冲层上;一载流子供应层位于载流子传输层上;一栅极位于载流子供应层上;以及一源极电极以及一漏极电极位于栅极的相对两侧,其中源极电极以及漏极电极都包含由下而上堆叠的一导电层以及一导电氧化层。如此一来,导电层可提供低电阻率,而导电氧化层能防止导电层氧化,且导电氧化层的制造成本低于一般常用的金。
较佳者,导电氧化层的一厚度小于导电层的一厚度。导电层可例如为钛、铝、钨或钯等金属,而导电氧化层可例如为氧化铟锡。在一更佳的实施例中,掺杂区位于源极电极以及漏极电极的正下方,因欧姆接触更易形成于掺杂区上。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。
Claims (19)
1.一种高电子迁移率晶体管,其特征在于,包含:
缓冲层,位于基底上;
载流子传输层,位于该缓冲层上;
载流子供应层,位于该载流子传输层上;
栅极,位于该载流子供应层上;以及
源极电极以及漏极电极,位于该栅极的相对两侧,其中该源极电极以及该漏极电极都包含由下而上堆叠的导电层以及导电氧化层。
2.如权利要求1所述的高电子迁移率晶体管,其中该导电氧化层的厚度小于该导电层的厚度。
3.如权利要求2所述的高电子迁移率晶体管,其中该导电氧化层仅覆盖该导电层的顶面。
4.如权利要求1所述的高电子迁移率晶体管,其中该导电层包含金属。
5.如权利要求4所述的高电子迁移率晶体管,其中该导电层包含钛、铝、钨或钯。
6.如权利要求1所述的高电子迁移率晶体管,其中该导电氧化层包含氧化铟锡。
7.如权利要求1所述的高电子迁移率晶体管,其中该源极电极以及该漏极电极部分位于该载流子供应层中。
8.如权利要求7所述的高电子迁移率晶体管,其中该源极电极的底面、该漏极电极的底面以及该载流子供应层的底面共平面。
9.如权利要求1所述的高电子迁移率晶体管,其中该载流子供应层包含非有意掺杂的氮化铝镓(AlxGa1-xN)层、N型氮化铝镓(AlxGa1-xN)层或P型氮化铝镓(AlyGa1-yN)层。
10.如权利要求1所述的高电子迁移率晶体管,还包含:
掺杂区仅位于该源极电极以及该漏极电极的正下方。
11.如权利要求10所述的高电子迁移率晶体管,其中该些掺杂区直接接触该源极电极以及该漏极电极。
12.如权利要求10所述的高电子迁移率晶体管,其中该些掺杂区包含硅或锗。
13.如权利要求10所述的高电子迁移率晶体管,其中该些掺杂区仅位于该源极电极以及该漏极电极的正下方的部分该载流子供应层中。
14.如权利要求10所述的高电子迁移率晶体管,其中该些掺杂区仅位于该源极电极以及该漏极电极的正下方的部分该载流子传输层中。
15.如权利要求10所述的高电子迁移率晶体管,其中该些掺杂区仅位于该源极电极以及该漏极电极的正下方的部分的该载流子供应层以及该载流子传输层中。
16.如权利要求1所述的高电子迁移率晶体管,其中该载流子传输层包含一非有意掺杂的氮化镓层。
17.如权利要求1所述的高电子迁移率晶体管,其中该栅极包含底部以及顶部,其中该底部包含P型氮化铝镓(AlyGa1-yN)层,而该顶部包含金属。
18.如权利要求1所述的高电子迁移率晶体管,其中该缓冲层包含堆叠的三五族半导体层。
19.如权利要求18所述的高电子迁移率晶体管,其中该缓冲层包含氮化镓或氮化铝。
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