CN111524958B - 一种高电子迁移率晶体管 - Google Patents
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Abstract
本发明公开一种高电子迁移率晶体管(high electron mobility transistor,HEMT),其主要包含一缓冲层设于一基底上、一载流子运输层设于该缓冲层上、一载流子供应层设于该载流子运输层上、一栅极电极设于该载流子供应层上以及一源极电极以及一漏极电极设于该栅极电极两侧,其中该载流子供应层包含铝的浓度梯度。
Description
技术领域
本发明涉及一种高电子迁移率晶体管。
背景技术
以氮化镓基材料(GaN-based materials)为基础的高电子迁移率晶体管具有于电子、机械以及化学等特性上的众多优点,例如宽能隙、高击穿电压、高电子迁移率、大弹性模数(elastic modulus)、高压电与压阻系数(high piezoelectric and piezoresistivecoefficients)等与化学钝性。上述优点使氮化镓基材料可用于如高亮度发光二极管、功率开关元件、调节器、电池保护器、面板显示驱动器、通讯元件等应用的元件的制作。
发明内容
本发明一实施例公开一种高电子迁移率晶体管(high electron mobilitytransistor,HEMT),其主要包含一缓冲层设于一基底上、一载流子运输层设于该缓冲层上、一载流子供应层设于该载流子运输层上、一栅极电极设于该载流子供应层上以及一源极以及一漏极设于该栅极电极两侧,其中该载流子供应层包含铝的浓度梯度。
本发明另一实施例公开一种高电子迁移率晶体管,其包含一缓冲层设于一基底上、一载流子运输层设于该缓冲层上、一载流子供应层设于该载流子运输层上、一栅极电极设于该载流子供应层上以及一源极以及一漏极设于该栅极电极两侧,其中栅极电极包含一上半部以及一下半部且该上半部及该下半部包含不同材料。
附图说明
图1为本发明一实施例的一高电子迁移率晶体管的结构示意图。
主要元件符号说明
12 基底 14 缓冲层
16 载流子运输层 18 载流子供应层
20 栅极电极 22 下半部
24 上半部 26 源极电极
28 漏极电极 30 通道区
具体实施方式
请参照图1,图1为本发明一实施例的一高电子迁移率晶体管的结构示意图。如图1所示,首先提供一基底12,例如一由硅、碳化硅或氧化铝(或可称蓝宝石)所构成的基底,其中基底12可为单层基底、多层基底、梯度基底或上述的组合。依据本发明其他实施例基底12又可包含一硅覆绝缘(silicon-on-insulator,SOI)基底
然后于基底12表面形成一缓冲层14。在一实施例中,缓冲层14包含III-V族半导体例如氮化镓,其厚度可介于0.5微米至10微米之间。在一实施例中,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于基底12上形成缓冲层14。
接着于缓冲层14表面形成一载流子运输层(carrier transit layer)16。在本实施例中,载流子运输层16较佳包含III-V族半导体,例如氮化镓或更具体而言非刻意掺杂(unintentionally doped)氮化镓。在一实施例中,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapordeposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于缓冲层14上形成载流子运输层16。
随后形成一载流子供应层(carrier supply layer)18于载流子运输层16表面。在本实施例中载流子供应层18较佳包含III-V族半导体例如N型氮化铝镓(AlxGa1-xN),其中0<x<1,载流子供应层18较佳包含一由外延成长制作工艺所形成的外延层,且载流子供应层较18佳包含硅或锗的掺质。如同上述形成缓冲层14与载流子运输层16的方式,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organicchemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapordeposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于载流子运输层16上形成载流子供应层18。
值得注意的是,本实施例的载流子供应层18较佳包含铝的浓度梯度,亦即载流子供应层中的铝浓度较佳以渐层方式分布而非平均分布。更具体而言,载流子供应层18中铝原子的浓度较佳朝载流子运输层16及载流子供应层18间的交界降低,或整体来看远离载流子运输层16与载流子供应层18交界处的载流子供应层18具有较高的铝浓度而靠近载流子运输层16及载流子供应层18交界处的载流子供应层18则具有较低的铝浓度。
然后依序形成一半导体层以及一栅极材料层于载流子供应层18表面,再利用光刻及蚀刻制作工艺去除部分半导体层与部分栅极材料层以形成一栅极电极20于载流子供应层18表面,其中栅极电极20较佳于图案化后包含一下半部22与一上半部24且下半部22及上半部24较佳包含不同材料。在本实施中,半导体层或栅极电极20的下半部22较佳包含P型氮化铝镓(AlyGa1-yN),其中0<y<1且y小于前述构成载流子供应层18中氮化铝镓(AlxGa1-xN)的x,y较佳介于0-0.2而x则较佳大于0.2,且下半部22较佳包含镁或锌的掺质。栅极电极20的上半部24则较佳包含金属,例如可包含金、银或铂等萧特基(Schottky)金属。需注意的是,虽然下半部22与载流子供应层18均由氮化铝镓所构成,但相较于铝原子以渐层方式分布于载流子供应层18中,栅极电极20的下半部22较佳不具任何浓度梯度,或铝浓度于下半部22中较佳为平均分布。
随后形成一源极电极26以及一漏极电极28于栅极电极20两侧。在本实施例中,源极电极26与漏极电极28较佳由金属所构成,但有别于栅极电极20的上半部24由萧特基金属所构成,源极电极26与漏极电极28较佳由欧姆接触金属所构成。依据本发明一实施例,源极电极26与漏极电极28可各自包含钛、铝、钨、钯或其组合。在一些实施例中,可先以光刻及蚀刻制作工艺去除部分栅极电极20两侧的载流子供应层18形成凹槽,再以电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physicalvapor deposition,PVD)制作工艺、化学气相沉积制作工艺(chemical vapor deposition,CVD)制作工艺、或上述组合于凹槽内形成电极材料,然后再以蚀刻将电极材料图案化以形成源极电极26与漏极电极28。由于源极电极26与漏极电极28是以光刻及蚀刻制作工艺形成于载流子供应层18两侧,因此载流子供应层18底部较佳切齐源极电极26及漏极电极28底部。
一般而言,由于载流子运输层16与载流子供应层18的材料能带间隙(band gap)不同之故,载流子运输层16与载流子供应层18的界面数较佳形成异质接面(heterojunction)。异质接面处的能带弯曲,导带(conduction band)弯曲深处形成量子阱(quantum well),将压电效应(piezoelectricity)所产生的电子约束于量子阱中,因此在载流子运输层16与载流子供应层18的界面处形成二微电子气(two-dimensional electrongas,2DEG),进而形成导通电流。如图中所示,载流子运输层16与载流子供应层18的交界处较佳形成一通道区30,此通道区30即为二微电子气形成导通电流之处,且在此状态下的高电子迁移率晶体管通常具有正常开启(Normally on)的操作方式。
随着仅由金属所构成的栅极电极结构开始导入于由P型氮化镓(GaN)所构成的材料作为栅极电极下半部,高电子迁移率晶体管在此环境模式下即由正常开启操作模式转换为正常关闭(Normally off)的操作方式。然而在此操作模式下的元件又通常具有动态阻值比例降低(dynamic Ron ratio reduction)以及晶格不匹配(lattice mismatch)等缺点,其中晶格不匹配又可能影响前述二微电子气的形成。
为了改善这两个缺点本发明首先将载流子供应层18中原本呈现平均分布的铝浓度转变为梯度分布或渐层分布,其中靠近载流子供应层16与栅极电极20下半部22交界处的载流子供应层16内较佳具有较高浓度的铝原子而靠近载流子运输层16及载流子供应层18交界处的载流子供应层18内则具有较低浓度的铝浓度。通过调整铝原子的浓度梯度本发明可有效改善高电子迁移率晶体管在正常关闭操作时动态阻值比例降低的问题。
除此之外,本发明另一实施例又可将现有由P型氮化镓(GaN)所构成的栅极电极20下半部22取代为P型氮化铝镓(AlyGa1-yN),其中0<y<1且y小于前述载流子供应层18中氮化铝镓(AlxGa1-xN)的x,同时栅极电极20下半部22中又较佳包含镁或锌的掺质。通过栅极电极20下半部22材料的替换本发明可改善现行高电子迁移率晶体管中晶格不匹配(latticemismatch)进而影响二微电子气形成的缺点。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。
Claims (18)
1.一种高电子迁移率晶体管,其特征在于,包含:
缓冲层,设于基底上;
载流子运输层,设于该缓冲层上;
载流子供应层,设于该载流子运输层上,其中该载流子供应层包含铝的浓度梯度,且铝的浓度是朝该载流子运输层及该载流子供应层之间的交界降低;
栅极电极,设于该载流子供应层上;以及
源极电极以及漏极电极,设于该栅极电极两侧。
2.如权利要求1所述的高电子迁移率晶体管,其中该缓冲层包含氮化镓。
3.如权利要求1所述的高电子迁移率晶体管,其中该载流子运输层包含非刻意掺杂氮化镓。
4.如权利要求1所述的高电子迁移率晶体管,其中该载流子供应层包含N型氮化铝镓。
5.如权利要求4所述的高电子迁移率晶体管,其中该载流子供应层包含硅或锗的掺质。
6.如权利要求1所述的高电子迁移率晶体管,其中该载流子供应层包含外延层。
7.如权利要求1所述的高电子迁移率晶体管,其中该载流子供应层的底部切齐该源极电极以及该漏极电极的底部。
8.一种高电子迁移率晶体管,其特征在于,包含:
缓冲层,设于基底上;
载流子运输层,设于该缓冲层上;
载流子供应层,设于该载流子运输层上;
栅极电极,设于该载流子供应层上,其中该栅极电极包含上半部以及下半部且该上半部及该下半部包含不同材料,且该上半部包含金属且该下半部包含外延层;以及
源极电极以及漏极电极,设于该栅极电极两侧。
9.如权利要求8所述的高电子迁移率晶体管,其中该缓冲层包含氮化镓。
10.如权利要求8所述的高电子迁移率晶体管,其中该载流子运输层包含非刻意掺杂氮化镓。
11.如权利要求8所述的高电子迁移率晶体管,其中该载流子供应层包含N型氮化铝镓。
12.如权利要求8所述的高电子迁移率晶体管,其中该载流子供应层包含硅或锗的掺质。
13.如权利要求8所述的高电子迁移率晶体管,其中该载流子供应层包含外延层。
14.如权利要求8所述的高电子迁移率晶体管,其中下半部包含P型氮化铝镓。
15.如权利要求8所述的高电子迁移率晶体管,其中该下半部包含镁或锌的掺质。
16.如权利要求8所述的高电子迁移率晶体管,其中该下半部厚度小于该上半部厚度。
17.如权利要求8所述的高电子迁移率晶体管,其中该上半部侧壁切齐该下半部侧壁。
18.如权利要求8所述的高电子迁移率晶体管,其中该载流子供应层的底部切齐该源极电极以及该漏极电极的底部。
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