CN1118936A - 形成超微细图案的方法 - Google Patents

形成超微细图案的方法 Download PDF

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CN1118936A
CN1118936A CN95107566A CN95107566A CN1118936A CN 1118936 A CN1118936 A CN 1118936A CN 95107566 A CN95107566 A CN 95107566A CN 95107566 A CN95107566 A CN 95107566A CN 1118936 A CN1118936 A CN 1118936A
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金炯秀
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
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    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

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Abstract

一种形成半导体器件超微细图案的方法，其步骤为：在底层上涂覆光刻胶薄膜；通过掩模先接受一次曝光，光能量小于薄膜厚度的阈能；掩模位移预定距离后，再接受小于阈能的第二次曝光；显影完全除去两次曝光重叠区域及半除去一次曝光区域，形成光刻胶薄膜图案，再沉积上隔离层；对隔离层进行各向异性腐蚀，在光刻胶图案线条侧壁上剩下隔离物；再对光刻胶薄膜图案和底层进行干腐蚀，形成具有超微细宽度和超微细间距的底层图案。

Description

形成超微细图案的方法
本发明一般是涉及一种形成超微细图案的方法，具体说来，是利用光刻胶薄膜经不同能量的光曝光后剩下厚度的差别，形成一种比光刻法所得的更为微细图案的方法。
随着半导体器件集成度的提高，其制造就需要更为微细的图案。人们知道，是可以形成比一般光刻法所得更为微细的图案的，例如，可以采用在底层上面的超微细光刻胶薄膜图形的侧壁上形成的绝缘隔离物(spacers)作为掩模的办法。
虽然绝缘隔离物的宽度可以做到比光刻胶薄膜图形的宽度还要小，但迄今还不可能将绝缘隔离物之间的距离做得比光刻胶图形的宽度更小。
因此，本发明的一个目的就是要克服现有技术中遇到的上述问题，提供一种形成超微细图形的方法，这个方法可以将图形之间的距离减到比光刻法所获得的更小。
提供一种形成半导体器件超微细图案的方法，即可达到上述的目的，该方法的步骤是：在要制作图案的底层上面涂覆一层光刻胶的薄膜；通过一个具有铬图案的掩模令该光刻胶薄膜先接受第一次曝光，所曝光的能量小于对应于光刻胶薄膜厚度的阈能；在将所述掩模位移一预定距离之后，再令该光刻胶薄膜接受小于该阈能的第二次曝光；将经曝光的光刻胶薄膜进行显影处理，以完全除去第一次曝光区与第二次曝光区相重叠的薄膜区域以及半除去仅一次曝光的薄膜区域，这样就形成了光刻胶薄膜图案，其线条具有四面侧壁；在生成的整个图案结构上沉积上一种绝缘层；对此绝缘层进行各向异性腐蚀，结果在光刻胶薄膜图案的线条的侧壁上剩下了绝缘隔离物；然后以这些绝缘隔离物作为掩膜对光刻胶薄膜图案和底层进行干腐蚀，这样就形成了具有超微细宽度和超微细间距的底层图案。
结合所附的图，详述本发明的一些优选实施方案，本发明的上述目的和其它优点将更为清楚。
图1表明，涂覆在基底上的光刻胶薄膜在曝光之后，经湿显影处理留下的薄膜厚度是随光的能量而异的。
图2至图8是一些示意截面图，它们依序表示本发明形成超微细图案的各工艺步骤。
参照所附的一些图，可以很好地理解本发明优选实施方案的应用情况，在图中，凡相同和对应的部分均以相同数字标示。
图1表明，涂覆在基底上的光刻胶薄膜在曝光之后，经湿显影处理留下的薄膜厚度视光的能量而异。在此图上，能够完全除去一定厚度光刻胶薄膜的最小曝光能量用阈能Eth表示。这就是说，该光刻胶薄膜若接受了光能量等于或大于阈能的曝光，则薄膜在湿显影后会完全去除。而若该光刻胶薄膜所受曝光的能量小于该阈能，则薄膜在湿显影处理后会留下一部分。在此情况下，使光刻胶薄膜厚度留下一半所对应的光能量表示为1/2Eth。
本发明正是利用了光刻胶薄膜受不同能量的光曝光后所留下薄膜的厚度不同，以便在所得光刻胶薄膜图形的侧壁上生成一些绝缘隔离物。即在本发明中，若一光刻胶薄膜在一掩模装置之下先受到了能量为1/2Eth的曝光，然后在经位移的该掩模装置之下再次受到相同能量的曝光，则在受到两次曝光的区域，光刻胶薄膜的剩余厚度与仅受到一次曝光区域的剩余厚度是不同的。
下面将结合图2至图8详述本发明的一种实施方案。
首先，参见图2。在基底1上形成一要在其上制作图形的底层2，再覆以一预定厚度的正光刻胶薄膜3，通过一铬图案掩模5第一次接受光6的曝光，这样就生成了第一次曝光区4。第一次曝光的光能量为Eth的一半，Eth是能完全除去光刻胶薄膜所需的光能量。这时，曝光区的宽度W1与未曝光区的宽度W2都由掩模5的铬图案所决定，这两种度宽可以做得很微细，达到光刻法所能获得的最为超微细的程度。
将所用的掩模5向左或向右位移W1一半的距离后，再通过该掩模对光刻胶薄膜进行1/2Eth能量的曝光。截面图如图3所示。结果生成了第二次曝光区4′，这第二次曝光区中有一段宽为1/2W1的区域与第一次曝光区4是重叠的。上述的掩模位移可藉掩模本身或基底的移动来实现。
图4是具有第一次曝光区4和第二次曝光区4′的光刻胶薄膜3经过湿显影处理后的截面图，结果生成了光刻胶薄膜图案3′，它分为上半层和下半层。第一次曝光区4与第二次曝光区4′重叠的区域7等于是经过了能量为Eth的曝光，所以经湿显影后被完全除去。而在第一次和第二次曝光区4和4′的未重叠区域，则除去了光刻胶薄膜3的一半厚度。
图5是在上述所得结构上面完全沉积上一层绝缘隔离层(其材料如氧化硅或SOG)后的截面图。
图6是该绝缘层受了各向异性腐蚀处理后的截面图，结果在光刻胶图案3′的上半部和下半部的侧壁上留下形成了隔离物8′。当采取氧化硅为绝缘层时，氧化硅对光刻胶的腐蚀选择性之比值至少应为20∶1。
图7是光刻胶薄膜在隔离物8′用作掩模的条件下经受了干腐蚀后的截面图，结果形成了位于隔离物8′下面的光刻胶薄膜图案3″。
然后在隔离物8′用作掩模的条件下对底层2进行腐蚀，形成了底层图案2′，继以除去隔离物8′和超微细光刻胶薄膜图案3″，经这两个处理后的截面图如图8所示。这个图所示的底层图案2′的线条是很狭的，其间的距离也达到最小。
如前所述，本发明是基于认识到对应于一定厚度的涂覆光刻胶薄膜，有一阈能存在。在对光刻胶薄膜通过一掩模进行第一次能量为1/2Eth的曝光后，掩模向左或向右位移一预定距离，再对薄膜作同能量的曝光。光刻胶薄膜经显影后的厚度，在仅一次曝光区和两次曝光区，是不同的。结果形成的光刻胶薄膜图案有上半部和下半部。在其上半部和下半部的侧壁上形成一些隔离物，将它们用作干腐蚀处理时的掩模，从而形成了超微细图案。结果按本发明这样获得的底层图案，其线条间距可以比一般光刻法所得的小得多。
对掌握通常技术的人来说，阅读了上述的揭示内容之后，就不难明白本发明其它的特点、优点和实施方案了。虽然对本发明的一些特定实施方案作了较详叙述，但可不偏离所叙述的并提出权利要求的本发明的精神和范围，对其实施方案进行一些变动和修改。

Claims (7)

1.一种形成半导体器件超微细图案的方法，其步骤为：
在要制作图案的底层上面涂覆一层光刻胶薄膜；
通过一个具有铬图案的掩模让该光刻胶薄膜先接受一次曝光，所曝光的能量小于对应于光刻胶薄膜厚度的阈能；
在将所述掩模位移一预定距离之后，再令该光刻胶薄膜接受小于该阈能的第二次曝光；
将经曝光的光刻胶薄膜进行显影处理，以完全除去第一次曝光区与第二次曝光区相重叠的薄膜区域以及半除去仅一次曝光的薄膜区域，形成了光刻胶薄膜图案，其线条具有四面侧壁；
在生成的整个图案结构上沉积上一种绝缘层；
对此绝缘层进行各向异性腐蚀，结果在光刻胶薄膜图案的线条的侧壁上剩下绝缘隔离物；
以这些隔离物作为掩模对光刻胶薄膜图案和底层进行干腐蚀，这样就形成了具有超微细宽度和超微细间距的底层图案。
2.按权利要求1所述的方法，其特征在于，第一次和第二次曝光的光能量都是对应于光刻胶薄膜厚度的阈能的一半。
3.按权利要求1所述的方法，其特征在于，光刻胶薄膜的第一次曝光和第二次曝光重叠的区域被完全除去，而仅受一次曝光的薄膜区域仅除去其一半厚度。
4.按权利要求1所述的方法，其特征在于，该光刻胶薄膜是一种正光刻胶薄膜。
5.按权利要求1所述的方法，其特征在于，是将基底上的光刻胶薄膜相对应于掩模进行位移的。
6.按权利要求1所述的方法，其特征在于，用于绝缘隔离的材料与光刻胶薄膜材料的腐蚀选择性之比至少为20∶1。
7.按权利要求1所述的方法，其特征在于，掩模位移的距离为铬图案线条宽度的一半。
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