CN1084524C - Soi基片的制造方法 - Google Patents
Soi基片的制造方法 Download PDFInfo
- Publication number
- CN1084524C CN1084524C CN96123929A CN96123929A CN1084524C CN 1084524 C CN1084524 C CN 1084524C CN 96123929 A CN96123929 A CN 96123929A CN 96123929 A CN96123929 A CN 96123929A CN 1084524 C CN1084524 C CN 1084524C
- Authority
- CN
- China
- Prior art keywords
- soi substrate
- silicon wafer
- manufacture method
- ion
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 41
- 238000000034 method Methods 0.000 title claims description 27
- 239000012212 insulator Substances 0.000 title 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 71
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 71
- 239000010703 silicon Substances 0.000 claims abstract description 71
- 238000004519 manufacturing process Methods 0.000 claims abstract description 21
- -1 oxygen ions Chemical class 0.000 claims abstract description 17
- 238000000137 annealing Methods 0.000 claims abstract description 7
- 150000002500 ions Chemical class 0.000 claims description 13
- 239000003550 marker Substances 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 238000002347 injection Methods 0.000 claims description 5
- 239000007924 injection Substances 0.000 claims description 5
- 239000004642 Polyimide Substances 0.000 claims 1
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 229920001721 polyimide Polymers 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 3
- 238000002955 isolation Methods 0.000 abstract description 2
- 229910052760 oxygen Inorganic materials 0.000 abstract description 2
- 239000001301 oxygen Substances 0.000 abstract description 2
- 239000011347 resin Substances 0.000 abstract description 2
- 229920005989 resin Polymers 0.000 abstract description 2
- 238000005468 ion implantation Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 239000000203 mixture Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 125000004430 oxygen atom Chemical group O* 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/78654—Monocrystalline silicon transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76267—Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (9)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069460A KR970052022A (ko) | 1995-12-30 | 1995-12-30 | 에스 오 아이 기판 제조방법 |
KR69460/95 | 1995-12-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1180238A CN1180238A (zh) | 1998-04-29 |
CN1084524C true CN1084524C (zh) | 2002-05-08 |
Family
ID=19448458
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN96123929A Expired - Fee Related CN1084524C (zh) | 1995-12-30 | 1996-12-30 | Soi基片的制造方法 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPH1012850A (zh) |
KR (1) | KR970052022A (zh) |
CN (1) | CN1084524C (zh) |
DE (1) | DE19654697A1 (zh) |
GB (1) | GB2309587B (zh) |
TW (1) | TW309648B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11204452A (ja) | 1998-01-13 | 1999-07-30 | Mitsubishi Electric Corp | 半導体基板の処理方法および半導体基板 |
KR100366923B1 (ko) * | 2001-02-19 | 2003-01-06 | 삼성전자 주식회사 | 에스오아이 기판 및 이의 제조방법 |
US6737332B1 (en) * | 2002-03-28 | 2004-05-18 | Advanced Micro Devices, Inc. | Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same |
EP1993127B1 (en) | 2007-05-18 | 2013-04-24 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of SOI substrate |
US8119490B2 (en) * | 2008-02-04 | 2012-02-21 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2183905A (en) * | 1985-11-18 | 1987-06-10 | Plessey Co Plc | Semiconductor device manufacture |
CN1034636A (zh) * | 1987-12-16 | 1989-08-09 | 菲利浦光灯制造公司 | 按图案制造氧化物超导材料薄膜的方法 |
US5270265A (en) * | 1992-09-01 | 1993-12-14 | Harris Corporation | Stress relief technique of removing oxide from surface of trench-patterned semiconductor-on-insulator structure |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5745947A (en) * | 1980-09-03 | 1982-03-16 | Toshiba Corp | Mos type semiconductor integrated circuit |
JPS6423529A (en) * | 1987-07-20 | 1989-01-26 | Fuji Electric Co Ltd | Manufacture of semiconductor device |
JPH03201535A (ja) * | 1989-12-28 | 1991-09-03 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置とその製造方法 |
JPH042120A (ja) * | 1990-04-18 | 1992-01-07 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH0467649A (ja) * | 1990-07-09 | 1992-03-03 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH0775244B2 (ja) * | 1990-11-16 | 1995-08-09 | 信越半導体株式会社 | 誘電体分離基板及びその製造方法 |
JPH04297055A (ja) * | 1991-03-26 | 1992-10-21 | Sharp Corp | 半導体装置の製造方法 |
EP0525256A1 (en) * | 1991-07-25 | 1993-02-03 | Motorola, Inc. | Method of fabricating isolated device regions |
JPH06268054A (ja) * | 1993-03-10 | 1994-09-22 | Nippondenso Co Ltd | 半導体装置 |
JPH0745713A (ja) * | 1993-07-29 | 1995-02-14 | Kawasaki Steel Corp | 半導体装置の製造方法 |
-
1995
- 1995-12-30 KR KR1019950069460A patent/KR970052022A/ko not_active Application Discontinuation
-
1996
- 1996-12-25 JP JP8356108A patent/JPH1012850A/ja active Pending
- 1996-12-27 GB GB9627000A patent/GB2309587B/en not_active Expired - Fee Related
- 1996-12-28 TW TW085116216A patent/TW309648B/zh active
- 1996-12-30 DE DE19654697A patent/DE19654697A1/de not_active Ceased
- 1996-12-30 CN CN96123929A patent/CN1084524C/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2183905A (en) * | 1985-11-18 | 1987-06-10 | Plessey Co Plc | Semiconductor device manufacture |
CN1034636A (zh) * | 1987-12-16 | 1989-08-09 | 菲利浦光灯制造公司 | 按图案制造氧化物超导材料薄膜的方法 |
US5270265A (en) * | 1992-09-01 | 1993-12-14 | Harris Corporation | Stress relief technique of removing oxide from surface of trench-patterned semiconductor-on-insulator structure |
Also Published As
Publication number | Publication date |
---|---|
TW309648B (zh) | 1997-07-01 |
KR970052022A (ko) | 1997-07-29 |
GB2309587A (en) | 1997-07-30 |
JPH1012850A (ja) | 1998-01-16 |
GB2309587B (en) | 2000-07-05 |
CN1180238A (zh) | 1998-04-29 |
DE19654697A1 (de) | 1997-07-03 |
GB9627000D0 (en) | 1997-02-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100311886B1 (ko) | 실리콘-온-절연체기판의 표면실리콘층의두께를변화시키기위한방법 | |
KR930010121B1 (ko) | 단일의 집적회로칩에 고압 및 저압 cmos 트랜지스터를 형성하는 공정 | |
US5112761A (en) | Bicmos process utilizing planarization technique | |
US5827747A (en) | Method for forming LDD CMOS using double spacers and large-tilt-angle ion implantation | |
GB2182489A (en) | Forming buried oxide regions | |
EP0745271B1 (de) | Verfahren zur herstellung eines einem graben benachbarten diffusionsgebietes in einem substrat | |
CN1237587C (zh) | 硅锗/绝缘体上外延硅互补金属氧化物半导体及其制造方法 | |
JPS63306667A (ja) | 半導体装置及びその製造方法 | |
CN1120525C (zh) | 浅结半导体器件的制造 | |
KR0170457B1 (ko) | Mosfet를 포함한 반도체 장치의 제조방법 | |
EP0422152A1 (en) | SIDE WALL DOPING METHOD FOR MESA STRUCTURES OF SOS AND SOI COMPONENTS. | |
KR930009062A (ko) | 반도체 집적회로장치의 제조방법 | |
CN1084524C (zh) | Soi基片的制造方法 | |
US5208181A (en) | Locos isolation scheme for small geometry or high voltage circuit | |
CN1186334A (zh) | 具有双栅极半导体器件的制造方法 | |
US6548369B1 (en) | Multi-thickness silicon films on a single semiconductor-on-insulator (SOI) chip using simox | |
KR100252856B1 (ko) | 반도체 소자의 제조 방법 | |
CN1956196A (zh) | biCMOS器件及biCMOS器件的制造方法 | |
KR910009739B1 (ko) | 반도체장치의 제조방법 | |
EP0225426B1 (en) | A method of fabricating a mos transistor on a substrate | |
KR980006254A (ko) | 반도체 소자의 제조방법 | |
JPH08167646A (ja) | Simox基板、simox基板の製造方法及び半導体装置の製造方法 | |
US6066530A (en) | Oxygen implant self-aligned, floating gate and isolation structure | |
CN1132411A (zh) | 在半导体器件间设置隔离的方法 | |
US6649977B1 (en) | Silicon on insulator self-aligned transistors |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: HYNIX SEMICONDUCTOR INC. Free format text: FORMER NAME OR ADDRESS: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Gyeonggi Do, South Korea Patentee after: Hairyoksa Semiconductor Co., Ltd. Address before: Gyeonggi Do, South Korea Patentee before: Hyundai Electronics Industries Co., Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: MAGNACHIP CO., LTD. Free format text: FORMER OWNER: HYNIX SEMICONDUCTOR INC. Effective date: 20070601 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20070601 Address after: North Chungcheong Province Patentee after: Magnachip Semiconductor Ltd. Address before: Gyeonggi Do, South Korea Patentee before: Hairyoksa Semiconductor Co., Ltd. |
|
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |