CN106486398B - 芯片贴装机、贴装方法及半导体器件的制造方法 - Google Patents

芯片贴装机、贴装方法及半导体器件的制造方法 Download PDF

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CN106486398B
CN106486398B CN201610743102.1A CN201610743102A CN106486398B CN 106486398 B CN106486398 B CN 106486398B CN 201610743102 A CN201610743102 A CN 201610743102A CN 106486398 B CN106486398 B CN 106486398B
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chip
bare chip
microscope carrier
wafer
bare
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CN106486398A (zh
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牧浩
滩本启祐
冈本直树
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Jie Jin Science And Technology Ltd
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Jie Jin Science And Technology Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0446—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0606—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3206—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
    • H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
    • H10P72/3212—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips or lead frames
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7612—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by lifting arrangements, e.g. lift pins
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07178—Means for aligning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07183—Means for monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
CN201610743102.1A 2015-08-31 2016-08-26 芯片贴装机、贴装方法及半导体器件的制造方法 Active CN106486398B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-170628 2015-08-31
JP2015170628A JP6584234B2 (ja) 2015-08-31 2015-08-31 ダイボンダ、ボンディング方法および半導体装置の製造方法

Publications (2)

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CN106486398A CN106486398A (zh) 2017-03-08
CN106486398B true CN106486398B (zh) 2019-07-09

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Country Link
JP (1) JP6584234B2 (https=)
KR (2) KR101807419B1 (https=)
CN (1) CN106486398B (https=)
TW (1) TWI623982B (https=)

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KR101802080B1 (ko) 2016-05-31 2017-11-27 세메스 주식회사 웨이퍼로부터 다이들을 픽업하는 방법
JP6846958B2 (ja) * 2017-03-09 2021-03-24 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP6694404B2 (ja) * 2017-03-17 2020-05-13 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP6818608B2 (ja) * 2017-03-28 2021-01-20 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP6975551B2 (ja) * 2017-05-18 2021-12-01 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP6868471B2 (ja) * 2017-05-31 2021-05-12 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP7102113B2 (ja) * 2017-09-11 2022-07-19 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
WO2019065394A1 (ja) * 2017-09-29 2019-04-04 株式会社新川 実装装置
CN108155125B (zh) * 2017-12-25 2020-07-21 北京中电科电子装备有限公司 一种半导体芯片贴片装置
JP7018338B2 (ja) * 2018-03-19 2022-02-10 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
KR102568388B1 (ko) * 2018-06-04 2023-08-18 한화정밀기계 주식회사 본딩 장치
CN110364446B (zh) * 2019-07-22 2021-04-09 深圳市得润光学有限公司 一种塑封光电耦合器的制造装置
JP7285162B2 (ja) * 2019-08-05 2023-06-01 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
CN110690152A (zh) * 2019-08-28 2020-01-14 苏州均华精密机械有限公司 大尺寸晶片接合装置
TWI739438B (zh) * 2020-05-21 2021-09-11 鴻騏新技股份有限公司 具有雙作業線的基板貼合機台以及具有雙作業線的基板處理系統
JP7498630B2 (ja) * 2020-09-11 2024-06-12 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7704534B2 (ja) * 2021-01-18 2025-07-08 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7570258B2 (ja) 2021-03-08 2024-10-21 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7714414B2 (ja) * 2021-09-13 2025-07-29 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7757097B2 (ja) * 2021-09-15 2025-10-21 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
CN115375612A (zh) * 2021-12-11 2022-11-22 微见智能封装技术(深圳)有限公司 一种提高芯片识别效率的方法
WO2025028255A1 (ja) * 2023-07-28 2025-02-06 東京エレクトロン株式会社 接合装置、接合システム、及び接合方法

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JPH0917841A (ja) * 1995-06-27 1997-01-17 Nichiden Mach Ltd ピックアップ装置及びチップ位置決め方法
JP2010040738A (ja) * 2008-08-05 2010-02-18 Toshiba Corp 半導体装置の製造装置及び製造方法
CN203387842U (zh) * 2012-07-06 2014-01-08 松下电器产业株式会社 元件安装装置
CN104205317A (zh) * 2012-03-27 2014-12-10 富士机械制造株式会社 裸片供给装置

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CH698334B1 (de) * 2007-10-09 2011-07-29 Esec Ag Verfahren für die Entnahme und Montage von auf einem Wafertisch bereitgestellten Halbleiterchips auf einem Substrat.
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JP5815345B2 (ja) * 2011-09-16 2015-11-17 ファスフォードテクノロジ株式会社 ダイボンダ及びボンディング方法
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Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
JPH0917841A (ja) * 1995-06-27 1997-01-17 Nichiden Mach Ltd ピックアップ装置及びチップ位置決め方法
JP2010040738A (ja) * 2008-08-05 2010-02-18 Toshiba Corp 半導体装置の製造装置及び製造方法
CN104205317A (zh) * 2012-03-27 2014-12-10 富士机械制造株式会社 裸片供给装置
CN203387842U (zh) * 2012-07-06 2014-01-08 松下电器产业株式会社 元件安装装置

Also Published As

Publication number Publication date
KR20170136483A (ko) 2017-12-11
JP6584234B2 (ja) 2019-10-02
KR20170026281A (ko) 2017-03-08
KR101838456B1 (ko) 2018-03-13
TW201719773A (zh) 2017-06-01
CN106486398A (zh) 2017-03-08
TWI623982B (zh) 2018-05-11
JP2017050327A (ja) 2017-03-09
KR101807419B1 (ko) 2017-12-08

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