CN106471617A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN106471617A
CN106471617A CN201480077767.2A CN201480077767A CN106471617A CN 106471617 A CN106471617 A CN 106471617A CN 201480077767 A CN201480077767 A CN 201480077767A CN 106471617 A CN106471617 A CN 106471617A
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lead frame
semiconductor device
squama
moulding resin
metal
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CN106471617B (zh
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梶原孝信
中岛大辅
大前胜彦
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Mitsubishi Corp
Mitsubishi Electric Corp
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Abstract

通过连续地利用激光进行点照射,从而在表面实施了金属镀敷的引线框(2)设置使金属镀敷变形成鳞状而得到的鳞状部(3)。鳞状部(3)被配置在引线框(2)的任意部位,例如浇口切断痕迹(8)附近、被模塑树脂(8)密封的区域内的外周部、半导体元件(1)的周围等。利用该鳞状部(3)的锚固效果,引线框(2)与模塑树脂(8)的密接力提高,从而能够抑制模塑树脂(8)从引线框(2)剥离。

Description

半导体装置
技术领域
本发明涉及树脂模塑型的半导体装置,尤其涉及引线框与模塑树脂的密接性的提高。
背景技术
半导体装置中,将铜板或铜合金板用于搭载半导体元件的引线框,并在其表面施加金、银、镍、或锡等金属镀敷,目的在于改善耐腐蚀性、耐热性。其中大多采用镀镍。
另一方面,由于在引线框表面覆盖金属镀敷,因此有时会导致与用于传递模塑成型的环氧树脂等模塑树脂的密接性降低。因此,在传递模塑成型之后,在引线框与模塑树脂之间会立刻发生初始剥离。并且,众所周知由于使用环境下的反复的热应力,模塑树脂容易从引线框剥离。
作为具有用于提高引线框表面的金属镀敷与模塑树脂的密接性的结构的现有例,在专利文献1中,采用下述结构:在至少表面的一部分具备被绝缘性树脂密封的覆盖面的封装元器件中,利用导电性皮膜覆盖引线框的表面,进一步在上述覆盖面具有对该导电性皮膜进行粗糙化后得到的粗糙面镀层。
此外,在专利文献2中,通过利用金属模具对引线框进行冲压即进行所谓的填孔(dimple)加工,从而以大致相等的间隔着纵横方向上配置多个方形凹部,由此利用锚固效果来抑制模塑树脂的剥离(参照图14)。
现有技术文献
专利文献
专利文献1:日本专利第5264939号
专利文献2:日本专利第3748849号
发明内容
发明所要解决的问题
然而,专利文献1所示的封装元器件的粗糙面镀层与平滑面镀层相比,存在导线键合性较差的问题。因此,导线的接合强度下降、以及未接合的可能性提高。此外,还存在着对与导线的连接部局部地实施条纹镀敷、掩模镀敷的方法,但与全面镀敷相比,存在成本增加的问题。
若考虑到填孔加工的加工性,则专利文献2所示的半导体装置的方形凹部需要具有200μm左右的宽度,从而在引线框中无法确保足够的面积的情况下难以进行加工。尤其是引线框的与导线连接的连接部附近多为面积狭窄的区域,因此存在填孔加工无法进行的问题。此外,若要确保形成方形凹部的面积,则会阻碍半导体装置的小型化。
此外,在引线框表面形成镀镍层的情况下,由于与铜相比,镀镍的硬度较高,用于形成方形凹部的金属模具的突起的磨损变快,存在生产性下降的问题。
并且,引线框会因填孔加工而发生变形,从而存在难以确保引线框的平坦度的问题。尤其是在桥接安装电子元器件的半导体装置的情况下,由于引线框的变形会导致产生应力,给焊料、电子元器件造成损伤,因此必须要确保引线框的平坦度。
本发明的目的在于,鉴于上述问题点,提供一种使表面施加了金属镀敷的引线框与模塑树脂的密接性提高,能够进行小型化,且生产性和可靠性较高的半导体装置。
解决技术问题所采用的技术方案
本发明所涉及的半导体装置包括搭载半导体元件的引线框、以及对引线框的至少搭载有半导体元件的面进行密封的模塑树脂,引线框的表面的一部分或整体被金属镀敷覆盖,并且在被模塑树脂密封的区域内具有使金属镀敷的表面形状变形成鳞状的鳞状部。
发明效果
根据本发明所涉及的半导体装置,利用鳞状部的锚固效果,引线框与模塑树脂的密接力提高,从而能够抑制模塑树脂从引线框剥离。鳞状部由于是通过使金属镀敷的表面形状变形而得到的,因此,能够容易地配置于任意的部位,在加工时不会损坏引线框的平坦度,因此,能够得到可进行小型化且生产性和可靠性较高的半导体装置。
本发明的上述以外的目的、特征、观点和效果可根据参照附图下述本发明的详细说明来得以进一步明确。
附图说明
图1是表示本发明的实施方式1所涉及的半导体装置的剖视图。
图2是表示本发明的实施方式1所涉及的半导体装置的传递模塑成型工序的剖视图。
图3是表示本发明的实施方式1所涉及的半导体装置的鳞状部的俯视图。
图4是表示本发明的实施方式1所涉及的半导体装置的鳞状部的剖视图。
图5是表示本发明的实施方式1所涉及的半导体装置的鳞状部的剖视图。
图6是表示本发明的实施方式1所涉及的半导体装置的鳞状部的形态的扫描电子显微镜照片的图。
图7是表示本发明的实施方式1所涉及的半导体装置的鳞状部的形态的扫描电子显微镜照片的图。
图8是表示本发明的实施方式1所涉及的半导体装置的鳞状部的配置例的图。
图9是表示本发明的实施方式1所涉及的半导体装置的鳞状部的配置例的图。
图10是表示本发明的实施方式1所涉及的半导体装置的鳞状部的配置例的图。
图11是表示本发明的实施方式1所涉及的半导体装置的鳞状部的配置例的图。
图12是表示本发明的实施方式1所涉及的半导体装置的鳞状部的配置例的图。
图13是表示现有半导体装置中用于提高引线框与模塑树脂的密接性的结构的图。
图14是表示现有的其他半导体装置中用于提高引线框与模塑树脂的密接性的结构的图。
图15是表示本发明的实施方式2所涉及的半导体装置的鳞状部的俯视图。
图16是表示本发明的实施方式2所涉及的半导体装置的鳞状部的剖视图。
图17是表示本发明的实施方式3所涉及的半导体装置的剖视图。
图18是表示本发明的实施方式3所涉及的其他半导体装置的剖视图。
具体实施方式
实施方式1.
下面,基于附图说明本发明的实施方式1所涉及的半导体装置。图1示出了本实施方式1所涉及的树脂模塑型的半导体装置的结构的一个示例。本实施方式1所涉及的半导体装置100构成为包括半导体元件1、引线框2、导线5、内引线6以及外部端子7等。另外,在下述所有图中,对图中相同、相当部分标注相同标号。
半导体元件1例如是IGBT、MOSFET、IC芯片、LSI芯片等,经由焊料、银等接合构件4安装于引线框2的上表面。搭载半导体元件1或其他电子元器件的引线框2由铜板或铜合金板构成,其表面被金、银、镍、锡等金属镀敷(省略图示)覆膜。并且,引线框2具有使金属镀敷的表面形状变形成鳞状的鳞状部3。该鳞状部3将在后文中详细说明。
半导体元件1的电极焊盘经由通过导线键合连接的导线5、或者由铜板或铜合金板的材料制成的内引线6与外部端子7连接。导线5与内引线6彼此可替换。导线5由金、银、铝、铜等形成,线径为20μm到500μm左右。
引线框2的至少搭载有半导体元件1的面由环氧树脂等模塑树脂8通过传递模塑成型来进行密封。图1的示例中,利用模塑树脂8对引线框2的两面进行密封。模塑树脂8的规定部位存在浇口切断痕迹8a。
图2示出了半导体装置100的制造工序中的传递模塑成型工序。如图2所示,在成型金属模具20的内部设置有安装了半导体元件1和其他构件的引线框2。熔融后的模塑树脂被注入到成型金属模具20的空洞21。
残留在成型金属模具20中模塑树脂的通道即浇口22内的模塑树脂被称为浇道(runner)8b。在传递模塑成型后,从成型金属模具20取出半导体装置100之后,实施分离浇道8b与半导体装置100的浇口切断。浇口切断后的半导体装置100中残留有浇口切断痕迹8a。
在该传递模塑成型工序中,在从成型金属模具20排出半导体装置100时,从引线框2剥下模塑树脂8的应力发生作用,从而发生初始剥离。该应力是由于下述原因而产生的,例如模塑树脂8虽然只有一点但仍与成型金属模具20密接、以及为了不使模塑树脂8大量从成型金属模具20漏出而将外部端子7与成型金属模具20的间隙设得非常狭窄等。
此外,在半导体装置100的浇口切断痕迹8a附近也容易发生初始剥离。这是主要是由于下述原因导致的,即:在浇口切断时对引线框2施加力,以及浇口切断痕迹8a附近是流过粘度较高的模塑树脂8的部位,与引线框2的密接性较差。
在半导体装置100中距浇口切断痕迹8a直线距离最长的部位,即模塑树脂的最终填充部位容易发生初始剥离。这主要是因为热固性模塑树脂8在粘度变高浸润性变差的状态下最后会流入距浇口切断痕迹8a距离最长的部位,从而与引线框2的密接性较差。
并且,在未发生初始剥离的情况下,由于使用环境下的反复的热应力,从而会在引线框2与模塑树脂8之间产生剥离。尤其是在使用焊料作为接合构件4的情况下,焊料与模塑树脂8的密接性相比于其他部分低,因此,模塑树脂8容易从引线框2的附着有焊料的部分剥离。
作为抑制这种模塑树脂8从引线框2剥离的手段,半导体装置100具有使覆盖引线框2的表面的金属镀敷的表面状态变形成鳞状而得到的鳞状部3。利用该鳞状部3的锚固效果,提高金属镀敷与模塑树脂8的密接性,抑制模塑树脂8从引线框2剥离。
图3是表示半导体装置100的鳞状部3的俯视图,图4是指图3所示的A-A部分切断后得到的剖视图,图5是指图3所示的B-B部分切断后得到的剖视图。图6和图7是表示鳞状部3的形态的扫描电子显微镜照片的图。
鳞状部3是通过对引线框2连续地利用激光进行点照射,从而使金属镀层30变形成鳞状而得到的,如图3所示,在任意的直线上或曲线上以规定的宽度W进行配置。
鳞状部3具有连续配置有鳞片状的突起的鳞片部31、以及在鳞片部31的两侧凸起至高于鳞片部31的隆起部32。鳞状部3的宽度W和高度可通过激光的输出、扫描速度等来进行调整。
另外,鳞状部3的宽度W例如为60μm左右,但也可以根据所配置的部位的面积设定得较大。通过增大鳞状部3的宽度W,由此与模塑树脂8的密接性进一步提高。
使用图18~图12说明鳞状部3的配置例及其效果。图8所示的示例中,鳞状部3被配置在引线框2的浇口切断痕迹8a附近,即靠近成型金属模具20的浇口22(参照图2)的部位。由此,能够提高容易发生初始剥离的浇口切断痕迹8a附近的金属镀层30与模塑树脂8的密接力。
在图9的示例中,鳞状部3被配置在引线框2的距浇口切断痕迹8a直线距离最长的部位附近。由此,能够提高容易发生初始剥离的最终填充部位附近的金属镀层30与模塑树脂8的密接力。
在图10所示的示例中,鳞状部3被配置在引线框2的被模塑树脂8密封的区域内的外周部。由此,能够抑制因从成型金属模具20排出半导体装置100时的应力而引起的初始剥离、因其他的来自外部的应力而引起的剥离,并具有防止水分和污染物质侵入模塑树脂8内部的效果。
在图11所示的示例中,鳞状部3被配置在引线框2的搭载有半导体元件1的部位的周围。由此,能够抑制住接合构件4附近容易发生的因使用环境下的反复的热应力而引起的剥离,从而实现半导体装置100的长寿命化。并且,在接合构件4为焊料的情况下,通过将鳞状部配置为包括接合构件4附近,从而焊料的浸润角变大,能够防止焊料的流出。
在图12所示的示例中,鳞状部3被广泛配置在引线框2的除导线连接部2a之外的区域。由此,通过避开引线框2的导线连接部2a来配置鳞状部3,从而导线键合性不会下降,可实现导线5与引线框2的良好的接合。
由于鳞状部3按此方式通过激光进行点照射来形成,因此,能够形成在引线框2上的任意部位。从而仅对想要配置鳞状部3的部位选择性地进行处理,且避开未配置鳞状部3的部位例如导线连接部2a等进行处理也较为容易。此外,通过图8~图12所示那样一笔画出鳞状部3的处理图案,能够缩短生产周期,生产性提高。
接着,图13和图14示出现有的半导体装置中用于提高引线框与模塑树脂的密接性的结构,来作为本实施方式1所涉及的半导体装置100的比较例。图13所示的现有例中,在引线框2的模塑树脂8一侧的面,按规定的膜厚形成具有表面轮廓的粗糙面镀层33,该表面轮廓通过在镀镍层的覆盖面进行粗糙化而得到。
形成有这种粗糙面镀层33的封装元器件提高了引线框2与模塑树脂8的密接性,而且其密接性不会变差。然而,由于粗糙面镀层33与平滑面镀层34相比导线键合性较差,因此存在导线的接合强度下降、未接合的可能性较高的问题。
与此相对地,本实施方式1所涉及的半导体装置100的鳞状部3能够选择性地形成在引线框2上的任意部位,能够避开引线框2的导线连接部2a来进行处理,因此在不会导致导线键合性下降这一点上十分有利。
图14所示的其他现有例中,在引线框2的下垫板2b以外的区域,通过利用引线框冲压金属模具的填孔加工,以大致相等的间隔形成多个方形凹部9。在具有这种结构的半导体装置中,由于方形凹部9的锚固效果,引线框2与模塑树脂的密接性也提高。
但是,若考虑到填孔加工的加工性,则方形凹部9需要具有200μm左右的宽度,由于引线框2的设计无法确保足够的面积,从而较难进行加工。与此相对地,在60μm左右的狭窄空间内也能形成本实施方式1的鳞状部3,从而能够有助于半导体装置的小型化。鳞状部3由于是激光加工得到,因此不需要金属模具,从而无需考虑金属模具的突起的磨损等,在生产性较高这一点上十分有利。
若利用超声波视频装置等检查半导体装置100,则可明确在预计以外的部位容易发生剥离。这种情况下,修改或者重新制作成型金属模具20(参照图2)需要耗费非常长的工期和非常高的成本。本实施方式1的鳞状部3对于这种情况是有效的。即,能够选择性地配置在明确了容易发生剥离的部位,从而能够以低成本进行应对。
并且,由于方形凹部9与相邻的方形凹部9之间具有间隙,因此,接合半导体元件的焊料容易从该间隙流出到周围。对此,本实施方式1中,如图11所示,通过配置鳞状部3来包围半导体元件1,从而鳞状部3的隆起部32成为阻挡物,防止焊料流出的效果较大。由此,能够抑制半导体元件1的位置偏移。
另外,本实施方式1中,对使用传递模塑法制造得到的半导体装置100进行了说明,但半导体装置100的制造方法并不限于此。例如,也可以使用射出模塑法,在该情况下,由于树脂的成本低廉,从而能够有助于低成本化。
如上所述,本实施方式1所涉及的半导体装置100中,由于鳞状部3的锚固效果,引线框2与模塑树脂8的密接力提高,因此,能够抑制模塑树脂8从引线框2剥离。
此外,鳞状部3通过向引线框2照射激光而形成,因此能够容易地配置于任意的部位,从而在加工时不会损害引线框2的平坦度。由此,根据本实施方式1,可得到能进行小型化且生产性和可靠性较高的半导体装置100。
实施方式2.
本发明的实施方式2所涉及的半导体装置的整体结构与上述实施方式1相同,因此,沿用图1,并省略各部分的说明。图15是表示本实施方式2所涉及的半导体装置100的鳞状部3a的俯视图,图16是在图15所示的C-C部分切断后得到的剖视图。
本实施方式2的鳞状部3a在规定宽度W的中央部附近具有金属镀层30下的引线框2、即铜或铜合金露出的露出部2c。其他结构与上述实施方式1的鳞状部3相同。与金属镀层30相比,露出的铜或铜合金与模塑树脂8的密接性较高,因此,与上述实施方式1相比,能够进一步抑制模塑树脂的剥离。
作为使鳞状部3a的中央部的引线框2露出的方法,例如有相比于上述实施方式1提高了激光照射的输出从而使中央部的金属镀敷完全熔融的方法、在激光处理后利用喷丸处理等物理加工来削除金属镀敷的方法等。
另外,虽然引线框2的材料即铜容易氧化,在露出的状态下需要耗费成本来进行氧化度的管理,但在本实施方式2中,设为在紧接着传递模塑成型之前的工序中形成鳞状部3a,通过尽可能缩短铜露出的时间,从而铜的氧化度的管理容易,能够抑制因此而导致的成本上升。
根据本实施方式2,除了与上述实施方式1相同的效果之外,通过在鳞状部3a的中央部设置使得与模塑树脂8的密接性较高的铜或铜合金露出的露出部2c,从而与上述实施方式1相比,抑制模塑树脂8从引线框2的剥离的效果进一步变高。
实施方式3.
本发明的实施方式3中,对将鳞状部3应用于结构不同于实施方式1的半导体装置100的半导体装置的示例进行说明。图17示出了本实施方式3所涉及的半导体装置101。半导体装置101具备以跨过引线框2的相分离的两个区域之间的方式桥接安装的电子元器件10。电子元器件10是电容器、热敏电阻等。
本实施方式3中,桥接安装电子元器件10的引线框2的两个区域可以是搭载有半导体元件1的区域和未搭载半导体元件1的区域、搭载有半导体元件1的两个区域、未搭载半导体元件1的两个区域中的任意一种。
在对电子元器件10进行桥接安装时,若引线框2存在变形,则应力会施加到电子元器件10、接合构件4,从而造成损伤。在图14所示的现有例中,由于通过使用了金属模具的填孔加工来形成方形凹部9,因此,不能确保引线框的平坦度,桥接安装在技术上较为困难。
与此相对地,本实施方式3所涉及的半导体装置101中,通过激光进行点照射来设置鳞状部3,从而在加工时不会损害引线框2的平坦度。因此,引线框2的各区域间的高低差在几十μm左右,平坦度得以确保。由此,施加于桥接安装的电子元器件10、接合构件4的应力得到缓和,从而能够防止电子元器件10、接合构件4的损坏和破裂。
此外,在电子元器件10是起到噪声滤波器的作用的电容器的情况下,利用桥接安装将其配置到半导体装置101的内部变得容易,作为噪声滤波器的效果变大。并且,通过在电子元器件10的周围的引线框2配置鳞状部3,能够抑制容易在接合构件4的附近发生的因使用环境下的反复的热应力而引起的剥离。
图18示出了本实施方式3所涉及的其他半导体装置102。半导体装置102中,在引线框2的下部经由粘接构件11安装有片材12。粘接构件11是油脂、粘接剂、树脂类粘接材料等。使用具有电绝缘性且热传导率较高的陶瓷、硅树脂来作为片材12。
此外,在粘接构件11具有电绝缘性的情况下,使用热传导较高的铜作为片材12。并且,在安装散热器的情况下,可以将片材12安装在散热器一侧。由此,在引线框2的下部没有被模塑树脂8覆盖的情况下也能够应用鳞状部3,从而得到散热性优异的半导体装置12。
另外,图17、图18中,在半导体装置101、102设置了鳞状部3,也可以设置中央部的引线框2露出的鳞状部3a。此外,鳞状部3、3a例如如图8~图12的配置例那样,能够配置于任意的部位。
根据本实施方式3,能够获得上述实施方式1和实施方式2相同的效果,即提高金属镀层30与模塑树脂8的密接力,抑制模塑树脂8从引线框2剥离,并且可得到功能性和可靠性较高、且能够实现长寿命、小型化的半导体装置。
另外,可适用本发明的半导体装置的结构和制造方法不仅限于上述实施方式1~实施方式3。本发明在其发明的范围内能够自由地组合各实施方式,能适当地对各实施方式进行变形和省略。
工业上的实用性
本发明能够利用于树脂模塑型的半导体装置。

Claims (10)

1.一种半导体装置,包括:搭载半导体元件的引线框;以及对所述引线框的至少搭载有所述半导体元件的面进行密封的模塑树脂,所述半导体装置的特征在于,
所述引线框的表面的一部分或整体被金属镀敷覆盖,并且在被所述模塑树脂密封的区域内,具有使所述金属镀敷的表面形状变形成鳞状后得到的鳞状部。
2.如权利要求1所述的半导体装置,其特征在于,
所述鳞状部按规定宽度配置在任意的直线上或曲线上。
3.如权利要求2所述的半导体装置,其特征在于,
所述鳞状部中,在所述规定宽度的中央部附近,所述金属镀敷下的所述引线框露出。
4.如权利要求1至3的任一项所述的半导体装置,其特征在于,
利用所述模塑树脂进行密封时所使用的成型金属模具具有熔融后的所述模塑树脂的通道即浇口,所述鳞状部配置在所述引线框的靠近所述浇口的部位。
5.如权利要求1至4的任一项所述的半导体装置,其特征在于,
利用所述模塑树脂进行密封时所使用的成型金属模具具有熔融后的所述模塑树脂的通道即浇口,所述鳞状部配置在所述引线框的距所述浇口直线距离最长的部位的附近。
6.如权利要求1至5的任一项所述的半导体装置,其特征在于,
所述鳞状部配置在所述引线框的由所述模塑树脂密封的区域内的外周部。
7.如权利要求1至6的任一项所述的半导体装置,其特征在于,
所述鳞状部配置在所述引线框的搭载有所述半导体元件的部位的周围。
8.如权利要求1至7的任一项所述的半导体装置,其特征在于,
具有电连接所述半导体元件和所述引线框的规定部位的导线,所述鳞状部配置在所述引线框的除了与所述导线连接的连接部以外的区域。
9.如权利要求1至8的任一项所述的半导体装置,其特征在于,
具有以跨过所述引线框的相分离的两个区域的方式桥接安装的电子元器件,所述鳞状部配置在所述引线框的搭载有所述电子元器件的部位的周围。
10.如权利要求1至9的任一项所述的半导体装置,其特征在于,
所述鳞状部是通过向所述引线框照射激光从而使所述金属镀敷变形后得到的。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111492468A (zh) * 2017-12-20 2020-08-04 株式会社电装 电子装置及其制造方法
CN112640096A (zh) * 2018-09-06 2021-04-09 三菱电机株式会社 半导体装置
CN112805814A (zh) * 2018-10-16 2021-05-14 三菱电机株式会社 电力用半导体装置及其制造方法
TWI774293B (zh) * 2020-04-24 2022-08-11 日商Jx金屬股份有限公司 金屬板、金屬樹脂複合體以及半導體設備

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6372148B2 (ja) 2014-04-23 2018-08-15 株式会社デンソー 半導体装置
CN108701661A (zh) * 2016-03-07 2018-10-23 三菱电机株式会社 半导体装置及半导体装置的制造方法
JP6561331B2 (ja) * 2016-03-30 2019-08-21 パナソニックIpマネジメント株式会社 半導体装置
JP6485397B2 (ja) * 2016-04-04 2019-03-20 株式会社デンソー 電子装置及びその製造方法
JP6485398B2 (ja) * 2016-04-13 2019-03-20 株式会社デンソー 電子装置及びその製造方法
JP6733585B2 (ja) * 2017-03-16 2020-08-05 株式会社デンソー 半導体装置およびその製造方法
KR101862705B1 (ko) * 2017-09-29 2018-05-30 제엠제코(주) 음각 패턴이 형성된 반도체 패키지용 클립, 리드프레임 및 이를 포함하는 반도체 패키지
TWI746883B (zh) * 2017-09-29 2021-11-21 韓商Jmj韓國有限公司 形成有陰刻圖案的半導體封裝用夾具、引線框架、基板及包括其的半導體封裝體
JP6742540B2 (ja) * 2017-12-13 2020-08-19 三菱電機株式会社 半導体装置及び電力変換装置
US10600725B2 (en) * 2018-05-29 2020-03-24 Shindengen Electric Manufacturing Co., Ltd. Semiconductor module having a grooved clip frame
WO2019229828A1 (ja) * 2018-05-29 2019-12-05 新電元工業株式会社 半導体モジュール
US10777489B2 (en) 2018-05-29 2020-09-15 Katoh Electric Co., Ltd. Semiconductor module
KR102125148B1 (ko) * 2018-12-05 2020-06-19 한양대학교 에리카산학협력단 음각 방식의 패턴 제조 방법 및 그 제조 방법으로 제조된 금속 나노 코팅층
US10937744B2 (en) 2019-02-22 2021-03-02 Infineon Technologies Ag Semiconductor packages including roughening features
JP7097933B2 (ja) * 2020-10-08 2022-07-08 三菱電機株式会社 半導体装置の製造方法
CN117981063A (zh) 2022-04-25 2024-05-03 富士电机株式会社 半导体装置
WO2023243256A1 (ja) * 2022-06-13 2023-12-21 富士電機株式会社 半導体装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032775A (ja) * 2004-07-20 2006-02-02 Denso Corp 電子装置
CN101218673A (zh) * 2005-07-08 2008-07-09 Nxp股份有限公司 半导体装置
JP2010161098A (ja) * 2009-01-06 2010-07-22 Nichiden Seimitsu Kogyo Kk リードフレームの製造方法及びリードフレーム、ヒートシンクの製造方法及びヒートシンク
US20100320579A1 (en) * 2009-06-22 2010-12-23 Texax Instruments Incorporated Metallic Leadframes Having Laser-Treated Surfaces for Improved Adhesion to Polymeric Compounds
CN103295916A (zh) * 2012-03-01 2013-09-11 瑞萨电子株式会社 半导体器件及其制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3748849B2 (ja) 2002-12-06 2006-02-22 三菱電機株式会社 樹脂封止型半導体装置
US8012886B2 (en) * 2007-03-07 2011-09-06 Asm Assembly Materials Ltd Leadframe treatment for enhancing adhesion of encapsulant thereto
WO2012049742A1 (ja) * 2010-10-13 2012-04-19 日立オートモティブシステムズ株式会社 流量センサおよびその製造方法並びに流量センサモジュールおよびその製造方法
JP5264939B2 (ja) 2011-01-14 2013-08-14 新光電気工業株式会社 パッケージ部品及び半導体パッケージ
JP5083472B1 (ja) * 2012-01-25 2012-11-28 パナソニック株式会社 Ledパッケージの製造方法
JP6102187B2 (ja) * 2012-10-31 2017-03-29 日亜化学工業株式会社 発光装置用パッケージ及びそれを用いた発光装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032775A (ja) * 2004-07-20 2006-02-02 Denso Corp 電子装置
CN101218673A (zh) * 2005-07-08 2008-07-09 Nxp股份有限公司 半导体装置
JP2010161098A (ja) * 2009-01-06 2010-07-22 Nichiden Seimitsu Kogyo Kk リードフレームの製造方法及びリードフレーム、ヒートシンクの製造方法及びヒートシンク
US20100320579A1 (en) * 2009-06-22 2010-12-23 Texax Instruments Incorporated Metallic Leadframes Having Laser-Treated Surfaces for Improved Adhesion to Polymeric Compounds
CN103295916A (zh) * 2012-03-01 2013-09-11 瑞萨电子株式会社 半导体器件及其制造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111492468A (zh) * 2017-12-20 2020-08-04 株式会社电装 电子装置及其制造方法
CN111492468B (zh) * 2017-12-20 2023-06-20 株式会社电装 电子装置及其制造方法
CN112640096A (zh) * 2018-09-06 2021-04-09 三菱电机株式会社 半导体装置
CN112805814A (zh) * 2018-10-16 2021-05-14 三菱电机株式会社 电力用半导体装置及其制造方法
TWI774293B (zh) * 2020-04-24 2022-08-11 日商Jx金屬股份有限公司 金屬板、金屬樹脂複合體以及半導體設備

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