JP7097933B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP7097933B2 JP7097933B2 JP2020170236A JP2020170236A JP7097933B2 JP 7097933 B2 JP7097933 B2 JP 7097933B2 JP 2020170236 A JP2020170236 A JP 2020170236A JP 2020170236 A JP2020170236 A JP 2020170236A JP 7097933 B2 JP7097933 B2 JP 7097933B2
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
Description
図1は実施の形態1に係る半導体装置100の概略を示す平面図、図2は図1のA-A断面位置で切断した半導体装置100の要部断面図、図3は半導体素子2の最大応力発生箇所12に発生する最大応力値を接合角度5に対して示した図、図4は半導体装置100の製造工程を示す図、図5は実施の形態1に係る別の半導体装置100の概略を示す要部断面図である。図1はモールド樹脂9を取り除いて示した図で、二点鎖線はモールド樹脂9の外形である。図2と図5は、モールド樹脂9も含めて示している。図1のA-A断面位置において半導体装置100は左右対称な構成なので、図2はA-A断面位置の右側の部分のみを示している。図2のA-A断面位置は半導体素子2を含む断面であるが、図1において半導体素子2の隣に配置された半導体素子1を含む断面においても同様の構成である。また、これらの図は模式的に示したものであり、実際の半導体装置100の各部の寸法関係とは異なるものである。半導体装置100は、半導体素子1、2をモールド樹脂9で封止した樹脂封止型の半導体装置100で、例えば電力制御に用いられるものである。
半導体装置100は、板状に形成された半導体素子1、2、板状に形成されたヒートスプレッダー3、第1のリードフレーム10、11、第2のリードフレーム6、及びモールド樹脂9を備える。例えば、半導体素子1はスイッチング素子で、半導体素子2は整流素子である。本実施の形態ではこれらの2つの半導体素子1、2を設けたが、半導体装置100が備える半導体素子は2つに限るものではなく、半導体装置100の用途等に応じて半導体素子は1つ、もしくは3つ以上であっても構わない。また、半導体素子1、2は一方の面及び他方の面の双方に電極パッド(図示せず)を備えた縦型構造の半導体であるが、半導体素子1、2は縦型構造の半導体に限らず、一方の面にのみ電極パッドを備えた横型構造の半導体素子でも構わない。
本願の要部であるチップ上接合材4の構成の説明の前に、図6及び図7を用いて比較例について説明する。図6は比較例の半導体装置101の概略を示す平面図、図7は比較例の半導体装置101を説明する断面図で図6のB-B断面位置で切断した半導体装置101の要部断面図である。図6はモールド樹脂9を取り除いて示した図で、二点鎖線はモールド樹脂9の外形である。図7はモールド樹脂9も含めて示している。図6のB-B断面位置において半導体装置101は左右対称な構成なので、図7はB-B断面位置の右側の部分のみを示している。図7のB-B断面位置は半導体素子2を含む断面であるが、図6において半導体素子2の隣に配置された半導体素子1を含む断面においても同様の構成である。半導体装置101は、半導体装置100と同様に、半導体素子1、2、ヒートスプレッダー3、第1のリードフレーム10、11、第2のリードフレーム6、及びモールド樹脂9を備える。
本願の要部であるチップ上接合材4の構成について説明する。半導体素子1、2の一方の面と第2のリードフレーム6の他方の面との間の隙間に、チップ上接合材4とモールド樹脂9との境界が設けられ、境界の部分をヒートスプレッダー3の一方の面に垂直な平面で切断した断面形状において、チップ上接合材4と半導体素子1、2との接合面の端点と、チップ上接合材4と第2のリードフレーム6との接合面の端点とを結んだ直線と、半導体素子1、2の一方の面とがなす2つの角度の内、チップ上接合材4の側の接合角度5は、90°以上で135°以下である。図2において、接合角度5cが90°、接合角度5fが135°である。接合角度5dと接合角度5eは、90°以上で135°以下の範囲にある接合角度5である。接合角度5aと接合角度5bは、90°未満の接合角度5である。
半導体装置100の製造方法について、図4を用いて説明する。半導体装置100は、ダイボンディング工程である第1工程(S11)と、リフロー工程である第2工程(S12)及び第3工程(S13)と、トランスファー成形工程である第4工程(S14)とで製造される。
実施の形態2に係る半導体装置100の製造方法について説明する。図8は半導体装置100の製造工程を示す図である。実施の形態2に係る半導体装置100の製造方法は、第1工程(S11)と第2工程(S12)と第3工程(S13)とを1度の工程(S10)で実施する。
従って、例示されていない無数の変形例が、本願明細書に開示される技術の範囲内において想定される。例えば、少なくとも1つの構成要素を変形する場合、追加する場合または省略する場合、さらには、少なくとも1つの構成要素を抽出し、他の実施の形態の構成要素と組み合わせる場合が含まれるものとする。
Claims (3)
- 第1の接合材を介して、板状に形成された半導体素子の他方の面を板状に形成されたヒートスプレッダーの一方の面に接合する第1工程と、
第2の接合材を介して、第1のリードフレームの他方の面を前記ヒートスプレッダーの一方の面に接合する第2工程と、
一定の厚みを有した固体からなる第3の接合材を第2のリードフレームの他方の面と前記半導体素子の一方の面との間に挟んだ後、リフロー加熱により前記第3の接合材を融解した後、冷却して、前記第3の接合材を介して前記第2のリードフレームの他方の面を前記半導体素子の一方の面に接合させ、前記第3の接合材を融解した後冷却する際に、前記半導体素子の一方の面と前記第2のリードフレームの他方の面との間の隙間に設けられた前記第3の接合材と前記第3の接合材の外側との境界の部分を、前記ヒートスプレッダーの一方の面に垂直な平面で切断した断面形状において、前記第3の接合材と前記半導体素子との接合面の端点と、前記第3の接合材と前記第2のリードフレームとの接合面の端点とを結んだ直線と、前記半導体素子の一方の面とがなす2つの角度の内、前記第3の接合材の側の角度を90°以上で135°以下にする第3工程と、
前記第1のリードフレームの一部及び前記第2のリードフレームの一部を外部に露出させて、前記ヒートスプレッダー、前記半導体素子、前記第1のリードフレーム、及び前記第2のリードフレームをモールド樹脂で封止する第4工程と、を備え、
前記第2のリードフレームの他方の面の前記境界の部分よりも内側の部分に、前記半導体素子に向かって突出して形成された突出部が、前記リフロー加熱の際に前記突出部に接した前記第3の接合材を押圧して、押圧により押し出された前記第3の接合材の部分が前記境界の部分の前記第3の接合材と前記第2のリードフレームとの接合面の端点の方に流れて前記第3の接合材の側の角度を90°以上で135°以下にし、
前記突出部の側面部分と前記境界の部分の間であって、前記半導体素子の一方の面と前記第2のリードフレームの他方の面との間における、前記突出部の押圧により押し出された前記第3の接合材の厚みは、リフロー加熱前の前記第3の接合材の厚みよりも厚い半導体装置の製造方法。 - 前記第2の接合材と前記第3の接合材とは同種もしくは同じ材料からなる接合材であって、
前記第2工程と前記第3工程とを1度の工程で実施する請求項1に記載の半導体装置の製造方法。 - 前記第1の接合材と前記第2の接合材と前記第3の接合材とは同種もしくは同じ材料からなる接合材であって、
前記第1工程と前記第2工程と前記第3工程とを1度の工程で実施する請求項1に記載の半導体装置の製造方法。
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WO2016125419A1 (ja) | 2015-02-04 | 2016-08-11 | 三菱電機株式会社 | 半導体装置 |
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