CN105990267A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN105990267A CN105990267A CN201510095088.4A CN201510095088A CN105990267A CN 105990267 A CN105990267 A CN 105990267A CN 201510095088 A CN201510095088 A CN 201510095088A CN 105990267 A CN105990267 A CN 105990267A
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- Prior art keywords
- chip
- semiconductor chip
- electrode
- salient pole
- protective film
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014-188531 | 2014-09-17 | ||
JP2014188531A JP6276151B2 (ja) | 2014-09-17 | 2014-09-17 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105990267A true CN105990267A (zh) | 2016-10-05 |
CN105990267B CN105990267B (zh) | 2018-11-30 |
Family
ID=55455490
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510095088.4A Active CN105990267B (zh) | 2014-09-17 | 2015-03-04 | 半导体装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US9972600B2 (zh) |
JP (1) | JP6276151B2 (zh) |
CN (1) | CN105990267B (zh) |
TW (1) | TWI620291B (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108206176A (zh) * | 2016-12-18 | 2018-06-26 | 南亚科技股份有限公司 | 三维集成电路封装及其制造方法 |
CN108630668A (zh) * | 2017-03-22 | 2018-10-09 | 东芝存储器株式会社 | 半导体装置 |
CN110634880A (zh) * | 2018-06-21 | 2019-12-31 | 东芝存储器株式会社 | 半导体装置及其制造方法 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6478853B2 (ja) * | 2015-07-14 | 2019-03-06 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
JP6489965B2 (ja) * | 2015-07-14 | 2019-03-27 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
KR102019352B1 (ko) | 2016-06-20 | 2019-09-09 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
TWI765595B (zh) * | 2016-08-31 | 2022-05-21 | 日商大日本印刷股份有限公司 | 貫通電極基板、貫通電極基板之製造方法及安裝基板 |
JP6753743B2 (ja) | 2016-09-09 | 2020-09-09 | キオクシア株式会社 | 半導体装置の製造方法 |
JP6727111B2 (ja) * | 2016-12-20 | 2020-07-22 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
JP2019054160A (ja) * | 2017-09-15 | 2019-04-04 | 東芝メモリ株式会社 | 半導体装置 |
KR20190083054A (ko) * | 2018-01-03 | 2019-07-11 | 삼성전자주식회사 | 반도체 패키지 |
JP2019153619A (ja) | 2018-02-28 | 2019-09-12 | 東芝メモリ株式会社 | 半導体装置 |
US10741498B2 (en) * | 2018-07-12 | 2020-08-11 | Samsung Electronics Co., Ltd. | Semiconductor package |
JP2020155591A (ja) | 2019-03-20 | 2020-09-24 | 株式会社東芝 | 半導体装置 |
US10818640B1 (en) * | 2019-04-02 | 2020-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Die stacks and methods forming same |
JP2021048195A (ja) * | 2019-09-17 | 2021-03-25 | キオクシア株式会社 | 半導体装置及び半導体装置の製造方法 |
KR20210066049A (ko) * | 2019-11-27 | 2021-06-07 | 삼성전자주식회사 | 반도체 패키지 |
TWI725820B (zh) * | 2020-04-15 | 2021-04-21 | 瑞峰半導體股份有限公司 | 具有矽穿孔結構的半導體元件及其製作方法 |
TWI787685B (zh) * | 2020-12-11 | 2022-12-21 | 力成科技股份有限公司 | 三維積體電路構裝及其製造方法 |
Citations (4)
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CN101630672A (zh) * | 2008-07-17 | 2010-01-20 | 东部高科股份有限公司 | 半导体芯片及半导体芯片堆叠式封装 |
US20110057327A1 (en) * | 2009-09-10 | 2011-03-10 | Elpida Memory, Inc. | Semiconductor device and method of manufacturing the same |
US20130075895A1 (en) * | 2011-09-22 | 2013-03-28 | Masayuki Miura | Semiconductor device and manufacturing method thereof |
CN203521406U (zh) * | 2013-10-25 | 2014-04-02 | 矽力杰半导体技术(杭州)有限公司 | 多芯片叠合封装结构 |
Family Cites Families (14)
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JP3772066B2 (ja) * | 2000-03-09 | 2006-05-10 | 沖電気工業株式会社 | 半導体装置 |
JP4126891B2 (ja) | 2001-08-03 | 2008-07-30 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP2003282819A (ja) * | 2002-03-27 | 2003-10-03 | Seiko Epson Corp | 半導体装置の製造方法 |
KR100537892B1 (ko) * | 2003-08-26 | 2005-12-21 | 삼성전자주식회사 | 칩 스택 패키지와 그 제조 방법 |
KR100570514B1 (ko) * | 2004-06-18 | 2006-04-13 | 삼성전자주식회사 | 웨이퍼 레벨 칩 스택 패키지 제조 방법 |
JP4016984B2 (ja) | 2004-12-21 | 2007-12-05 | セイコーエプソン株式会社 | 半導体装置、半導体装置の製造方法、回路基板、及び電子機器 |
JP2007180529A (ja) * | 2005-12-02 | 2007-07-12 | Nec Electronics Corp | 半導体装置およびその製造方法 |
KR100832845B1 (ko) * | 2006-10-03 | 2008-05-28 | 삼성전자주식회사 | 반도체 패키지 구조체 및 그 제조 방법 |
US8749065B2 (en) * | 2007-01-25 | 2014-06-10 | Tera Probe, Inc. | Semiconductor device comprising electromigration prevention film and manufacturing method thereof |
JP2011123955A (ja) * | 2009-12-11 | 2011-06-23 | Elpida Memory Inc | 半導体システム |
JP2012069903A (ja) | 2010-08-27 | 2012-04-05 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP2012209497A (ja) * | 2011-03-30 | 2012-10-25 | Elpida Memory Inc | 半導体装置 |
US8710654B2 (en) | 2011-05-26 | 2014-04-29 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
JP2015177061A (ja) * | 2014-03-14 | 2015-10-05 | 株式会社東芝 | 半導体装置の製造方法および半導体装置 |
-
2014
- 2014-09-17 JP JP2014188531A patent/JP6276151B2/ja active Active
-
2015
- 2015-03-02 US US14/636,071 patent/US9972600B2/en active Active
- 2015-03-04 CN CN201510095088.4A patent/CN105990267B/zh active Active
- 2015-03-04 TW TW104106903A patent/TWI620291B/zh active
-
2016
- 2016-08-26 US US15/249,146 patent/US10096574B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101630672A (zh) * | 2008-07-17 | 2010-01-20 | 东部高科股份有限公司 | 半导体芯片及半导体芯片堆叠式封装 |
US20110057327A1 (en) * | 2009-09-10 | 2011-03-10 | Elpida Memory, Inc. | Semiconductor device and method of manufacturing the same |
US20130075895A1 (en) * | 2011-09-22 | 2013-03-28 | Masayuki Miura | Semiconductor device and manufacturing method thereof |
CN203521406U (zh) * | 2013-10-25 | 2014-04-02 | 矽力杰半导体技术(杭州)有限公司 | 多芯片叠合封装结构 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108206176A (zh) * | 2016-12-18 | 2018-06-26 | 南亚科技股份有限公司 | 三维集成电路封装及其制造方法 |
CN108630668A (zh) * | 2017-03-22 | 2018-10-09 | 东芝存储器株式会社 | 半导体装置 |
JP2018160480A (ja) * | 2017-03-22 | 2018-10-11 | 東芝メモリ株式会社 | 半導体装置 |
CN108630668B (zh) * | 2017-03-22 | 2021-12-07 | 东芝存储器株式会社 | 半导体装置 |
CN110634880A (zh) * | 2018-06-21 | 2019-12-31 | 东芝存储器株式会社 | 半导体装置及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
US9972600B2 (en) | 2018-05-15 |
JP2016063017A (ja) | 2016-04-25 |
TWI620291B (zh) | 2018-04-01 |
JP6276151B2 (ja) | 2018-02-07 |
TW201613050A (en) | 2016-04-01 |
US20160365336A1 (en) | 2016-12-15 |
US20160079184A1 (en) | 2016-03-17 |
US10096574B2 (en) | 2018-10-09 |
CN105990267B (zh) | 2018-11-30 |
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