CN105321828B - 封装方法 - Google Patents
封装方法 Download PDFInfo
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- CN105321828B CN105321828B CN201410284034.8A CN201410284034A CN105321828B CN 105321828 B CN105321828 B CN 105321828B CN 201410284034 A CN201410284034 A CN 201410284034A CN 105321828 B CN105321828 B CN 105321828B
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- 238000000034 method Methods 0.000 title claims abstract description 76
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 59
- 229910052751 metal Inorganic materials 0.000 claims abstract description 59
- 239000003989 dielectric material Substances 0.000 claims abstract description 47
- 239000004020 conductor Substances 0.000 claims description 64
- 150000001875 compounds Chemical class 0.000 claims description 44
- 229920002120 photoresistant polymer Polymers 0.000 claims description 35
- 238000005266 casting Methods 0.000 claims description 29
- 239000000463 material Substances 0.000 claims description 25
- 239000007788 liquid Substances 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 9
- 229920005989 resin Polymers 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000002210 silicon-based material Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 148
- 238000005516 engineering process Methods 0.000 description 16
- 239000000758 substrate Substances 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000005538 encapsulation Methods 0.000 description 9
- 238000000465 moulding Methods 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000011109 contamination Methods 0.000 description 4
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- 238000003825 pressing Methods 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 238000001721 transfer moulding Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000007894 caplet Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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- 238000013467 fragmentation Methods 0.000 description 1
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- 238000001746 injection moulding Methods 0.000 description 1
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- 239000007937 lozenge Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明提供一种封装方法,其步骤包括:提供一金属承载板,其具有相对的一第一表面与一第二表面;形成一第一导线层于金属承载板的第二表面上;形成一第一导电柱层于第一导线层上;形成一介电材料层包覆第一导线层、第一导电柱层与金属承载板的第二表面;露出第一导电柱层的一端;形成一第二导线层于露出的第一导电柱层的一端上;形成一防焊层于介电材料层与第二导线层上;移除金属承载板。
Description
技术领域
本发明涉及一种封装方法,特别是有关于一种半导体封装方法。
背景技术
在新一代的电子产品中,不断追求更轻薄短小,更要求产品具有多功能与高性能,因此,集成电路(Integrated Circuit,IC)必须在有限的区域中容纳更多电子元件以达到高密度与微型化的要求,为此电子产业开发新型构装技术,将电子元件埋入基板中,大幅缩小构装体积,也缩短电子元件与基板的连接路径,另外还可利用增层技术(Build-Up)增加布线面积,以符合轻薄短小及多功能的潮流趋势。
集成电路的封装技术在高阶技术的需求下,绝大部分的高阶晶片都采用覆晶封装(Flip Chip,FC)形成,特别是在一种晶片尺寸封装(Chip Scale Package,CSP)为目前集成电路基板适用在封装方式的主流产品,其主要应用于智慧型手机、平板、网通、笔记型电脑等产品,需要在高频高速下运作及需要轻薄短小的集成电路封装。对于封装用的基板而言,则朝向细线路间距、高密度、薄型化、低成本化与高电气特性发展。
图1A至图1D为传统的铸模化合物基板结构的转注铸模流程图。传统的转注铸模(Transfer Molding)方法是凭借椭圆形药锭形式(caplet type)的模具,并且使用侧边闸口(side gate)或顶侧闸口(top gate)的灌注方式将铸模化合物(Molding Compound)转注铸模为金属承载板100上的铸模化合物基板结构110。其中单次的转注铸模只能在金属承载板100上形成六个互不接触的铸模化合物基板结构110,如图1A至图1D所示依序进行四次转注铸模才能在全板面金属承载板100上完成铸模化合物基板结构110的制程。
图2为图1A的铸模化合物基板结构A-A’截面图。铸模化合物基板结构110制作于金属承载板100上,其包括有第一导线层120、第一导电柱层130、铸模化合物层(MoldingCompound Layer)140、介电材料层(Dielectric material layer)150、第二导线层160及防焊层170。第一导线层120设置在金属承载板100上,第一导电柱层130设置在第一导线层120上。凭借转注铸模(Transfer Molding)方法将复数组铸模化合物层140设置在第一导线层120与第一导电柱层130的部份区域内,其中每一铸模化合物层140之间具有空隙142而互不接触。介电材料层150设置在铸模化合物层140上,第二导线层160设置在第一导电柱层130、铸模化合物层140与介电材料层150上,防焊层170设置在介电材料层150与第二导线层160上。
然而,上述传统的铸模化合物基板结构必须以铸模化合物层140与介电材料层150作为无核心基板(Coreless Substrate)的主体材料,并利用电镀导电柱层形成导通与铸模互连基板(Molded Interconnection Substrate,MIS)封装方式于基板制作中,除可改善单独使用铸模化合物层作为无核心基板所造成的刚性过强而易碎裂的缺点外,更可增加铸模化合物层的稳定度,故可适用于高密度、细线宽与细间距的多层叠层的封装制程。
但是,上述传统的转注铸模方法依旧具有以下的缺点:(1)其必须增加介电材料层150的制程以解决第二导线层160结合力不佳的问题,进而才能进行半加成制程(Semi-Additive Process,SAP)的细线路产品制作,但是增加介电材料层150的制程将造成流程长与成本高的问题。(2)依序进行四次转注铸模才能在全板面金属承载板100上完成铸模化合物基板结构110的制程,其所需制作时间长。(3)每一铸模化合物层140之间的空隙142将造成介电材料层150加工不易。(4)每一铸模化合物层140之间的空隙142将造成金属承载板100裸露面积较大,其于后续化学制程将造成溶解污染后续的制程药液。
发明内容
本发明提出一种封装方法,其可使用真空压合制程进行全板面金属承载板上压合介电材料层,再进行增层技术流程制作细线路产品,并使金属承载板裸露面积较小而降低后续化学制程的药液污染,适合进行大面积的封装制程以降低成本及生产时间。
为实现上述目的,本发明采用的技术方案是:
一种封装方法,其特征在于,其步骤包括:
提供一金属承载板,其具有相对的一第一表面与一第二表面;
在该金属承载板的该第二表面上形成一第一导线层;
在该第一导线层上形成一第一导电柱层;
形成一介电材料层,其包覆该第一导线层、该第一导电柱层与该金属承载板的该第二表面;
露出该第一导电柱层的一端;
在露出的该第一导电柱层的一端上形成一第二导线层;
在该介电材料层与该第二导线层上形成一防焊层;以及
移除该金属承载板。
所述的封装方法,其还包括:
提供一第一外接元件,其设置并电性连结于该第一导线层的一第一表面上;
形成一外部铸模化合物层,其包覆于该第一外接元件与该第一导线层的该第一表面上;
在该第二导线层上形成复数个导电元件;及
形成一第二外接元件,其设置并电性连结于复数个导电元件上。
所述的封装方法,其中:在该第一导线层上形成该第一导电柱层之前的步骤包括:
在该金属承载板的该第二表面上形成一第一光阻层,在该金属承载板的该第一表面上形成一第二光阻层;
在该金属承载板的该第二表面上形成该第一导线层;
在该第一光阻层与该第一导线层上形成一第三光阻层;
移除该第三光阻层的部分区域以露出该第一导线层;
在该第一导线层上形成该第一导电柱层;及
移除该第一光阻层、该第二光阻层与该第三光阻层。
所述的封装方法,其中:形成一介电材料层,其包覆该第一导线层、该第一导电柱层与该金属承载板的该第二表面的步骤是应用真空压合制程将该介电材料层压合于该金属承载板的该第二表面。
所述的封装方法,其中:该介电材料层是一树脂材质、一氮化硅材质或一氧化硅材质。
所述的封装方法,其中:该第一导线层与该第二导线层包括至少一走线或至少一晶片座。
所述的封装方法,其中:该第一外接元件是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板。
所述的封装方法,其中:该第二外接元件是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板。
所述的封装方法,其中:形成该外部铸模化合物层的步骤包括:
提供一铸模化合物,其中该铸模化合物具有树脂及粉状的二氧化硅;
加热该铸模化合物至液体状态;
在该金属承载板的该第二表面上注入呈液态的该铸模化合物,该铸模化合物在高温和高压下包覆该第一导线层与该被动元件;及
固化该铸模化合物,使该铸模化合物形成该外部铸模化合物层。
所述的封装方法,其中:该导电元件是一金属焊球。
本发明的封装方法使用真空压合制程进行全板面金属承载板上压合介电材料层来取代传统铸模化合物层与介电材料层作为无核心基板(Coreless Substrate)的主体材料的封装方法,其具有以下的优点:(1)可减少同时使用铸模化合物层与介电材料层的材料而降低成本,并且仅需真空压合单层的介电材料层以缩短制作时间。(2)对于进行增层技术流程制作细线路产品时,仅使用介电材料层的作法加工容易。(3)避免传统铸模化合物层之间的空隙,可使金属承载板裸露面积较小而降低后续化学制程的药液污染。(4)适合进行大面积的封装制程以降低成本及生产时间。
附图说明
图1A、图1B、图1C、图1D为传统的铸模化合物基板结构的转注铸模流程图;
图2为图1A的铸模化合物基板结构A-A’截面图;
图3为本发明实施例的封装方法流程图;
图4A、图4B、图4C、图4D、图4E、图4F、图4G、图4H、图4I-a、图4I-b、图4J、图4K、图4L、图4M、图4N、图4O、图4P为本发明实施例的封装示意图;
图5为本发明实施例介电材料层真空压合于金属承载板的上视图。
附图标记说明:100-金属承载板;110-铸模化合物基板结构;120-第一导电层;130-第二导电层;140-铸模化合物层;142-空隙;150-介电材料层;160-第三导电层;170-防焊层;20-封装方法;步骤S202-步骤S232;200-金属承载板;202-第一表面;204-第二表面;210-第一导线层;212-第一表面;220-第一导电柱层;222-第一导电柱层的一端;230-介电材料层;240-第二导线层;250-防焊层;260-第一外接元件;270-外部铸模化合物层;280-导电元件;290-第二外接元件;310-第一光阻层;320-第二光阻层;330-第三光阻层。
具体实施方式
图3为本发明实施例的封装方法流程图,图4A至图4P为本发明实施例的封装示意图。封装方法20的步骤包括:
步骤S202,如图4A所示,提供一金属承载板200,其具有相对的一第一表面202与一第二表面204。
步骤S204,如图4B所示,在金属承载板300的第二表面304上形成一第一光阻层310与在金属承载板300的第一表面302上形成一第二光阻层320。在本实施例中,第一光阻层310是应用压合干膜光阻或涂布液态光阻制程,再利用微影制程(Photolithography)技术所形成。在另一实施例中,也可增加一暂时性的金属层、有机保护层或直接沿用原来的金属承载板200来取代第一光阻层310,但不以此为限。
步骤S206,如图4C所示,在金属承载板200的第二表面204上形成一第一导线层210。在本实施例中,第一导线层210是应用电镀(Electrolytic Plating)技术所形成,但不以此为限。其中第一导线层210可以为图案化导线层,其包括至少一走线或至少一晶片座,第一导线层210的材质可以为金属,例如是铜。
步骤S208,如图4D所示,在第一光阻层310与第一导线层210上形成一第三光阻层330。在本实施例中,第三光阻层330是应用压合干膜光阻或涂布液态光阻制程所形成,但不以此为限。
步骤S210,如图4E所示,移除第三光阻层330的部分区域以露出第一导线层210。在本实施例中,移除第三光阻层330的部分区域是应用微影制程(Photolithography)技术所达成,但不以此为限。
步骤S212,如图4F所示,在第一导线层210上形成一第一导电柱层220。在本实施例中,第一导电柱层220是应用电镀(Electrolytic Plating)技术所形成,但不以此为限。其中,第一导电柱层220包括至少一导电柱,其形成对应于第一导线层210的走线与晶片座上,第一导电柱层220的材质可以为金属,例如是铜。
步骤S214,如图4G所示,移除第一光阻层310、第二光阻层320与第三光阻层330。
步骤S216,如图4H所示,形成一介电材料层230包覆第一导线层210、第一导电柱层220与金属承载板200的第二表面204。在本实施例中,请参考图5为本发明实施例介电材料层真空压合于金属承载板的上视图,其是应用真空压合制程将介电材料层230压合于全板面金属承载板200的上,介电材料层230的材质可以为一树脂材质、一氮化硅材质或一氧化硅材质,但不以此为限。
在此要特别说明,本发明使用真空压合制程进行全板面金属承载板上压合介电材料层来取代传统铸模化合物层与介电材料层作为无核心基板(Coreless Substrate)的主体材料的封装方法,其具有以下的优点:(1)可减少同时使用铸模化合物层与介电材料层的材料而降低成本,并且仅需真空压合单层的介电材料层以缩短制作时间。(2)对于进行增层技术流程制作细线路产品时,仅使用介电材料层的作法加工容易。(3)避免传统铸模化合物层之间的空隙,可使金属承载板裸露面积较小而降低后续化学制程的药液污染。(4)适合进行大面积的封装制程以降低成本及生产时间。
步骤S218,如图4I-a所示,露出第一导电柱层220的一端222。在本实施例中,露出第一导电柱层220是应用微影制程(Photolithography)或蚀刻制程(Etch Process)或研磨制程移除介电材料层230的一部分,以露出第一导电柱层220的一端222。
此外,如图4I-b所示,在另一实施例中,也可通过研磨制程移除介电材料层230的一部分,以使得第一导电柱层220的一端222与介电材料层230为同一平面。
步骤S220,如图4J所示,在露出的第一导电柱层220的一端222上形成一第二导线层240。在本实施例中,第二导线层240同时形成于介电材料层230与露出的第一导电柱层220的一端222上。在一实施例中,第二导线层240可应用电镀(Electrolytic Plating)技术或无电镀(Electroless Plating)技术、溅镀(Sputtering Coating)技术或蒸镀(ThermalCoating)技术所形成,但不以此为限。其中第二导线层240可以为图案化导线层,其包括至少一走线或至少一晶片座,并形成对应于露出的第一导电柱层220的一端222上,第二导线层240的材质可以为金属,例如是铜。
步骤S222,如图4K所示,在介电材料层230与第二导线层240上形成一防焊层250,并露出部份的第二导线层240。其中,防焊层250具有绝缘第二导线层240的各走线电性的功效。
步骤S224,如图4L所示,移除金属承载板200。在本实施例中,移除金属承载板200是应用蚀刻制程(Etch Process)或剥离制程(Debonding Process)所达成,然而,移除金属承载板200的方法也可使用物理制程,例如承载板研磨,但不以此为限。第一导线层210的走线与晶片座可直接露出。
步骤S226,如图4M所示,提供一第一外接元件260,其设置并电性连结于第一导线层210的一第一表面212上。在一实施例中,第一外接元件260是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板,但不以此为限。
步骤S228,如图4N所示,形成一外部铸模化合物层270包覆于第一外接元件260与第一导线层210的第一表面212上。在本实施例中,外部铸模化合物层270是应用转注铸模(Transfer Molding)以顶侧注入铸模(Top Molding)的铸模技术所形成,外部铸模化合物层270的材质可包括酚醛基树脂(Novolac-Based Resin)、环氧基树脂(Epoxy-BasedResin)、硅基树脂(Silicone-Based Resin)或其他适当的铸模化合物,在高温和高压下,以液体状态包覆第一外接元件260与第一导线层210的第一表面212上,其固化后形成外部铸模化合物层270。外部铸模化合物层270也可包括适当的填充剂,例如是粉状的二氧化硅。在另一实施例中,也可应用注射铸模(Injection Molding)或压缩铸模(CompressionMolding)或真空压合铸膜的铸模技术形成外部铸模化合物层270。
步骤S230,如图4O所示,在第二导线层240上形成复数个导电元件280。在本实施例中,导电元件280是一金属焊球。此外,每一导电元件280的材质可以为金属,例如是铜。
步骤S232,如图4P所示,形成一第二外接元件290,其设置并电性连结于复数个导电元件280上。在一实施例中,第二外接元件290是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板,但不以此为限。
综上所述,本发明的封装方法使用真空压合制程进行全板面金属承载板上压合介电材料层来取代传统铸模化合物层与介电材料层作为无核心基板(Coreless Substrate)的主体材料的封装方法,其具有以下的优点:(1)可减少同时使用铸模化合物层与介电材料层的材料而降低成本,并且仅需真空压合单层的介电材料层以缩短制作时间。(2)对于进行增层技术流程制作细线路产品时,仅使用介电材料层的作法加工容易。(3)避免传统铸模化合物层之间的空隙,可使金属承载板裸露面积较小而降低后续化学制程的药液污染。(4)适合进行大面积的封装制程以降低成本及生产时间。
以上说明对本发明而言只是说明性的,而非限制性的,本领域普通技术人员理解,在不脱离权利要求所限定的精神和范围的情况下,可作出许多修改、变化或等效,但都将落入本发明的保护范围之内。
Claims (9)
1.一种封装方法,其特征在于,其步骤包括:
提供一金属承载板,其具有相对的一第一表面与一第二表面;
在该金属承载板的该第二表面上形成一第一导线层;
在该第一导线层上形成一第一导电柱层;
应用真空压合制程将一介电材料层压合于该金属承载板的该第二表面,以使该介电材料层包覆该第一导线层、该第一导电柱层与该金属承载板的该第二表面的全部外露表面;
露出该第一导电柱层的一端;
在露出的该第一导电柱层的一端上形成一第二导线层;
在该介电材料层与该第二导线层上形成一防焊层;以及
移除该金属承载板。
2.根据权利要求1所述的封装方法,其特征在于,其还包括:
提供一第一外接元件,其设置并电性连结于该第一导线层的一第一表面上;
形成一外部铸模化合物层,其包覆于该第一外接元件与该第一导线层的该第一表面上;
在该第二导线层上形成复数个导电元件;及
形成一第二外接元件,其设置并电性连结于复数个导电元件上。
3.根据权利要求1所述的封装方法,其特征在于:在该第一导线层上形成该第一导电柱层之前的步骤包括:
在该金属承载板的该第二表面上形成一第一光阻层,在该金属承载板的该第一表面上形成一第二光阻层;
在该金属承载板的该第二表面上形成该第一导线层;
在该第一光阻层与该第一导线层上形成一第三光阻层;
移除该第三光阻层的部分区域以露出该第一导线层;
在该第一导线层上形成该第一导电柱层;及
移除该第一光阻层、该第二光阻层与该第三光阻层。
4.根据权利要求1所述的封装方法,其特征在于:该介电材料层是一树脂材质、一氮化硅材质或一氧化硅材质。
5.根据权利要求1所述的封装方法,其特征在于:该第一导线层与该第二导线层包括至少一走线或至少一晶片座。
6.根据权利要求2所述的封装方法,其特征在于:该第一外接元件是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板。
7.根据权利要求2所述的封装方法,其特征在于:该第二外接元件是一主动元件、一被动元件、一半导体晶片、一软性电路板或一印刷电路板。
8.根据权利要求2所述的封装方法,其特征在于:形成该外部铸模化合物层的步骤包括:
提供一铸模化合物,其中该铸模化合物具有树脂及粉状的二氧化硅;
加热该铸模化合物至液体状态;
在该金属承载板的该第二表面上注入呈液态的该铸模化合物,该铸模化合物在高温和高压下包覆该第一导线层与该第一外接元件;及
固化该铸模化合物,使该铸模化合物形成该外部铸模化合物层。
9.根据权利要求2所述的封装方法,其特征在于:该导电元件是一金属焊球。
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