CN104969168B - 具有用于分级写入的nvram的持久性存储装置 - Google Patents

具有用于分级写入的nvram的持久性存储装置 Download PDF

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CN104969168B
CN104969168B CN201380072287.2A CN201380072287A CN104969168B CN 104969168 B CN104969168 B CN 104969168B CN 201380072287 A CN201380072287 A CN 201380072287A CN 104969168 B CN104969168 B CN 104969168B
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persistent storage
data
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J.乔治
A.奥尔布里奇
B.奥克拉夫卡
D.丁克
P.奇尤
E.弗索夫
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
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    • G—PHYSICS
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    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
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Abstract

一种持久性存储装置包括持久性存储器和NVRAM、特别是一组NVRAM块，该持久性存储器包括一组持久性存储块。该持久性存储装置通常还包括存储控制器。该持久性存储装置除了响应于将数据直接写入持久性存储块以及直接从持久性存储块读取数据的命令以外，还配置为将数据写入指定的NVRAM块(例如，由主机NVRAM写入命令所指定的)并且配置为将数据从指定的NVRAM块转移至指定的持久性存储块。结果，向特定的持久性存储块的多次写入能够被向NVRAM块的多次写入以及向该特定的持久性存储块的随后的单次写入所替代。这减少了向持久性存储器的写入次数，还减少了相应的块擦除操作的次数。

Description

具有用于分级写入的NVRAM的持久性存储装置
技术领域
公开的实施例总体上涉及持久性存储装置。
背景技术
众所周知，闪存装置以及至少一些其它类型的基于半导体的持久性存储装置具有有限的耐久性。例如，闪存单元的各种实现方式对在那些闪存单元的可靠性低于可接受的水平(例如，相关联的比特错误率高于使用与数据一起存储的错误校正信息所能够校正的水平)之前可以进行的块擦除循环的数量具有实际限制。
本文所描述的实施例提供了用于减少向持久性存储器的写入并且由此提高这些装置的实际使用寿命的机制和方法。
发明内容
在本公开中，一种持久性存储装置包括持久性存储器(persistent storage)和NVRAM、特别是一组NVRAM块两者，该持久性存储器包括一组持久性存储块。该持久性存储装置通常还包括存储控制器。该持久性存储装置除了响应于将数据直接写入持久性存储块以及将数据直接从持久性存储块读取的命令以外，还配置为将数据写入指定的NVRAM块(例如，由主机NVRAM写入命令指定的)并且配置为将数据从指定的NVRAM块转移至指定的持久性存储块。因此，向特定的持久性存储块的多次写入能够被向NVRAM块的多次写入以及向该特定的持久性存储块的随后单次写入所替代。这减少了向持久性存储器的写入次数，还减少了相应的块擦除操作的次数。此外，改善了持久性存储装置的性能在于：与向闪存写入相同的数据量相比，向NVRAM的写入更快并且消耗更少的能量。
附图说明
图1是示出根据一些实施例的包括持久性存储装置和外部主机装置的系统的框图。
图2A是根据一些实施例的NVRAM和持久性存储器的示意图。
图2B是示出根据一些实施例的示例性NVRAM的框图。
图3A-图3D是示出根据一些实施例的由持久性存储装置对主机命令的处理的流程图。
图4A和图4B示出了根据一些实施例的用于管理具有持久性存储器和NVRAM两者的持久性存储装置的处理的流程图。
在所有附图中，相似的参考标记指代相应的部件。
具体实施方式
在一些实现方式中，主机装置使用写操作序列多次向持久性存储装置写入数据，在该写操作序列期间数据中的一些被重复地写入单个持久性存储块或少数的存储块。例如，应用可能将日志记录的序列写入持久性存储器。在该示例中，每个日志记录远远小于持久性存储装置(这里称作持久性存储块)中的可擦除数据存储的最小单元，并且日志记录被存储到与持久性存储装置相关联的顺序逻辑地址。结果，将该日志记录的序列直接写入持久性存储器导致对同一持久性存储块的多次写入。每次这样的写入实际上需要多个内部操作，包括将逻辑地址重新映射至可用的持久性存储块、将数据存储到新分配的持久性存储块、以及擦除先前使用的持久性存储块。反而，如果要被存储到任意一个持久性存储块的所有日志记录全部一次被写入该持久性存储块，则持久性存储装置上的“磨损”量将减少。
在本公开中，持久性存储装置包括持久性存储器和NVRAM，该持久性存储器包括一组持久性存储块，并且该NVRAM包括一组NVRAM块。持久性存储装置还包括存储控制器，该存储控制器配置为从外部主机装置接收命令并且进一步配置为：响应于主机NVRAM写入命令，将数据写入指定的NVRAM块；响应于转移命令，将指定的NVRAM块中的数据转移至相应的持久性存储块中；响应于主机持久性存储器写入命令，将数据写入指定的持久性存储块；以及响应于主机持久性存储器读取命令，从指定的持久性存储块取回数据。
在一些实施例中，持久性存储装置被实现为单个的单片集成电路。在一些实施例中，持久性存储器包括闪存，并且NVRAM包括从由EPROM、EEPROM、电池备援的(batterybacked)SRAM、电池备援的DRAM、超级电容器备援的DRAM、铁电RAM、磁阻RAM以及相变RAM组成的组中选择的非易失性存储器。在一些实施例中，持久性存储装置进一步包用于将持久性存储装置与外部主机装置的存储器控制器通过接口连接的主机接口。可选择地，存储控制器进一步被配置为通过从指定的NVRAM块取回数据来对主机NVRAM读取命令进行响应。在一些实施例中，逻辑块地址与指定的NVRAM块相关联，并且相应的持久性存储块与逻辑块地址相对应。
在一些实施例中，存储控制器进一步被配置为通过将由主机命令指定的逻辑块地址与指定的NVRAM块相关联地存储来对相应的主机命令进行响应。在一些实施例中，NVRAM的预定的一部分存储一个或多个逻辑块地址，每个逻辑块地址与各自的NVRAM块相关联。在一些实施例中，逻辑块地址与指定的NVRAM块相关联，并且相应的持久性存储块由存储控制器使用逻辑块地址至物理地址映射来识别。在一些实施例中，转移命令包括第一预定转移命令，并且存储控制器进一步被配置为通过将在由第二预定转移命令所指定的持久性存储块中的数据存储到由第二预定转移命令所指定的NVRAM块中来对该第二预定转移命令进行响应。
在本公开的另一方面，提供了用于管理持久性存储装置的方法。在一些实施例中，该方法在包括持久性存储器和NVRAM的持久性存储装置处进行。持久性存储器包括一组持久性存储块，并且NVRAM包括一组NVRAM块。该方法包括：从外部主机装置接收命令；响应于主机NVRAM写入命令，将数据存储到指定的NVRAM块；响应于转移命令，将在由转移命令所指定的NVRAM块中的数据存储到相应的持久性存储块；响应于主机持久性存储器写入命令，将数据存储到指定的持久性存储块；以及响应于主机持久性存储器读取命令，从指定的持久性存储块取回数据。
在一些实施例中，该方法进一步包括：在持久性存储装置处，在从由存储到指定的NVRAM块的数据量达到预定阈值以及数据被存储到指定的NVRAM块的预定部分所组成的集合中选择的预定触发条件出现时，自动将数据从NVRAM转移至持久性存储器。在一些实施例中，该方法进一步包括在外部主机装置的控制下：在掉电之后，从NVRAM读取一组逻辑块地址、包括与该组NVRAM块中的每个NVRAM块相关联的逻辑块地址(如果有的话)；以及将数据从具有相关联的逻辑块地址的每个NVRAM块复制到与该相关联的逻辑块地址相对应的持久性存储块。
在本公开的另一方面，在持久性存储装置外部的主机装置处进行用于将数据存储到持久性存储装置的方法。该方法包括发出多个NVRAM写入命令以将数据写入持久性存储装置中的NVRAM的指定块中。持久性存储装置包括持久性存储器和NVRAM，该持久性存储器包括一组持久性存储块，并且该NVRAM包括一组NVRAM块，该组NVRAM块包括NVRAM的指定块。该方法进一步包括发出预定转移命令，指示持久性存储装置将在指定的NVRAM块中的数据存储到相应的持久性存储块；以及发出读取命令，指示持久性存储装置从与指定的NVRAM块相对应的持久性存储块中取回数据，并将从与指定的NVRAM块相对应的持久性存储块所取回的数据传送至主机装置。
现在将详细参考各个实施例，在附图中示出了各个实施例的示例。在下文的详细描述中，对很多具体细节进行阐述，以便提供对所公开的实施例的透彻理解。然而，可选地，没有这些具体细节而实践所公开的实施例。在其它实例中，并未对公知的方法、过程、组件以及电路进行详细描述，以便不必要地模糊各实施例的方面。
图1是示出根据一些实施例的包括持久性存储装置106和外部主机装置102(本文有时称作主机102)的系统100的框图。为了方便，在本文中，主机102被描述为作为单个服务器或其它单个计算机而实现。主机102包括一个或多个处理单元(CPU)104、一个或多个存储器(memory)接口107、存储器108、以及一条或多条用于将这些组件相互连接的通信总线110。可选择地，通信总线110包括在系统组件之间相互连接并且控制系统组件之间的通信的电路(有时称为芯片组)。存储器108包括高速随机存取存储器，比如DRAM、SRAM、DDR RAM或者其它随机存取固态存储装置；并且，可选择地，包括非易失性存储器，比如一个或多个磁盘存储装置、光盘存储装置、闪存装置、或其它非易失性固态存储装置。此外，可选择地，存储器108包括一个或多个位于远离CPU 104处的存储装置。存储器108、或者替代地存储器108内的非易失性存储装置包括非易失性计算机可读存储介质。在一些实施例中，存储器108或存储器108的非易失性计算机可读存储介质存储以下程序、模块以及数据结构、或它们的子集：
·操作系统112，包括用于处理各种基本系统服务以及用于进行依赖于硬件的任务的程序；
·一个或多个应用114，被配置为(或者包括指令用来)使用存储器访问功能116和NVRAM访问功能118来向持久性存储装置106提交读取命令和写入命令；
·存储器访问功能116，用于对持久性存储装置106的持久性存储器102进行读取和写入；
·NVRAM访问功能118，用于对持久性存储装置106的NVRAM 122进行读取和写入，以及用于将数据从NVRAM 122转移至持久性存储器120；以及
·数据119，例如由应用114之一使用的或与应用114之一相关联的数据；可选择地，数据119包括要被写到持久性存储装置106中的NVRAM 122或持久性存储器120的写入数据和/或已经从持久性存储装置106的NVRAM122或持久性存储器120取回的读取数据。
诸如NVRAM访问功能118以及存储器访问功能116的前述主机功能中的每个功能被配置为由主机102的一个或多个处理器(CPU)104来执行，以便进行相关联的存储器存取任务或关于持久性存储装置106中的NVRAM122和/或持久性存储器120的功能。
在一些实施例中，主机102经由主机102的存储器接口107以及持久性存储装置的主机接口126与持久性存储装置106连接。主机102直接地或通过诸如因特网、其它广域网、局域网、城域网、无线网、或这些网络的任意组合的通信网络(未示出)与持久性存储装置106连接。可选择地，在一些实现方式中，主机102与多个持久性存储装置106连接，图1中仅示出了其中一个持久性存储装置106。
在一些实施例中，持久性存储装置106包括持久性存储器120、NVRAM122、一个或多个主机接口126、以及存储控制器124。存储控制器124包括一个或多个处理单元(CPU)128、存储器130、以及一条或多条用于将这些组件相互连接的通信总线132。在一些实施例中，通信总线132包括在系统组件之间相互连接并且控制系统组件之间的通信的电路(有时称作芯片组)。存储器130包括高速随机存取存储器，比如DRAM、SRAM、DDR RAM或其它随机存取固态存储器装置；以及可选择地，包括非易失性存储器，比如一个或多个磁盘存储装置、光盘存储装置、闪存装置、或其它非易失性固态存储装置。可选择地，存储器130包括一个或多个位于远离CPU 128处的存储装置。存储器130、或者替代地在存储器130内的非易失性存储器装置包括非易失性计算机可读存储介质。在一些实施例中，存储器130存储以下程序、模块以及数据结构、或它们的子集：
主机接口功能133，包括用于处理经由持久性存储装置106的主机接口126从主机102发送的且由持久性存储装置106接收的命令；
NVRAM功能134，用于处理由主机102发出的NVRAM存取功能调用；NVRAM功能134包括用以将数据写入一个或多个指定的NVRAM块的功能136、用以将数据从NVRAM块转移至持久性存储块的功能138、以及可选择地包括用以从NVRAM块读取数据的功能140和用以将数据从指定的持久性存储块转移至NVRAM块的功能142；
存储器(快闪)功能144，用于处理由主机102发出的持久性存储器存取功能调用；存储器功能144包括用以将数据写入一个或多个指定的持久性存储块的功能146以及用以从一个或多个指定的持久性存储块读取数据的功能148；
一个或多个地址翻译功能150，用以将逻辑块地址翻译成物理地址；以及
一个或多个地址翻译表152，用以存储逻辑至物理地址映射信息。
前述的存储控制器功能中的每个功能、比如NVRAM功能134以及存储器功能144被配置为由存储控制器124的一个或多个处理器(CPU)128来执行，以便进行相关联的任务或者关于NVRAM 122、持久性存储器120、或者这两者的功能。
地址翻译功能150与地址翻译表152一起实现逻辑块地址(LBA)至物理地址(PHY)映射，在图2中示出为LBA至PHY映射206。
如本文所使用的，术语“NVRAM”是指与包括被用于持久保存(persist)少量数据的持久性存储器120的这类存储器不同的任意类型的非易失性存储器。在一些实现方式中，NVRAM是从由EPROM、EEPROM、电池备援的SRAM、电池备援的DRAM、超级电容器备援的DRAM、铁电RAM、磁阻RAM以及相变RAM组成的组中选择的非易失性存储器。超级电容器有时也被称作电双层电容器(EDLS)、电化学双层电容器、或超级电容。
如本文所使用的，术语“持久性存储器”是指与包括用作大容量存储器或二级存储器的NVRAM的这类存储器不同的任意类型的持久性存储器。在一些实施例中，持久性存储器是闪存。
在一些实现方式中，持久性存储器120包括一组持久性存储块，并且NVRAM 122包括一组NVRAM块。在一些实现方式中，NVRAM块具有与持久性存储块相同的大小。此外，在一些实现方式中，NVRAM块的数量(例如64、1024等)远远小于持久性存储块的数量(例如，数百万至数十亿等)。在一些实现方式中，一个或多个NVRAM块被用于存储与其它NVRAM块相对应的元数据。在一个示例中，第一个或最后一个NVRAM块被用于存储对于已经由主机102将数据写到的每个NVRAM块的逻辑块地址。
在一些实施例中，由主机102使用上文所述的NVRAM存取功能118发出的功能调用被实现为功输入/输出控制(ioctl)功能调用，例如在Unix或Linux下那样，或者在其它操作系统中实现的类似的功能调用。
由主机102发出的将数据(例如，在主机102的存储器(memory)108中所存储的数据119)写入一个或多个NVRAM块的、用于启用(invoke)持久性存储装置106中的向NVRAM块写入功能136的功能调用的示例由以下给出：
sio_host_to_nvram(fd,buf,nvseek,size)，
其中fd是指特定的存储装置106，buf是指主机102上的存储器108中的、包含要被写入的数据的位置，nvseek是指NVRAM 122中的、该数据要被写到的起始位置，并且size是指要被写入的数据量。在一些实现方式中，起始位置nvseek是NVRAM 122中的任意字节边界位置，并且size是指要从主机102写入NVRAM 122的字节数。在一些实现方式中，nvseek和size中的一者或两者可能需要与一个字(word)或两个字或其它这种边界对齐。在一些实现方式中，由主机102发出多个连续的功能调用以将连续的数据组写入NVRAM 122中的同一NVRAM块。
由主机102发出的从一个或多个NVRAM块读取数据的、用于启用持久性存储装置106中的从NVRAM块的读取功能140的功能调用的示例由以下给出：
sio_nvram_to_host(fd,nvseek,buf,size)，
其中fd是指特定的存储装置106，nvseek是指NVRAM中的、要从其读取数据的起始位置，buf是指主机102上的存储器108中的、读取的数据要被存储到的位置，并且size是指要读取的数据量。与由主机102发出的将数据写入一个或多个NVRAM块的功能调用相似，在一些实现方式中，由主机102发出的从一个或多个NVRAM块读取数据的功能调用被用于读取小于一个NVRAM块的数据量。在一些实现方式中，起始位置nvseek是NVRAM 122中的任意字节边界位置，并且size是指要从NVRAM 122写到主机102的字节数。在一些实现方式中，nvseek和size中的一者或两者可能需要与一个字或两个字或其它这种边界对齐。
由主机102发出的将数据从一个或多个NVRAM块转移至一个或多个持久性存储块的、用以启用持久性存储装置106中的从NVRAM块向持久性存储块的转移功能138由以下给出：
sio_nvram_to_media(fd,nvseek,pmseek,size)，
其中fd是指特定的存储装置106，nvseek是指NVRAM中的、要从其转移数据的起始位置，pmseek是指持久性存储器中的、该数据要被转移至的起始位置，并且size是指要被转移的数据量。在一些实现方式中，起始位置pmseek是逻辑块地址，并且size是指要被转移的数据的NVRAM块的整数的数量。
在一些实施例中，在sio_nvram_to_media功能调用中，尺寸参数被限制为指定一些块，pmseek参数识别逻辑块地址(LBA)，并且nvseek参数识别NVRAM块(例如，识别NVRAM块的起点)。因此，在这些实施例中，由主机102使用sio_nvram_to_media功能调用来将在一个或多个NVRAM块中存储的数据转移至指定的持久性存储块。
在一些实施例中，从NVRAM块转移至持久性存储块的数据并不由存储控制器124从NVRAM块自动删除。而是，仅当从主机102接收到明确的命令(例如，擦除或覆写NVRAM块的命令)时，这种数据才被删除。替代地，在一些实现方式中，从NVRAM块转移至持久性存储块的数据由存储控制器124从NVRAM块中自动删除。
以上所识别的模块、应用或程序中的每个与可由主机102或持久性存储装置106的一个或多个处理器执行的、用于进行上文所述的功能的指令集相对应。上文所识别的模块、应用或程序(即，指令集)不需要被实现为单独的软件程序、进程或模块，因此，在不同的实施例中可以将这些模块的不同子集组合或另外重新排列。在一些实施例中，可选择地，存储器108或存储器130存储上文所识别的模块和数据结构的子集。此外，在一些实现方式中，可选择地，存储器108或存储器130存储上文没有描述的另外的模块和数据结构。
尽管图1示出了包括主机102和持久性存储装置106的系统100，然而与本文所描述的实施例的结构示意图相比，图1更意在作为可以存在于一组服务器中的各种特征的功能性描述。在实践中，并且如由本领域普通技术人员所知晓的，单独示出的项可以被合并且一些项可以被分离。
图2A是根据一些实施例的NVRAM 122和持久性存储器120的示意图。如图2A中所示，NVRAM 122包含已经被存储在NVRAM块202中的数据。在一些实施例中，NVRAM 122还包含用于存储一个或多个逻辑块地址的预定部分204，部分204中的每个逻辑块地址与各自的NVRAM块202相对应并且还与持久性存储器120中的各自的持久性存储块208相对应。在持久性存储装置106接收到转移命令之后，为了将在指定的NVRAM块中的数据转移至相应的持久性存储块(例如，启用从NVRAM块向PS块的转移功能138的命令)，存储控制器124从由该转移命令指定的NVRAM块202取回数据，并且将该数据存储到与由该转移命令所指定的逻辑块地址相对应的持久性存储块208。使用地址翻译功能150以及地址翻译表152通过LBA至PHY映射206，逻辑块地址被映射至物理地址。
在一些实施例中，从主机102接收到的转移命令是上文所述的sio_nvram_to_media命令的实例。
在一些实施例中，一旦数据从NVRAM块转移至持久性存储块(例如，响应于来自外部主机装置102的将数据从NVRAM块转移至指定的持久性存储块的命令)，数据的复制本(copy)保持在NVRAM块中，直到响应于来自主机102的明确命令，该备份被新数据覆写或者被删除为止。在其它实施例中，一旦数据从NVRAM块转移至持久性存储块，不用从主机102接收任何额外的命令，NVRAM块中的数据由持久性存储装置106自动擦除。
类似地，在一些实现方式中，一旦数据从持久性存储块转移至NVRAM块(例如，响应于来自外部主机装置102的将数据从指定的持久性存储块转移至NVRAM块的命令)，数据的复制本保持在持久性存储块中，直到响应于来自主机102的明确命令，该备份被新数据覆写或者持久性存储块中的数据被删除为止。在其它实现方式中，一旦数据从持久性存储块转移至NVRAM块，不用从主机102接收任何额外的命令，持久性存储块中的数据由持久性存储装置106擦除。
图2B是示出根据一些实施例的示例性NVRAM 122的框图。NVRAM 122由电压源210供电。如上所述，NVRAM 122的一些实施方式包括电池或电容器212，用于如果电压源210变得不可用时为NVRAM 122提供替代电源或备用电源的，从而保护NVRAM块202中的数据。在其中使用在断电时保留数据的非易失性存储器来实现NVRAM 122的一些其它实现方式中，不需要电池/电容器212，因此电池/电容器212不包括在NVRAM 122中。
图3A至图3D是示出根据一些实施例的由持久性存储装置106对从主机102接收的主机命令的处理的流程图。参照图1，在一些实现方式中，由持久性存储装置106经由主机接口126从主机102接收主机命令。在一些实现方式中，主机命令是当应用114启用存储器存取功能116和/或NVRAM存取功能118时由主机102发出的功能调用，以便从持久性存储装置106读取数据或向持久性存储装置106写入数据。
图3A示出了NVRAM写入命令的处理。首先，主机102发出(302)将数据写入一个或多个NVRAM块的NVRAM写入命令。在一些实施例中，当应用114执行NVRAM存取功能118中的相应一个功能时，由主机102发出NVRAM写入命令，例如sio_host_to_nvram(fd,buf,nvseek,size)。然后，持久性存储装置106接收NVRAM写入命令(304)。然后，持久性存储装置106的存储控制器124将写入的数据存储到由NVRAM写入命令所指定的NVRAM块(306)。在一些实施例中，存储控制器124通过执行功能136来存储写入的数据，以便将数据写到一个或多个指定的NVRAM块。
图3B示出了转移命令的处理。首先，主机102发出(308)将数据从一个或多个NVRAM块转移至一个或多个持久性存储块的转移命令。在一些实施例中，当应用114执行NVRAM存取功能118中的相应一个功能时，由主机102发出转移命令，例如sio_nvram_to_media(fd,nvseek,pmseek,size)。持久性存储装置106从主机102接收(310)该转移命令。该转移命令指定数据要被写到的持久性存储块。具体地，在一些实现方式中，转移命令指定逻辑地址，通常该逻辑地址称为逻辑块地址，如上所述，存储控制器124使用逻辑块地址至物理地址映射206来将该逻辑地址映射至持久性存储块，从而识别(312)数据要被写到的持久性存储块。响应于所接收的命令，持久性存储装置106将来自指定的NVRAM块的数据存储(314)至由转移命令所指定的持久性存储块。
在一些实施例中，持久性存储装置106被配置为处理指定从一个或多个持久性存储块向一个或多个NVRAM块的数据转移的转移命令。例如，主机102可以发出sio_media_to_nvram(fd,pmseek,nvseek,size)ioctl调用，以便发出这种命令。响应于接收这种转移命令，存储控制器124启用转移功能142的执行，以便将数据从指定的持久性存储块转移至NVRAM块。在一些实现方式中，转移功能142的执行包括：使用逻辑地址至物理地址映射206来识别从其转移数据的持久性存储块、从所识别的持久性存储块读取数据、以及将该数据存储到指定的NVRAM块。
在一些其它实施例中，通过首先如下文参照图3D所述的发出持久性存储器读取命令，然后如上文参照图3A所述的发出随后的NVRAM写入命令来完成从持久性存储器向NVRAM的数据转移。
图3C示出了持久性存储器写入命令的处理。主机102发出(308)将数据写入一个或多个持久性存储块的持久性存储器写入命令。在一些实施例中，当应用144执行存储器存取功能116中的相应一个功能时，由主机102发出持久性存储器写入命令。持久性存储装置106接收(318)该持久性存储器写入命令。响应于该持久性存储器写入命令，持久性存储装置106使用逻辑块地址至物理地址映射(例如，映射206)将接收的命令中的逻辑地址映射至物理地址来识别(320)该数据要被写到的持久性存储块。接下来，持久性存储装置106将写入的数据存储(322)到所识别的持久性存储块。
图3D示出了持久性存储器读取命令的处理。主机102发出(324)从一个或多个持久性存储块读取数据的持久性存储器读取命令。在一些实施例中，当应用114执行存储器存取功能116的相应一个功能时，由主机102发出持久性存储器读取命令。持久性存储装置106接收(326)持久性存储器读取命令。响应于持久性存储器读取命令，持久性存储装置106使用逻辑块地址至物理地址映射(例如，映射206)将接收的命令中的逻辑地址映射至物理地址来识别(328)要从其读取数据的持久性存储块。接下来，存储装置106从所识别的持久性存储块取回(330)数据。在一些实施例中，存储控制器124从所识别的持久性存储块取回读取的数据并且经由主机接口126将该数据返回至主机102。更具体地，在一些实施例中，持久性存储装置106的存储控制器124从一个或多个指定的持久性存储块读取数据并将所读取的数据返回至主机102，在主机102中，所读取的数据被存储于存储器108中(例如，图1中的数据119)。
图4A和图4B示出了表示用于管理根据一些实施例的诸如图1中所示的持久性存储装置106的持久性存储装置的方法400的流程图。在一些实施例中，方法400由被存储在计算机可读存储介质中的并且由装置的一个或多个处理器、比图1中所示的持久性存储装置106的存储控制器124的一个或多个处理器128来执行的指令来管理。
在方法400中，持久性存储装置106从外部主机装置102接收(402)命令。这些命令的示例是如上文所述的sio_host_to_nvram(fd,buf,nvseek,size)、sio_nvram_to_host(fd,nvseek,buf,size)、sio_media_to_nvram(fd,pmseek,nvseek,size)以及sio_nvram_to_media(fd,nvseek,pmseek,size)。
如果主机102发出NVRAM写入命令，例如sio_host_to_nvram(fd,buf,nvseek,size)，则响应于主机NVRAM写入命令，持久性存储装置106将数据存储(404)到指定的NVRAM块。在一些实施例中，操作404与如上文所述的图3A中的操作306相对应。在上文的NVRAM写入命令的示例中，存储控制器124将位于主机102的存储器108中的位置buf处的数据存储到NVRAM 122中的位置nvseek，其中所存储的数据的量由命令的size参数来指定。
如果主机发出转移命令，例如sio_nvram_to_media(fd,nvseek,pmseek,size)，则响应于该转移命令，持久性存储装置106将位于由该转移命令所指定的NVRAM块中的数据存储(406)到持久性存储装置106中的相应的持久性存储块。在上文的转移命令的示例中，存储控制器124将位于NVRAM122中的位置nvseek的数据存储到持久性存储器120的位置pmseek，其中所存储的数据的量由该命令的size参数指定。在一些实现方式中，存储控制器124使用上文所述的逻辑块地址至物理地址映射206来识别(408)相应的持久性存储块。
在一些实施例中，转移命令包括(410)第一预定转移命令。在这些实施例中，如上文参照操作406所描述的，第一预定转移命令指定将数据从NVRAM转移至持久性存储器。在一些实施例中，主机102还发出第二预定转移命令，例如sio_media_to_nvram(fd,pmseek,nvseek,size)，该第二预定转移命令指定将数据从持久性存储器转移至NVRAM。在这些实施例中，响应于第二预定转移命令，持久性存储装置106将在由该第二预定转移命令所指定的持久性存储块中的数据存储(412)到由该第二预定转移命令所指定的NVRAM块。如上文参照图3B所述的，在一些实施例中，可以例如通过首先发出持久性存储器读取命令(如下文关于操作416所描述的)，然后发出随后的NVRAM写入命令(如上文关于操作404所描述的)而在两个步骤中完成同一数据转移。
如上所述，在一些实施例中，以上参照操作406所讨论的转移命令通过指定相关联的逻辑块地址来指定该数据要被写到的持久性存储块。在这些实施例中，使用逻辑块地址至物理块地址映射来识别(430)相应的持久性存储块。
如果主机102发出主机持久性存储器写入命令，则响应于该主机持久性存储器写入命令，持久性存储装置106将数据存储(414)到指定的持久性存储块。如果主机102发出主机持久性存储器读取命令，则响应于该主机持久性存储器读取命令，持久性存储装置106从指定的持久性存储块取回(416)数据。
如果主机102发出主机NVRAM读取命令，则响应于该主机NVRAM读取命令，持久性存储装置106从指定的NVRAM块取回(418)数据。操作418与操作416相似，除了代替从一个或多个持久性存储块读取数据，而是存储控制器124从由NVRAM读取命令所指定的一个或多个NVRAM块来读取数据。在一些实施例中，当主机102中的应用请求最近被写入到NVRAM122但是还未被转移至持久性存储器120的数据或信息时，执行操作418。在一些实施例中，这发生在主机掉电之后。例如，在一些实施例中，在掉电之后，存储控制器124从NVRAM 122读取一组逻辑块地址204、包括与该组NVRAM块中的每个NVRAM块相关联的逻辑块地址(如果有的话)。在这些实施例中，存储控制器124将数据从具有相关联的逻辑块地址的每个NVRAM块复制(424)到与该相关联的逻辑块地址相对应的持久性存储块。例如，如上文关于图2A所描述的，在一些实施例中，NVRAM 122具有用于存储一个或多个逻辑块地址的预定部分204，部分204中的每个逻辑块地址与各自的NVRAM块202相对应并且还与持久性存储器120中的各自的持久性存储块208相对应。在这些实现方式中，在NVRAM 122的部分204中所存储的逻辑块地址被用在操作424中，以识别存储控制器124将数据从具有相关联的逻辑块地址的NVRAM块复制到的持久性存储块。
在一些实施例中，在出现预定触发条件时，存储控制器124自动将数据从NVRAM122转移(420)至持久性存储器120。在一些实施例中，预定触发条件是以下的任意一个：存储到指定的NVRAM块的数据量达到预定阈值，或者数据正被存储到指定的NVRAM块的预定部分(例如，NVRAM块的最终部分或者最后的字)。
在一些实施例中，存储控制器124响应于相应的主机命令将由该主机命令所指定逻辑块地址与指定的NVRAM块相关联地存储(426)。关于操作426或428，在一些实施例中，存储控制器124将一个或多个逻辑块地址存储(428)于NVRAM 122中，每个逻辑块地址与各自的NVRAM块相关联。例如，如上文关于图2A所描述的，在一些实施例中，NVRAM 122具有用于存储一个或多个逻辑块地址的预定部分204，部分204中的每个逻辑块地址与各自的NVRAM块202相对应并且还与持久性存储器120中的各自的持久性存储块208相对应。
使用上文所描述的实施例，向特定的持久性存储块的多次写入被向NVRAM块的多次写入以及向该特定的持久性存储块的随后单次写入所替代。这减少了向持久性存储器的写入次数，还减少了相应的块擦除操作的次数。此外，改善了持久性存储装置的性能在于：与向闪存写入相同的数据量相比，向NVRAM的写入更快并且消耗更少的能量。
可选择地，图4A和图4B中所示的每个操作与在计算机存储器或计算机可读存储介质中存储的指令相对应。可选择地，计算机可读存储介质包括磁盘存储装置或光盘存储装置、诸如闪存的固态存储装置、或者其它非易失性存储装置或多个非易失性存储装置。在计算机可读存储介质上存储的计算机可读指令是以由一个或多个处理器来解译的源代码格式、汇编语言代码格式、结果代码(object code)格式、或者其它指令格式。
尽管在本文中使用措辞“第一”、“第二”等来描述各个元素，然而这些元素不应受到这些措辞的限制。这些措辞仅用于将一个元素与另一个元素进行区分。例如，在不改变所述描述的意思的情况下，第一接触者(contact)可被称为第二接触者，并且相似地，第二接触者可被称为第一接触者，只要所有出现的“第一接触者”均被一致地重命名并且所有出现的第二接触者均被一致地重命名即可。第一接触者和第二接触者均是接触者，但是它们不是相同的接触者。
本文所使用的术语仅是出于描述特定实施例的目的，并不意在对权利要求进行限制。如在实施例的描述及所附权利要求中所使用的，单数形式的“一”、“一个”和“该”也意在包括复数形式，除非上下文明确指出不是如此。还将理解的是，本文所使用的措辞“和/或”是指并且包含相关所列项目的一个或多个的任意可能组合以及所有可能组合。进一步将理解的是，当在本说明书中使用措辞“包括”和/或“包含”时，其指定所陈述的特征、整体、步骤、操作、元素、和/或组件的存在，但是不排除一个或多个其它特征、整体、步骤、操作、元素、组件、和/或它们的组的存在或添加。
如本文所使用的，根据上下文，措辞“如果”可被解释为表示“当所陈述的先决条件为真时”或“在所陈述的先决条件为真时”或“响应于确定出所陈述的先决条件为真”或“根据所陈述的先决条件为真的确定”或“响应于检测到所陈述的先决条件为真”。类似地，根据上下文，短语“如果确定[所陈述的先决条件为真]”或“如果[所陈述的先决条件为真]”或“当[所陈述的先决条件为真]时”可被解释为表示“在确定所陈述的先决条件为真时”或“响应于确定所陈述的先决条件为真”或“根据所陈述的先决条件为真的确定”或“当检测到所陈述的先决条件为真”或“响应于检测到所陈述的先决条件为真”。
出于说明的目的，已经参照具体实施例对前述说明书进行了描述。然而，上文的示例性讨论并不意在将所公开的实施例穷尽或限制在所公开的确切形式。考虑到上述教导，很多修改和变形是可能的。选择并描述这些实施例以便最佳地说明本公开的原理及其实际应用，因此使本领域的其他技术人员能够以适于所构想的特定应用的各种修改最佳地利用所公开的实施例以及各种其它实施例。

Claims (23)

1.一种持久性存储装置，包括：
持久性存储器，包括一组持久性存储块；
NVRAM，包括与所述持久性存储器不同类型的非易失性存储器并且包括一组NVRAM块；
存储控制器，配置为从外部主机装置接收命令并且还配置为：
响应于从所述外部主机装置接收的主机NVRAM写入命令，将数据存储到在所述主机NVRAM写入命令中所包括的物理位置处的NVRAM块；
响应于从所述外部主机装置接收的主机NVRAM读取命令，从由所述主机NVRAM读取命令指定的NVRAM块取回数据；以及
响应于从所述外部主机装置接收的转移命令，将由所述转移命令指定的NVRAM块中的数据转移至与所述转移命令中包含的逻辑地址相关联的相应的持久性存储块，其中所述数据先前被写到所述指定的NVRAM块。
2.根据权利要求1所述的持久性存储装置，其中所述存储控制器还配置为：
响应于主机持久性存储器写入命令，将数据存储到指定的持久性存储块；以及
响应于主机持久性存储器读取命令，从所述指定的持久性存储块取回数据。
3.根据权利要求1所述的持久性存储装置，其中所述持久性存储装置被实现为单个单片集成电路。
4.根据权利要求1所述的持久性存储装置，其中所述持久性存储器包括闪存，并且所述NVRAM包括从由EPROM、EEPROM、电池备援的SRAM、电池备援的DRAM、超级电容器备援的DRAM、铁电RAM、磁阻RAM以及相变RAM组成的组中选择的非易失性存储器。
5.根据权利要求1所述的持久性存储装置，还包括主机接口，用于将所述持久性存储装置与所述外部主机装置的存储器控制器通过接口连接。
6.根据权利要求1所述的持久性存储装置，其中逻辑块地址与所述指定的NVRAM块相关联，并且所述相应的持久性存储块与所述逻辑块地址相对应。
7.根据权利要求1-6中任一项所述的持久性存储装置，其中所述存储控制器还配置为通过将由所述主机命令所指定的逻辑块地址与所述指定的NVRAM块相关联地存储来对相应的主机命令进行响应。
8.根据权利要求1-6中任一项所述的持久性存储装置，其中所述NVRAM的预定部分存储一个或多个逻辑块地址，所述一个或多个逻辑块地址中的每个与各自的NVRAM块相关联。
9.根据权利要求1-6中任一项所述的持久性存储装置，其中逻辑块地址与所述指定的NVRAM块相关联，并且所述相应的持久性存储块由所述存储控制器使用逻辑块地址至物理地址映射来识别。
10.根据权利要求1-6中任一项所述的持久性存储装置，其中
所述转移命令包括第一预定转移命令，并且
所述存储控制器还配置为通过将由第二预定转移命令所指定的持久性存储块中的数据存储到由所述第二预定转移命令所指定的NVRAM块来对所述第二预定转移命令进行响应。
11.一种用于管理持久性存储装置的方法，包括：
在包括持久性存储器和NVRAM的持久性存储装置处，所述持久性存储器包括一组持久性存储块，并且所述NVRAM包括与所述持久性存储器不同类型的非易失性存储器并且包括一组NVRAM块：
从外部主机装置接收命令；
响应于从所述外部主机装置接收的主机NVRAM写入命令，将数据存储到在所述主机NVRAM写入命令中所包括的物理位置处的NVRAM块；
响应于从所述外部主机装置接收的主机NVRAM读取命令，从由所述主机NVRAM读取命令指定的NVRAM块取回数据；以及
响应于从所述外部主机装置接收的转移命令，将由所述转移命令所指定的NVRAM块中的数据存储到与所述转移命令中包含的逻辑地址相关联的相应的持久性存储块。
12.根据权利要求11所述的方法，
响应于主机持久性存储器写入命令，将数据存储到指定的持久性存储块；以及
响应于主机持久性存储器读取命令，从所述指定的持久性存储块取回数据。
13.根据权利要求11所述的方法，其中所述持久性存储装置被实现为单个单片集成电路。
14.根据权利要求11所述的方法，其中所述持久性存储器包括闪存，并且所述NVRAM包括从由EPROM、EEPROM、电池备援的SRAM、电池备援的DRAM、超级电容器备援的DRAM、铁电RAM、磁阻RAM以及相变RAM组成的组中选择的非易失性存储器。
15.根据权利要求11所述的方法，其中，所述持久性存储装置还包括主机接口，用于将所述持久性存储装置与所述外部主机装置的存储器控制器通过接口连接。
16.根据权利要求11所述的方法，其中逻辑块地址与指定的NVRAM块相关联，并且所述相应的持久性存储块与所述逻辑块地址相对应。
17.根据权利要求11-16中任一项所述的方法，还包括在所述持久性存储装置处，通过将由所述主机命令所指定的逻辑块地址与所述指定的NVRAM块相关联地存储来对相应的主机命令进行响应。
18.根据权利要求11-16中任一项所述的方法，还包括在所述持久性存储装置处，将一个或多个逻辑块地址存储在所述NVRAM中，所述一个或多个逻辑块地址中的每个与各自的NVRAM块相关联。
19.根据权利要求11-16中任一项所述的方法，还包括在所述持久性存储装置处，对于所述转移命令，使用逻辑块地址至物理地址映射来识别相应的持久性存储块。
20.根据权利要求11-16中任一项所述的方法，其中所述转移命令包括第一预定转移命令，并且所述方法还包括在所述持久性存储装置处，响应于第二预定转移命令，将由所述第二预定转移命令所指定的持久性存储块中的数据存储到由所述第二预定转移命令所指定的NVRAM块。
21.根据权利要求11-16中任一项所述的方法，还包括在所述持久性存储装置处，在出现预定触发条件时自动将数据从NVRAM转移至持久性存储器，所述预定触发条件从由以下组成的组中选择：存储到所述指定的NVRAM块的数据量达到预定阈值、以及数据正被存储到所述指定的NVRAM块的预定部分。
22.根据权利要求11-16中任一项所述的方法，还包括在所述外部主机装置的控制下：
在断电之后，从NVRAM读取一组逻辑块地址、包括与所述一组NVRAM块中的每个NVRAM块相关联的逻辑块地址，如果有这样的逻辑块地址；以及
将数据从具有相关联的逻辑块地址的每个NVRAM块复制到与所述相关联的逻辑块地址对应的持久性存储块。
23.一种用于将数据存储到持久性存储装置的方法，包括：
在所述持久性存储装置外部的主机装置处：
发出用于将数据存储在所述持久性存储装置中的指定的NVRAM块中的多个NVRAM写入命令，其中所述指定的NVRAM块的物理位置被包括在所述NVRAM写入命令中，所述持久性存储装置包括持久性存储器和NVRAM，所述持久性存储器包括一组持久性存储块并且所述NVRAM包括一组NVRAM块，所述一组NVRAM块包括所述指定的NVRAM块，其中所述NVRAM包括与所述持久性存储器不同类型的非易失性存储器；
发出NVRAM读取命令，指示所述持久性存储装置从所述持久性存储装置中的由所述NVRAM读取命令指定的NVRAM块取回数据；
发出预定转移命令，指示所述持久性存储装置将所述转移命令指定的NVRAM块中的数据存储到相应的持久性存储块，其中所述数据先前被写入到由发出的NVRAM写入命令之一指定的NVRAM块；以及
发出读取命令，指示所述持久性存储装置从根据所述主机装置发出的预定转移命令而将数据存储到的所述持久性存储块取回数据，并且将从根据所述主机装置发出的预定转移命令而将数据存储到的所述持久性存储块取回的数据传送至所述主机装置。
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