CN104520976A - 安装方法 - Google Patents
安装方法 Download PDFInfo
- Publication number
- CN104520976A CN104520976A CN201380041827.0A CN201380041827A CN104520976A CN 104520976 A CN104520976 A CN 104520976A CN 201380041827 A CN201380041827 A CN 201380041827A CN 104520976 A CN104520976 A CN 104520976A
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- chip
- substrate
- installation method
- metal layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
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Abstract
一种在基板上安装多个芯片的安装方法,包括在基板上临时地接合所述多个芯片中每个的临时接合过程,以及在基板上牢固地接合临时接合在基板上的所述多个芯片中每个的主要接合过程。在临时接合过程中,包括第一步骤和第二步骤的第一基本过程按照要安装于基板的芯片被重复多次。在第一步骤中,基板(1)中的第一金属层和芯片中的第二金属层被定位。在第二步骤中,第二金属层和第一金属层通过固相扩散接合而临时地接合。在主要接合过程中,包括第三步骤和第四步骤的第二基本过程按照要安装于基板的芯片被重复多次。在第三步骤中,识别临时接合于基板的芯片的位置。在第四步骤中,通过液相扩散接合使第二金属层和第一金属层经受主要接合。
Description
技术领域
本发明涉及一种将芯片安装在基板上的安装方法。
背景技术
传统地,已知一种将芯片安装在基板上的安装方法(例如,JP2009-130293 A)。此文档中的安装方法包括置基板于一个裸片接合设备的台的表面上的基板放置过程,以及在芯片的接合表面与基板的接合表面相接触的同时通过从芯片侧施加热量以便加热芯片的接合表面和置于台的该表面上的基板的接合表面而将芯片接合在基板上的接合过程。
在基板放置过程中,基板以一种状态放置在台的表面上,即隔热层在台和基板的预定区域之间,芯片接合在所述预定区域上。作为芯片的一个例子,示出了一个LED芯片,其中电极(未示出)分别设在LED芯片厚度方向的两表面上。LED芯片包括由AuSn形成的芯片侧接合电极,作为其反面(靠近基板一侧)上的电极。此外,作为一个例子,示出了由硅晶圆形成的基板。在基板的其上接合各个芯片的预定区域内(在放置位置处),基板设有裸片焊盘作为基板侧接合电极。每个裸片焊盘具有堆叠结构,该堆叠结构由Ti膜和形成在Ti膜上的Au膜构成,并且每个裸片焊盘的在表面侧的部分由Au制成。
在接合过程中,根据要安装在晶圆上的LED芯片数目,反复地执行一个规定步骤。在规定步骤中,LED芯片由设在裸片接合设备的头部上的吸夹头通过抽吸保持住,并利用所述头部的加热器通过吸夹头加热到限定的接合温度。在这种状态下,芯片侧接合电极的接合表面与相应的基板侧接合电极的接合表面相接触,而后在限定时间段内,适当的压力从头部侧持续施加至LED芯片,借此芯片侧接合电极和基板侧接合电极受到共晶接合。所述限定的接合温度设得比,例如,AuSn(其为芯片侧接合电极的材料)的熔化温度要高。适当的压力设在,例如,2kg/cm2至50kg/cm2的范围内。所述限定时间段设为,例如,大约10秒。
这里,期望以上文档中的安装方法被要求在芯片由吸夹头的抽吸保持住之前,通过裸片接合设备的识别装置高精度地识别芯片。此外,期望,在芯片侧接合电极的接合表面与相应基板侧接合电极的接合表面相接触之前,为将芯片对齐在基板上,以上文档中的安装方法被要求通过识别装置以高精度识别在台的表面上的基板的相应预定区域。因此,对上文的安装方法来说,缩短在生产线中安装过程所要求的流片间隔时间及在安装过程中提高生产量是困难的。注意,识别装置通常由相机、图像处理单元及监视器构成。
发明内容
本发明的目的是提供一种可缩短流片间隔时间的安装方法。
本发明的将芯片安装在基板上的安装方法包括临时接合过程和主要接合过程。临时接合过程是将芯片临时地、单独地接合在基板上。主要接合过程是将临时接合在基板上的芯片牢固地、单独地接合在基板上。临时接合过程是根据要安装在基板上的芯片的数目反复地执行第一基本过程。第一基本过程包括第一步骤和第二步骤。第一步骤是将每个芯片的第二金属层对准在基板的第一金属层上。第二步骤是在第一步骤之后,从每个芯片侧施加压力以使第一和第二金属层固相扩散接合而将每个芯片临时接合在基板上。主要接合过程是根据基板上的芯片的数目反复地执行第二基本过程。第二基本过程包括第三步骤和第四步骤。第三步骤是识别每个临时安装在基板上的芯片的位置。第四步骤是在第三步骤之后,从每个芯片侧施加压力以使第一和第二金属层液相扩散接合而将每个芯片牢固地接合在基板上。
在所述安装方法中,优选地,固相扩散接合以第一限定温度进行,而液相扩散接合通过从每个芯片侧和基板侧中的至少一侧施加热量而以比第一限定温度高的第二限定温度进行。
在所述安装方法中,优选地,第一限定温度低于第一和第二金属层的熔化温度中较低的一个,而第二限定温度等于或高于第一和第二金属层的熔化温度中较高的一个。
在所述安装方法中,优选地,固相扩散接合为超声接合或表面活化接合。
根据本发明的安装方法,可缩短流片间隔时间。
附图说明
现将以进一步细节描述本发明的优选实施例。本发明的其他特征和优点就下列详细描述及附图将得到更好的理解,附图中:
图1A是用于解释根据一个实施例的安装方法的示意性透视图;
图1B是用于解释根据该实施例的安装方法的示意性截面图;
图1C是用于解释根据该实施例的安装方法的示意性透视图;
图1D是用于解释根据该实施例的安装方法的示意性截面图;
图1E是用于解释根据该实施例的安装方法的示意性透视图;
图1F是用于解释根据该实施例的安装方法的示意性截面图;
图2A是根据该实施例的安装方法中的第一步骤的说明图;
图2B是根据该实施例的安装方法中主要接合过程的说明图;
图3A是根据该实施例的安装方法中的在基板上安装芯片的一个方面的说明图;
图3B是根据该实施例的安装方法中的在基板上安装芯片的一个方面的说明图;
图4是根据该实施例的安装方法中的另一个第一基本过程的说明图;
图5是根据该实施例的安装方法中的又一个第一基本过程的说明图;
图6A是根据实施例的安装方法中的再一个第一基本过程的说明图;以及
图6B是根据该实施例的安装方法中的还一个第一基本过程的说明图。
具体实施方式
根据本实施例的安装方法将参考图1A至图6B描述于下。
如图1E和1F所示,根据本实施例的安装方法是将芯片2安装在基板1上。安装方法包括将芯片2临时地、单独地接合在基板1上的临时接合过程(见图1A和1B),以及将临时接合在基板1上的芯片2牢固地、单独地接合在基板1上的主要接合过程(见图1C和1D)。在安装方法中,基板1和每个芯片2之间的接合强度在主要接合之后比在临时接合之后高。
临时接合过程是根据要安装在基板1上的芯片2的数目反复地执行第一基本过程。也就是说,第一基本过程单独地对基板1上的每个芯片2执行。第一基本过程包括第一步骤和第二步骤。
如图2A所示,在第一步骤中,将每个芯片2的第二金属层21对齐在基板1上的第一金属层11上。
如图1B所示,在第一步骤后的第二步骤中,从每个芯片2侧施加压力,以使每个芯片2的第二金属层21和基板1的第一金属层11在第一限定温度固相扩散接合,并且相应地,每个芯片2临时接合在基板1上。固相扩散接合是一种在固相状态下,接合每个芯片2的第二金属层21的接合表面和基板1的第一金属层11的接合表面的方法。第一限定温度设得比第一和第二金属层11和21的熔化温度中较低的一个低。这里提到的临时接合意味着用于使每个芯片2保持处于这样一种状态的接合:即在执行主要接合之前,每个芯片2位于基板1上的规定位置。
如图1D和2B所示,主要接合过程是根据基板1上的芯片2的数目反复地执行第二基本过程。也就是说,第二基本过程是对基板1上的每个芯片2单独执行。第二基本过程包括第三步骤和第四步骤。
在第三步骤中,临时安装在基板1上的每个芯片2的位置被识别。
在第三步骤后的第四步骤中,从每个芯片2侧施加压力,以使每个芯片2的第二金属层21和基板1的第一金属层11在第二限定温度液相扩散接合,并且相应地,每个芯片2牢固地接合在基板1上。因此,每个芯片2通过作为由第一和第二金属层11和21的部分制成的合金层的接合层31接合在基板1上。这里提到的主要接合意味着导致每个芯片2和基板1之间的接合状态更稳定并导致其接合强度更高的最终接合。第二限定温度设为等于或高于第一和第二金属层11和21的熔化温度中较高的一个。相应地,第二限定温度设为比第一限定温度相对地高。
临时接合过程和主要接合过程可分别以单独的系统执行。顺便来说,在生产线上,多个基板1被加工,且芯片2在过程中被安装在每个基板1上。这里在根据本实施例的安装方法中,因为临时接合过程和主要接合过程可以单独的系统执行,临时接合过程和主要接合过程可同时地、分别地关于两个相互不同的基板1执行。这里,因为第二步骤中的临时接合过程是通过使第一和第二金属层11和21固相扩散接合来执行临时接合,相较于在第一步骤之后执行液相扩散接合的情况,可能更大程度地缩短所需时间(工作时间)。此外,因为第三步骤中的主要接合过程是在芯片2临时接合在基板1上的状态下识别每个芯片2的位置,不同于第一步骤,不需要以高精度识别每个芯片2以拾起每个芯片2。就是说,相较于第一步骤中以高精度识别每个芯片2和基板1的情况,可能导致第三步骤中每个芯片2的识别更简单。因此,在主要接合过程中,相较于在第一步骤之后执行液相扩散接合的情况,可能更大程度地缩短所需时间。相应地,在本实施例的安装方法中,可能通过同时执行临时接合过程和主要接合过程来缩短安装过程中的流片间隔时间,并提高安装过程中的生产量。在上文描述的JP2009-130293的安装方法中,芯片侧接合电极的接合表面与相应的基板侧接合电极的接合表面相接触,同时LED芯片用头部的加热器通过吸夹头加热至限定接合温度,且相应地,考虑一种情况,即由于热波动、热膨胀等因素,以高精度在基板侧接合电极上对齐芯片侧接合电极是困难的。在另一方面,在本实施例的安装方法中,临时接合以相对低于第二限定温度的第一限定温度进行,主要接合过程以所述第二限定温度进行,并且相应地,以高精度执行对齐是容易的。
临时接合过程和主要接合过程可用例如作为单独系统的两个裸片接合设备分别地执行。每个裸片接合设备包括接合头、台、识别装置以及控制装置。所述接合头、台和识别装置由控制装置控制。控制装置包括配置为具有适当程序的微机的主要控制部,以及配置以根据主要控制部的指令分别地控制接合头、台以及识别装置的单独控制部。识别装置由相机、图像处理单元和监视器构成。要注意的是,裸片接合设备的部件不特定地受到限制。执行临时接合过程和主要接合过程的各自系统不限于裸片接合设备。
以下,为了便于说明,针对临时接合过程的裸片接合设备被称为第一裸片接合设备,而针对主要接合过程的裸片接合设备被称为第二裸片接合设备。要注意的是,第一和第二裸片接合设备可具有相同部件或不同部件。
对基板1,可使用晶圆。晶圆由,例如,硅晶圆制成,并设有安排在各个芯片2所接合的预定区域内的第一金属层11。当硅晶圆被用作基板1时,优选有绝缘膜,如氧化硅膜,形成在硅晶圆的表面上。每个第一金属层11可配置为,例如,无助焊剂AuSn膜。无助焊剂AuSn层可由,例如,电镀法或溅镀法形成。例如,阻挡层及用于阻挡层的基层可设置在每个第一金属层11和绝缘膜之间。当每个第一金属层11为AuSn膜且绝缘膜为氧化硅膜时,阻挡层的材料的例子包括铂族金属,如铂和钯。在阻挡层和绝缘膜之间的基层的材料的例子包括钛和镍。
例如,硅晶圆的直径可在大约50mm到300mm的范围内,厚度可在大约200μm到1000μm的范围内。
基板1的材料不限于硅,而可为氮化铝、氧化铝等材料。当基板1的材料为硅时,基板1优选设有上述绝缘膜。然而,当基板1由绝缘材料如氮化铝或氧化铝形成时,不要求为基板1提供绝缘膜。
对于芯片2,例如,可使用LED芯片。每个LED芯片的芯片尺寸可为,例如,0.3mm□(即0.3mm×0.3mm),0.45mm□或1mm□。每个LED芯片的平面形状不限于正方形,而可为例如长方形。当每个LED芯片的平面形状为长方形时,每个LED芯片的芯片尺寸可为,例如,0.5mm×0.24mm。
当芯片2为LED芯片时,每个LED芯片的发射波长不特定地受到限制。相应地,LED芯片的例子包括紫外线LED芯片、紫色LED芯片、蓝色LED芯片、绿色LED芯片、黄色LED芯片、橙色LED芯片、及红色LED芯片。此外,LED芯片的例子包括白色LED芯片。
对每个芯片2,在以下情况下可使用LED芯片:第一电极2a形成在LED芯片的主表面侧上,而第二电极2b形成在LED芯片的与主表面相反的一侧,如图3A所示。在芯片2中,第二金属层21(在图3A中未示出)可堆叠在第二电极2b上,或者第二电极2b的最外表面侧可配置为第二金属层21(在图3A中未示出),或者第二电极2b可配置为第二金属层21(在图3A中未示出)。要注意的是,在图3A的安装方面,第一和第二电极2a和2b之一是阳极,而另一个是阴极。
可选地,对每个芯片2,在以下情况下可使用LED芯片:第一和第二电极2a和2b形成在LED芯片在其厚度方向上的一表面侧上,如图3B所示。也就是说,第一和第二电极2a和2b都形成在示于图3B的芯片2的下表面上,同时以规定距离间隔开。在该芯片2中,第二金属层21(在图3B中未示出)可堆叠在第一和第二电极2a和2b每个上,或者第一和第二电极2a和2b每个的最外表面侧可配置为第二金属层21(在图3B中未示出),或者第一和第二电极2a和2b每个可配置为第二金属层21(在图3B中未示出)。要注意的是,在图3B的安装方面,第一和第二电极2a和2b之一是阳极,而另一个是阴极。
对于第一和第二金属层11和21每个的材料,可使用无助焊剂材料。
在每个芯片2中,例如,无助焊剂金可用作第二金属层21的材料。无助焊剂金层例如可由电镀法、溅镀法或蒸发法形成。
每个芯片2的第二金属层21和基板1的第一金属层1的材料组合不限于Au-AuSn,而可为例如AuSn-Au。如果每个芯片2的第二金属层21和基板1的第一金属层11的材料组合为Au-AuSn或AuSn-Au,在使用SuAgCu在母板或相似组件、基板1(其上安装芯片2)或者模块(划分自装有芯片2的基板1)上二次安装的情况下,可能防止接合层31再次熔化。
每个芯片2的第二金属层21和基板1的第一金属层11的材料组合的例子包括AuGe-Au,Au-AuGe,SnBi-Sn,Sn-SnBi,SnCu-Cu,以及Cu-SnCu。
在LED芯片被用作芯片2以及AuSn层被用作通过使第二金属层21和第一金属层11液相扩散接合形成的接合层31的情况下,不局限于上述例子。例如,也可考虑示于图4至6B中的配置例子中任意一个。在图4的配置例子中,芯片2的第二金属层21配置为金层21a,而基板1的第一金属层11包括作为Sn层或AuSn层的第一层11a和位于第一层11a上的作为Au层的第二层11b。相应地,基板1可抑制第一金属层11的锡层的氧化。
在图5的配置例子中,芯片2的第二金属层21配置为金层21a,而基板1的第一金属层11具有多层结构,其中锡层11c和金层11d交替堆叠,且最外表面配置为金层11d。因此,基板1可抑制第一金属层11的锡层11c的氧化。在主要接合过程中,当锡被迫熔化时,可能简单地形成AuSn。
在图6A和6B的配置例子中,芯片2的第二金属层21配置为金层21a,而基板1的第一金属层11配置为具有格状裂缝的平面形状AuSn层11e。因此,在主要接合过程中,当AuSn层11e被迫熔化时,可能减少接合的起始点(合金化开始之处)的变化,且相应地,可能减少接合强度的变化、接合面积、非接合面积等的变化。
对于图4到6B的例子,第一金属层11和第二金属层21的成分可相互替代。
芯片2不限于LED芯片。芯片2的例子包括激光二极管芯片、光电二极管芯片、GaN基HEMT(高电子迁移率晶体管)芯片、MEMS(微电子机械系统)芯片、红外传感器芯片、以及IC芯片。MEMS芯片的例子包括加速度传感器芯片和压力传感器芯片。
每个芯片2的芯片尺寸不特别地受限制。每个芯片2的芯片尺寸例如可在大约0.2mm□到5mm□的范围内。在俯视图中,每个芯片2的外周形状不限于正方形,而可为例如长方形。
同样,每个芯片2的厚度不特别地受限制。每个芯片的厚度例如可在0.1mm到1mm的范围内。
在放置基板1于第一裸片接合设备的台3a的表面(见图1A和1B)上的第一基板放置过程之后,执行临时接合过程。台3a在其周部中设有吸孔(未示出),该表面上的基板1等通过上述吸孔由吸力保持。因此,第一裸片接合设备可将基板1以被吸状态保持在台3a的所述表面上。
在临时接合过程的第一步骤中,每个芯片2在基板1上对齐。更具体地,在第一步骤中,在作为待拾取目标的芯片2被第一裸片接合设备的夹头5a以真空抽吸从用例如晶圆带(粘合树脂带)或芯片托盘保持的芯片2拾取之前,第一裸片接合设备的识别装置(未示出)以高精度识别该目标。之后,识别装置以高精度识别第一裸片接合设备的台3a的表面上的基板1的预定区域,并且将由夹头5a以真空抽吸保持的芯片2对齐在基板1上(例如,执行芯片2的纠正姿势的芯片对准)。粘合树脂带的例子包括紫外线固化型划片胶带和热固化型划片胶带。即使粘合树脂带以强划切粘合保持芯片2,粘合在划切后可被紫外线或红外线的辐射减弱,且相应地,可增强拾取性能。
在临时接合过程的第二步骤中,芯片2的接合表面与基板1的接合表面相接触,且从芯片2侧施加压力以使芯片2的第二金属层21和基板1的第一金属层11在第一限定温度下固相扩散接合。在根据本实施例的安装方法中,芯片2通过固相扩散接合临时接合在基板1上。在第二步骤中,芯片2由接合头4a的加热器(未示出)通过夹头5a加热至第一限定温度。在第二步骤中,在芯片2被加热至稍高于第一限定温度的温度后,进行调整以便通过使芯片2的接合表面与基板1的接合表面相接触而使芯片2的温度达到第一限定温度。然而,可在芯片2的接合表面与基板1的接合表面相接触之后调整加热以便芯片2的温度达到第一限定温度。
固相扩散接合优选为例如超声接合或表面活化接合。在这种情况下,在第二步骤中,当芯片2和基板1被迫处于相对低的温度时,可能执行临时接合,且相应地,即使在芯片2和基板1中至少一个在临时接合之前处于加热状态时,也可能以高精度执行对齐。
超声接合是使用超声振动执行的固相扩散接合。对于超声接合,优选是组合有超声的热压接合,即在规定的加热状态下使用压力和超声振动来执行接合。在组合有超声的热压接合中,相较于在正常温度下使用压力和超声振动执行接合的情况,可能进一步提高接合强度。此外,在组合有超声的热压接合中,可能在相较热压接合更低的温度执行接合。
在表面活化接合中,彼此的接合表面在接合前被氩等离子体、氩离子束或氩原子束于真空中辐射,以清洁和活化接合表面,而后接合表面相互接触,而后施加适当的负载以在第一限定温度下直接接合接合表面。第一限定温度优选设置为使芯片2不会发生热损伤。当芯片2为例如LED芯片时,第一限定温度优选设置为使LED芯片的结温度不超过最大结温度,并且更优选设在大约正常温度到100度的范围内。这里,在表面活化接合中,如果第一限定温度设在例如80度到100度的范围内,相较于在正常温度执行接合的情况,可能进一步提高接合强度。要注意的是,在表面活化接合中,可使用氦等离子体、氦离子束或氦原子束,而不是氩等离子体、氩离子束或氩原子束。可选地,可使用氖等离子体、氖离子束或氖原子束。
要注意的是,在执行固相扩散接合的第二步骤中,可能通过在接合中加热芯片2和基板1中至少一个来提高接合强度。
优选在受控环境而不是空气环境中执行第二步骤。受控环境的例子包括惰性气体环境、真空环境和还原气体环境。惰性气体环境的例子包括N2气体环境和氩气环境。还原气体环境的例子包括H2气体环境。在第二步骤中,可能通过将环境设置至惰性气体环境或真空环境来抑制氧化。此外,在第二步骤中,可能通过将环境设置至还原气体环境来移除不需要的氧化物。
在放置基板1于第二裸片接合设备的台3b(见图1C和1D)的表面上的第二基板放置过程之后,执行主要接合过程。台3b在其周部设有吸孔(未示出),该表面上的基板1等通过上述吸孔由吸力保持。因此,第二裸片接合设备可将基板1以被吸状态保持在台3b的表面上。
在主要接合过程的第三步骤中,识别临时接合在基板1上的每个芯片2的位置。更具体地,在第三步骤中,第二裸片接合设备的识别装置(未示出)简单地识别在第二裸片接合设备的台3b上由吸力保持的基板1上的芯片2,且使芯片2与接合头4b的夹头5b对齐。由于第二裸片接合设备简单地以低精度识别芯片2,相较于以高精度识别芯片2的情况,可能简化图像处理单元中的图像处理。因此,可能缩短识别所需要的时间。
在主要接合过程的第四步骤中,从芯片2侧施加压力以在等于或高于第一和第二金属层11和21的熔化温度中较高的一个的第二限定温度下将芯片2牢固地接合在基板1上。更具体地,在第四步骤中,用第二裸片接合设备的接合头4b从芯片2侧执行加热以使芯片2和基板1液相扩散接合。液相扩散接合是一种在临时地熔化和液化芯片2的第二金属层21和基板1的第一金属层1中至少一个之后,用扩散执行等温固化的方法。这里,芯片2的第二金属层21和基板1的第一金属层11受到共晶接合。共晶接合是一种相对于液相扩散接合的液化利用共晶反应的接合方法。
在第四步骤中,位于第二裸片接合设备的接合头4b处的夹头5b与芯片2相接触,然后通过夹头5b用接合头4b的加热器(未示出)加热芯片2至第二限定温度,且在那个状态中,在限定时间段内从接合头4b侧持续施加适当限定压力至芯片2,从而在第四步骤中,芯片2的第二金属层21和基板1的第一金属层11受到共晶接合。例如,当第二金属层21的材料是金而第一金属层的材料是AuSn时,第二限定温度可设得比AuSn的熔化温度高。限定压力可适当地设在例如大约2kg/cm2到50kg/cm2的范围内。限定时间段可适当地设在例如大约0.5秒到10秒的范围内。
优选在受控环境而不是空气环境中执行第四步骤。受控环境的例子包括惰性气体环境、真空环境和还原气体环境。惰性气体环境的例子包括N2气体环境和氩气环境。还原气体环境的例子包括H2气体环境。在第四步骤中,可能通过将环境设置至惰性气体环境或真空环境来抑制氧化。此外,在第四步骤中,可能通过将环境设置至还原气体环境来移除不需要的氧化物。
在第四步骤中,不仅从芯片2侧施加热,还用台3b的加热器(未示出)通过台3b从基板的一侧施加热。然而,不限于此,且热量可仅从芯片2侧或基板1侧施加。这里,当第二金属层21的材料为AuSn且第一金属层11的材料为金时,优选将接合头4b的加热器和台3b的加热器的温度设成使得芯片2侧的温度高于基板1侧的温度。优选将台3b的加热器的温度设成等于或低于AuSn的熔点。是因为担心当在芯片2安装之后再次熔化AuSn时,以高精度安装的芯片2会发生位置偏差。
当执行液相扩散接合时,作为接合条件,接合界面的空隙率(非接合率)优选设为例如20%或更低。空隙率可定义为,例如,非接合区域的面积与接合区域的期望面积(例如,接合层31的期望面积)的比率。接合区域的期望面积和非接合区域的面积可由,例如,在执行液相扩散接合之后用超声显微镜观察获得的图像估计。
在根据本实施例的安装方法中,在临时接合之后执行主要接合,且相应地,可能提高接合强度,并且减少空隙。因此,在根据本实施例的安装方法中,可能减小芯片2和基板1之间的热阻,并减小热阻波动。
上述根据本实施例的安装方法包括:将芯片2临时地、单独地接合在基板1上的临时接合过程;以及将临时接合在基板1上的芯片2牢固地、单独地接合到基板1上的主要接合过程。这里,临时接合过程是根据要安装在基板1上的芯片2的数量反复地执行第一基本过程。第一基本过程包括第一步骤和第二步骤,第一步骤是将每个芯片2的第二金属层21对齐在基板1的第一金属层11上。第二步骤是使第一和第二金属层11和21固相扩散接合,以临时地接合。主要接合过程是根据基板1上芯片2的数目反复地执行第二基本过程。第二基本过程包括第三步骤和第四步骤。第三步骤是识别临时安装在基板1上的每个芯片2的位置。第四步骤是使第一和第二金属层11和21液相扩散接合,以牢固地接合。因此,在本实施例的安装方法中,临时接合过程和主要接合过程可以单独的系统分别地执行。相应地,临时接合过程和主要接合过程可针对两个相互不同的基板1分别同时执行。因此,在根据本实施例的安装方法中,可能缩短安装过程所要求的流片间隔时间。
在安装方法中,优选地,固相扩散接合以第一限定温度进行,而液相扩散接合通过从每个芯片2侧和基板1侧中至少一侧施加热量而以高于第一限定温度的第二规定温度进行。从而,在安装方法中,可能在每个芯片2和基板1的主要接合之前和之后抑制每个芯片2的位置偏差,并且,使基板1上的芯片2相关的热经历保持不变。
此外,在安装方法中,硅晶圆被用作基板1,且相应地,可能减小用于第一金属层11的基层的表面粗糙度,并且也减小第一金属层11的表面粗糙度。因此,在安装方法中,可能抑制由于第一金属层11的表面粗糙度在临时接合或主要接合中产生的空隙,并提高接合强度。对于第一金属层11的表面粗糙度,例如,定义于日本工业标准JIS B 0601-2001(国际标准化组织ISO 4287-1997)的算术平均粗糙度Ra优选为10nm或更小,且更优选为几个纳米或更小。
虽然本发明已参考某些优先实施例被描述,很多修改和变化可由所属领域的技术人员在不背离本发明的真正精神和范围(也就是权利要求)的情况下做出。
Claims (4)
1.一种将芯片安装在基板上的安装方法,包括:
将芯片临时地、单独地接合在基板上的临时接合过程;以及
将临时接合在基板上的芯片牢固地、单独地接合在基板上的主要接合过程,
所述临时接合过程是根据要安装在基板上的芯片的数目反复地执行第一基本过程,所述第一基本过程包括:
将每个芯片的第二金属层对齐在基板的第一金属层上的第一步骤;以及
通过在第一步骤之后从每个芯片侧施加压力以使第一和第二金属层固相扩散接合而将每个芯片临时接合在基板上的第二步骤,
所述主要接合过程是根据基板上的芯片数目反复地执行第二基本过程,所述第二基本过程包括:
识别临时安装在基板上的每个芯片的位置的第三步骤;以及
通过在第三步骤之后从每个芯片侧施加压力以使第一和第二金属层液相扩散接合而将每个芯片牢固地接合在基板上的第四步骤。
2.根据权利要求1所述的安装方法,
其中所述固相扩散接合以第一限定温度执行,
通过从每个芯片侧和基板侧中至少一侧施加热,所述液相扩散接合以高于第一限定温度的第二限定温度执行。
3.根据权利要求2所述的安装方法,
其中所述第一限定温度低于第一和第二金属层的熔化温度中较低的一个,
所述第二限定温度等于或高于第一和第二金属层的熔化温度中较高的一个。
4.根据权利要求1至3中任一项所述的安装方法,
其中所述固相扩散接合为超声接合或表面活化接合。
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US (1) | US9508679B2 (zh) |
EP (1) | EP2884526A4 (zh) |
JP (1) | JP6044885B2 (zh) |
KR (1) | KR20150013899A (zh) |
CN (1) | CN104520976B (zh) |
TW (1) | TW201407696A (zh) |
WO (1) | WO2014024343A1 (zh) |
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CN110024095A (zh) * | 2016-09-30 | 2019-07-16 | 株式会社新川 | 半导体装置的制造方法以及封装装置 |
CN110391146A (zh) * | 2018-04-20 | 2019-10-29 | 台湾积体电路制造股份有限公司 | 利用预先去氧化物工艺的接合及其执行装置 |
CN112054105A (zh) * | 2019-06-06 | 2020-12-08 | 錼创显示科技股份有限公司 | 微型发光二极管显示器的制造方法 |
US11342302B2 (en) | 2018-04-20 | 2022-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding with pre-deoxide process and apparatus for performing the same |
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JP5627057B1 (ja) * | 2014-03-31 | 2014-11-19 | アルファーデザイン株式会社 | 部品実装装置 |
DE102014116030A1 (de) * | 2014-11-04 | 2016-05-04 | Infineon Technologies Ag | Verfahren zur Herstellung einer Verbindung und Anordnung für eine Chipzusammenstellung mit Direktverbindung |
TWI612300B (zh) * | 2016-02-25 | 2018-01-21 | 國立清華大學 | 感測器及其製造方法 |
KR102349884B1 (ko) * | 2016-03-17 | 2022-01-12 | 도쿄엘렉트론가부시키가이샤 | 액체를 사용해서 기판에 대한 칩 부품의 얼라인먼트를 행하는 방법 |
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TWI653694B (zh) * | 2017-09-13 | 2019-03-11 | 英屬開曼群島商錼創科技股份有限公司 | 微型發光元件陣列製造方法、轉移載板以及微型發光元件陣列 |
US10186549B1 (en) * | 2017-09-20 | 2019-01-22 | Asm Technology Singapore Pte Ltd | Gang bonding process for assembling a matrix of light-emitting elements |
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Also Published As
Publication number | Publication date |
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US20150287696A1 (en) | 2015-10-08 |
KR20150013899A (ko) | 2015-02-05 |
WO2014024343A1 (ja) | 2014-02-13 |
EP2884526A1 (en) | 2015-06-17 |
CN104520976B (zh) | 2018-01-05 |
US9508679B2 (en) | 2016-11-29 |
EP2884526A4 (en) | 2015-12-30 |
TW201407696A (zh) | 2014-02-16 |
JP2014036103A (ja) | 2014-02-24 |
JP6044885B2 (ja) | 2016-12-14 |
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