TWI692044B - 封裝裝置以及半導體裝置的製造方法 - Google Patents

封裝裝置以及半導體裝置的製造方法 Download PDF

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TWI692044B
TWI692044B TW107117728A TW107117728A TWI692044B TW I692044 B TWI692044 B TW I692044B TW 107117728 A TW107117728 A TW 107117728A TW 107117728 A TW107117728 A TW 107117728A TW I692044 B TWI692044 B TW I692044B
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substrate
layer
semiconductor wafer
platform
semiconductor
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TW107117728A
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TW201901824A (zh
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中村智宣
前田徹
高野徹朗
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日商新川股份有限公司
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Abstract

本發明提供一種能對作為接合對象的半導體晶片進行適當的加熱,另一方面能抑制向其他半導體晶片的熱輸入的封裝裝置。一種封裝裝置,其將半導體晶片12接合於作為基板30或其他半導體晶片12的被封裝體而製造半導體裝置,所述封裝裝置包括:平台120,載置有所述基板30;封裝頭124,相對於所述平台120可進行相對移動,並將所述半導體晶片12接合於所述被封裝體;照射單元108,透射所述平台,並且自平台120的下側照射對所述基板30進行加熱的電磁波,所述平台120具有形成於上表面側的第一層122,且第一層122的面方向上的熱阻力大於厚度方向上的熱阻力。

Description

封裝裝置以及半導體裝置的製造方法
本說明書揭示一種將半導體晶片接合於作為基板或其他半導體晶片的被封裝體而製造半導體裝置的封裝裝置以及半導體裝置的製造方法。
於將半導體晶片接合於基板或其他半導體晶片上的情況下,通常利用已加熱的封裝頭對半導體晶片進行加熱加壓。但是僅利用來自封裝頭的熱,難以對作為接合對象的半導體晶片進行適當的加熱。尤其,近年來為了實現半導體裝置的更高功能化、小型化,而提出將多個半導體晶片積層而進行封裝。該情況下,為了縮短封裝處理的時間,存在一邊將多個半導體晶片進行暫時壓接一邊進行積層後,對所述多個半導體晶片成批地進行正式壓接的情況。即,存在對多個半導體晶片以暫時壓接狀態進行積層而形成暫時積層體後,利用已加熱的封裝頭對所述暫時積層體的上表面進行加熱加壓而進行正式壓接的情況。所述情況下,僅利用來自封裝頭的熱,難以適當地加熱至暫時積層體的最下層的半導體晶片。因此,自先前開始,於對半導體裝置進行接合時,對載置有基板的平台整體進行加熱。藉此,可自半導體晶片的上下兩側進行加熱。
[現有技術文獻]
[專利文獻]
[專利文獻1]國際公開第2010/050209號
[專利文獻2]日本專利第3833531號公報
[專利文獻3]日本專利第4001341號公報
但是,於對平台整體進行加熱的情況下,配置於與作為接合對象(加熱對象)的半導體晶片不同部位的半導體晶片亦被持續加熱。結果於半導體晶片中被長時間輸入熱。此種長期的熱輸入會導致半導體晶片,尤其是設置於半導體晶片的底面的非導電性膜(Non Conductive Film)等樹脂的劣化,甚至導致封裝品質的下降。
為了避免該問題,亦考慮於平台的多個部位預先設置脈衝式加熱器(pulse heater)等局部加熱用的加熱器,且僅接通所需部位的加熱器。但是,於將此種局部加熱用的加熱器埋入平台中的情況下,難以維持平台的平坦度,甚至會導致封裝品質的下降。
另外,於專利文獻1-專利文獻3中,揭示有一種利用自平台的背側照射的光來對基板進行光加熱的技術,但該些技術均未充分考慮對基板進行局部加熱。
因此,本說明書中提供一種能對作為接合對象的半導體 晶片進行適當的加熱,另一方面能抑制向其他半導體晶片的熱輸入的封裝裝置以及半導體裝置的製造方法。
本說明書中揭示的一種封裝裝置將半導體晶片接合於作為基板或其他半導體晶片的被封裝體而製造半導體裝置,所述封裝裝置的特徵在於包括:平台,具有直接或經由中間構件載置所述基板的第一面、以及與所述第一面為相反側的第二面;封裝頭,相對於所述平台能夠進行相對移動,並將所述半導體晶片接合於所述被封裝體;以及照射單元,透射所述平台,並且自所述第二面側照射對所述基板或所述中間構件進行加熱的電磁波,所述平台具有形成於所述第一面側的第一層,且所述第一層的面方向上的熱阻力大於厚度方向上的熱阻力。
可為:所述基板熱壓接有多個所述半導體晶片,所述照射單元包括變更部件,所述變更部件對所述第一面中的所述電磁波的照射區域、以及所述第一面中的所述電磁波的照射位置的至少一者進行變更。
另外,可為:所述封裝頭包括加熱器,所述加熱器對多個所述半導體晶片以暫時壓接的狀態經積層而成的暫時積層體進行加熱來進行正式壓接,所述照射單元與所述加熱器一起對所述暫時積層體進行加熱。
另外,可為:所述平台更具有較所述第一層而形成於更靠所述第二面側的第二層,且所述第一層的面方向上的熱阻力較 所述第二層大。
另外,可為:所述第二層的剛性較所述第一層高。
另外,可為:所述第二層是包含所述電磁波能夠透射的材料的實心部位,所述第一層是在上表面形成有多個槽或在層內形成有多個細孔的部位。
另外,可為:所述基板為矽晶圓,且被直接載置於所述平台,所述電磁波為波長1200nm以下,且所述基板利用所述電磁波被局部加熱。
另外,可為:所述基板經由所述中間構件被載置於所述平台,所述電磁波具有被所述中間構件吸收且不被所述基板吸收的波長,藉由來自利用所述電磁波被局部加熱的所述中間構件的傳熱,對所述基板進行局部加熱。
本說明書中揭示的半導體裝置的製造方法將半導體晶片接合於作為基板或其他半導體晶片的被封裝體而製造半導體裝置,所述半導體裝置的製造方法的特徵在於包括:載置步驟,將所述基板直接或經由中間構件載置於平台的第一面;接合步驟,利用相對於所述平台能夠進行相對移動的封裝頭,將所述半導體晶片接合於所述被封裝體;基板加熱步驟,與所述接合步驟的至少一部分並行地,自隔著所述平台而配置於所述封裝頭的相反側的照射單元照射被所述基板或所述中間構件吸收且透射所述平台的電磁波,藉此對所述基板或所述中間構件進行加熱,所述平台具有形成於所述第一面側的第一層,且所述第一層的面方向上的 熱阻力大於厚度方向上的熱阻力。
所述接合步驟可包括:暫時壓接步驟,利用所述封裝頭,在所述基板的多個部位依序形成暫時積層體,所述暫時積層體是一邊將一個以上的所述半導體晶片暫時壓接於所述基板上一邊進行積層而成;正式壓接步驟,於所述暫時壓接步驟後,在所述基板的多個部位依序進行如下處理:所述處理是對一個暫時積層體自其上表面進行加熱加壓,藉此對構成所述暫時積層體的一個以上的所述半導體晶片成批地進行正式壓接,所述基板加熱步驟可與對所述半導體晶片成批地進行正式壓接的處理並行地,對所述基板或所述中間構件中的與所述正式壓接執行部位對應的部位照射所述電磁波。
根據本說明書中揭示的裝置以及方法,因利用電磁波對基板進行局部加熱,因此能對作為接合對象的半導體晶片進行適當的加熱。另外,因平台第一層的面方向上的熱阻力較厚度方向上的熱阻力高,因此朝向在面方向上相離而配置的其他半導體晶片的傳熱得到抑制,進而向其他半導體晶片的熱輸入得到抑制。
10:半導體裝置
12:半導體晶片
14、16:電極端子
18:凸塊
20:NCF
30:基板
34:封裝分區
36:電極
100:封裝裝置
102:晶片供給單元
104:晶片搬送單元
106:接合單元
108:照射單元
110:上推部
114:晶粒拾取機
116:移送頭
118:旋轉台
120:平台
122:第一層
123:第二層
124:封裝頭
130:控制部
132:電磁波源
134:電磁波
135:光圈
140:中間構件
A、B、C:分區
P:配置間距
Ra、Rb:旋轉軸
STc:晶片積層體
STt:暫時積層體
TE:切割帶
圖1是表示封裝裝置的構成的圖。
圖2是表示半導體裝置的一例的圖。
圖3是表示基板的一例的圖。
圖4是表示半導體晶片的一例的圖。
圖5是表示對基板進行局部加熱時的情形的圖。
圖6是圖5的X部放大圖。
圖7是表示平台的另一例的圖。
圖8是表示平台的另一例的圖。
圖9是表示平台的另一例的圖。
圖10是表示平台的另一例的圖。
以下,參照圖式對半導體裝置的製造方法以及封裝裝置100進行說明。圖1是表示封裝裝置100的構成的圖。該封裝裝置100是將半導體晶片12(參照圖2)封裝於基板30上的裝置。該封裝裝置100是於將多個半導體晶片12積層來進行封裝的情況下尤其較佳的構成。再者,於以下的說明中,於多個半導體晶片12積層而成的積層體中,將構成積層體的多個半導體晶片12處於暫時壓接狀態的積層體稱為「暫時積層體STt」、將多個半導體晶片12處於正式壓接狀態的積層體稱為「晶片積層體STc」來進行區分。
封裝裝置100包括:晶片供給單元102、晶片搬送單元104、接合單元106、照射單元108、以及對該些單元的驅動進行控制的控制部130。晶片供給單元102是自晶片供給源將半導體晶片12取出並供給至晶片搬送單元104的部位。該晶片供給單元102包括上推部110、晶粒拾取機(die picker)114、以及移送頭116。
於晶片供給單元102中,多個半導體晶片12被載置於切割帶TE上。此時,半導體晶片12以凸塊18朝向上側的面朝上狀態被載置。上推部110自所述多個半導體晶片12中將僅一個半導體晶片12保持著面朝上的狀態朝上方上推。晶粒拾取機114利用其下端對由上推部110所上推的半導體晶片12進行抽吸保持並予以接收。接收到半導體晶片12的晶粒拾取機114原地進行180度旋轉,以使該半導體晶片12的凸塊18朝向下方,即,使半導體晶片12成為面朝下的狀態。成為該狀態後,移送頭116自晶粒拾取機114接收半導體晶片12。
移送頭116於上下方向及水平方向上可移動,且可利用其下端對半導體晶片12進行吸附保持。晶粒拾取機114進行180度旋轉而使半導體晶片12成為面朝下狀態後,移送頭116利用其下端對該半導體晶片12進行吸附保持。之後,移送頭116於水平方向及上下方向上進行移動,而移動至晶片搬送單元104。
晶片搬送單元104具有以鉛垂的旋轉軸Ra為中心進行旋轉的旋轉台118。移送頭116將半導體晶片12載置於旋轉台118的規定位置。載置有半導體晶片12的旋轉台118以旋轉軸Ra為中心進行旋轉,藉此,該半導體晶片12被搬送至位於晶片供給單元102的相反側的接合單元106。
接合單元106包括對基板30進行支撐的平台120、以及將半導體晶片12安裝於基板30上的封裝頭124。平台120具有載置基板30的上表面(第一面)、以及與該第一面為相反側的下表 面(第二面)。另外,平台120於水平方向上可移動,對所載置的基板30與封裝頭124的相對位置關係進行調整。平台120如後文所詳述般包含能夠使自照射單元108照射的電磁波134透射的材料。另外,平台120為具有面方向上的熱阻力較厚度方向上的熱阻力高的的第一層、以及配置於第一層的下側的第二層的多層構造,關於該方面亦將於後文說明。
封裝頭124將多個半導體晶片12積層並封裝於基板30上。封裝頭124能夠將半導體晶片12保持於其下端,另外,可繞鉛垂的旋轉軸Rb進行旋轉、升降。該封裝頭124將半導體晶片12壓接於基板30或其他的半導體晶片12上。具體而言,封裝頭124下降以便將所保持的半導體晶片12按壓至基板30等上,藉此來進行半導體晶片12的暫時壓接或正式壓接。該封裝頭124中內置有溫度可變的加熱器(未圖示),封裝頭124在執行暫時壓接時被加熱至第一溫度T1,在執行正式壓接時被加熱至較第一溫度T1高的第二溫度T2。另外,封裝頭124在執行暫時壓接時將第一負荷F1附加至半導體晶片12,在執行正式壓接時將第二負荷F2附加至半導體晶片12。
於封裝頭124的附近設置有照相機(未圖示)。於基板30及半導體晶片12上分別附有成為定位基準的對準標記。照相機以拍攝入該對準標記的方式對基板30以及半導體晶片12進行拍攝。控制部130基於由該拍攝所得到的圖像資料,把握基板30以及半導體晶片12的相對位置關係,並根據需要對封裝頭124繞著 軸Rb的旋轉角度以及平台120的水平位置進行調整。
照射單元108自平台120的背側照射特定波長的電磁波134,藉此對基板30進行局部加熱。照射單元108至少具有照射電磁波134的電磁波源132。電磁波134只要具有容易透射平台120、且容易被基板30吸收的波長則並無特別限定,但若考慮到輸出、指向性,電磁波134理想的是雷射光。作為電磁波源132,只要能以所期望的功率照射所期望的波長、功率的光,則並無特別限定,例如,可使用雷射振盪器或雷射二極體(Laser Diode,LD)、發光二極體(light-emitting diode,LED)、鹵素燈(halogen lamp)等。為了僅對基板30的特定範圍照射電磁波134,照射單元108可更具有光圈或透鏡、反射鏡、光纖等光學構件,對該些光學構件進行驅動而使電磁波掃描的驅動構件等。
控制部130對各部的驅動進行控制,例如包括進行各種運算的中央處理單元(Central Processing Unit,CPU)、以及儲存各種資料或程式的儲存部。控制部130依照儲存於儲存部中的程式,對各部進行驅動來執行半導體晶片的封裝處理。例如,控制部130對封裝頭124以及平台120進行驅動而將半導體晶片封裝於基板30上。另外,控制部130與後述的正式壓接處理並行地,對照射單元108進行驅動而使基板30被局部加熱。
接著,參照圖2~圖4對由該封裝裝置100所製造的半導體裝置10進行說明。圖2是表示半導體裝置10的一例的示意圖,圖3是基板30的示意圖,圖4是半導體晶片12的示意圖。 再者,在圖2中,半導體晶片12與基板30的邊界、以及兩個半導體晶片12的邊界中的粗線表示已被正式壓接。
如圖2所示,本例中所處理的半導體裝置10於基板30的上表面積層封裝有多個(圖示的例子中為4個)半導體晶片12。另外,本例中使用矽晶圓作為基板30。因此,本說明書中揭示的封裝製程是將半導體晶片12積層封裝於矽晶圓的電路形成面上的「晶圓上晶片製程(chip-on-wafer process)」。
作為矽晶圓的基板30主要包含矽,與包含樹脂或玻璃的通常的電路基板相比,熱傳導率高。如圖3所示,於基板30中,設定有呈格子狀排列的多個封裝分區34。各封裝分區34中積層封裝有多個半導體晶片12。封裝分區34以規定的配置間距P進行配設。該配置間距P的值根據作為封裝對象的半導體晶片12的尺寸等適宜地設定。另外,本實施形態中,將封裝分區34設為大致正方形,但亦可適宜地設為其他形狀,例如大致長方形。各封裝分區34的表面中,在與被封裝的半導體晶片12的凸塊18對應的位置形成有電極36(參照圖2)。
接著,關於半導體晶片12的構成如圖4所示,於半導體晶片12的上下面上形成有電極端子14、電極端子16。另外,於半導體晶片12的單面上形成有與電極端子14相連的凸塊18。凸塊18包含導電性金屬,並於規定的熔融溫度Tm下熔融。
另外,於半導體晶片12的單面上,以覆蓋凸塊18的方式貼附有非導電性膜(以下稱為「NCF」)20。NCF 20作為將半導 體晶片12與基板30或其他半導體晶片12加以黏合的黏合劑而發揮功能,且包含非導電性的熱硬化性樹脂,例如聚醯亞胺樹脂、環氧樹脂、丙烯酸樹脂、苯氧基樹脂、聚醚碸(Polyethersulfone,PES)樹脂等。該NCF 20的厚度較凸塊18的平均高度大,凸塊18被該NCF 20大致完全覆蓋。NCF 20於常溫下是固體的膜,但若超過規定的軟化起始溫度Ts,則慢慢且可逆地軟化而發揮流動性,若超過規定的硬化起始溫度Tt,則開始不可逆地硬化。
此處,軟化起始溫度Ts較硬化起始溫度Tt以及凸塊18的熔融溫度Tm低。暫時壓接用的第一溫度T1較該軟化起始溫度Ts高,且較熔融溫度Tm以及硬化起始溫度Tt低。另外,正式壓接用的第二溫度T2較熔融溫度Tm以及硬化起始溫度Tt高。即,成為Ts<T1<(Tm、Tt)<T2。
於將半導體晶片12暫時壓接於基板30或下側的半導體晶片12(以下,當不對兩者進行區分時稱為「被封裝體」)時,將封裝頭124加熱至第一溫度T1後對半導體晶片12進行加壓。此時,半導體晶片12的NCF 20利用來自封裝頭124的傳熱而被加熱至第一溫度T1附近,從而軟化而具有流動性。而且,藉此,NCF 20流入至半導體晶片12與被封裝體的間隙,從而能確實地填埋該間隙。
於將半導體晶片12正式壓接於被封裝體時,將封裝頭124加熱至第二溫度T2後對半導體晶片12進行加壓。此時,半導體晶片12的凸塊18以及NCF 20利用來自封裝頭124的傳熱而 被加熱至第二溫度T2附近。藉此,凸塊18熔融並可熔接於對向的被封裝體。另外,藉由該加熱,NCF 20以將半導體晶片12與被封裝體的間隙填埋的狀態進行硬化,因此半導體晶片12與被封裝體得以牢固地固定。即,於正式壓接時,半導體晶片12被熱壓接於基板30等。
此處,將封裝頭124的溫度自第一溫度T1切換為第二溫度T2、或自第二溫度T2切換為第一溫度T1需花費一定的時間。因此,為了縮短半導體裝置10的製造時間,有效的是減少封裝頭124的溫度切換次數。因此,提出了如下製程:於對多個半導體晶片12進行積層封裝的情況下,將全部的半導體晶片12進行暫時壓接後,對所述經暫時壓接的半導體晶片12進行正式壓接。具體而言,首先,使用加熱至第一溫度T1的封裝頭124,在多個封裝分區34中形成一邊對多個半導體晶片12進行暫時壓接一邊進行積層而成的暫時積層體STt。繼而,利用切換成第二溫度T2的封裝頭124對暫時積層體STt的上表面進行加壓,藉此,對構成暫時積層體STt的多個半導體晶片12成批地進行正式壓接。藉由以該順序對半導體晶片12進行封裝,能大幅減少封裝頭124的溫度切換次數,從而能大幅縮短半導體裝置10的製造時間。
此外,如根據至此為止的說明而明確般,為了對半導體晶片12進行適當的封裝,理想的是作為封裝對象的半導體晶片12被加熱至與其處理過程相對應的適當的溫度。例如,於進行正式壓接時,半導體晶片12必須被加熱至NCF 20的硬化起始溫度Tt 以上,且必須被加熱至凸塊18的熔融溫度Tm以上。但是,亦存在僅利用來自封裝頭124的熱難以將全部的半導體晶片12加熱至適當的溫度的情況。尤其,於對構成暫時積層體STt的多個半導體晶片12成批地進行正式壓接的情況下,若僅利用來自封裝頭124的熱,難以對最下層的半導體晶片12進行適當的加熱。
另外,理想的是於一個暫時積層體STt中,最上層的半導體晶片12的溫度與最下層的半導體晶片12的溫度差(以下稱為「積層體內溫度差」)△T小。若積層體內溫度差△T大,則會導致封裝品質的不均。但是,若僅利用來自封裝頭124的熱,難以使積層體內溫度差△T變小。
因此,先前,於多數情況下預先將加熱器內置於供基板30載置的平台120中而亦對基板30整體進行加熱。根據該構成,暫時積層體STt亦自下側受到加熱,因此最下層的半導體晶片12亦容易地被加熱至適當的溫度,另外,能使積層體內溫度差△T於某種程度上變小。
其中,於對平台120整體進行加熱的情況下,當然必須使該平台120的溫度充分低於NCF 20的硬化起始溫度Tt。其原因在於:若平台120的溫度較硬化起始溫度Tt高,則暫時壓接後、正式壓接前的半導體晶片12的NCF 20會進行熱硬化。因此,不能使平台120的溫度過高,從而難以使積層體內溫度差△T變得充分小。
另外,平台120即使處於較硬化起始溫度Tt更低的溫 度,於對該平台120整體進行加熱的情況下,暫時壓接或正式壓接於基板30的半導體晶片12中會被長時間地持續輸入熱。此種長時間的熱的輸入會導致半導體晶片12尤其是NCF 20的劣化,甚至是封裝品質的劣化。
因此,如已述般,本說明書中揭示的封裝裝置100中,於平台120的下側配置照射單元108,從而利用電磁波134對基板30進行局部加熱。圖5是表示對基板30進行局部加熱時的情形的概念圖。再者,於圖5中,圖示有三個封裝分區34,但在以下的說明中,將該些封裝分區34自圖示左側起依次稱為「分區A」、「分區B」、「分區C」來進行區分。另外,於圖5中,半導體晶片12與被封裝體(基板30或其他半導體晶片12)的邊界中的粗線表示已被正式壓接,虛線表示已被暫時壓接。因此,於圖5中,分區A的積層體是經正式壓接的晶片積層體STc,分區B、分區C的積層體是暫時壓接後且正式壓接前的暫時積層體STt。圖5是表示對分區B的暫時積層體STt進行正式壓接時的情形。
如圖5所示,於對一個暫時積層體STt進行正式壓接時,利用被加熱至第二溫度T2的封裝頭124對該暫時積層體STt進行加熱/加壓。另外,對基板30中的配置有作為正式壓接對象的暫時積層體STt的分區B照射電磁波134,從而利用電磁波134對該分區B進行加熱。
此處,如已述般,電磁波134具有容易透射平台120且容易被基板30吸收的波長。本例中,基板30是矽晶圓。矽的透 射率於波長低於1200nm時急劇下降。因此,於使用矽晶圓作為基板30的情況下,理想的是將電磁波134的波長設為1200nm以下。但是,若波長過度小,則電磁波的能量亦下降,因此理想的是電磁波134的波長較可見光大,即為750nm以上。
另外,對於平台120,理想的是電磁波134的透射率高。另外,對於平台120,亦理想的是缺乏傳熱性的材料。此是為了防止由電磁波134加熱的封裝分區34的熱經由平台120傳遞至其他的封裝分區34中。為了滿足此種條件,平台120理想的是例如包含石英或氟化鋇、氟化鎂、氟化鈣等。
電磁波134的照射範圍理想的是與半導體晶片12的外形大致相同的範圍。另外,為了僅對所期望的範圍照射電磁波134,照射單元108理想的是具有對電磁波134的照射範圍以及照射位置的至少一者進行變更的變更部件。作為變更部件的構成,可考慮有多種,變更部件例如可具有使電磁波源132相對於平台120的位置移動的移動機構。作為該移動機構,例如包括使平台120移動的XY移動機構。另外,為了僅對所期望的照射範圍進行照射,例如,如圖5所示,變更部件可具有光圈135,所述光圈135設置於直徑充分大於照射範圍的電磁波134的路徑中途,且形成有與照射範圍對應的開口。該光圈135可根據作為對象的半導體裝置適宜地進行更換。
另外,作為另一形態,可利用於基板30附近直徑充分小於照射範圍的電磁波134,對照射範圍進行掃描。為了於基板 30附近獲得小直徑的電磁波134,可使用射出小直徑的平行電磁波(例如平行光)的電磁波源132,亦可使用光學構件(透鏡等)使大直徑的電磁波134於基板30周邊對焦。另外,為了使電磁波134進行掃描,可移動電磁波132自身,亦可移動使電磁波134彎曲的反射鏡等。作為移動反射鏡的形態,例如,可使用利用振鏡馬達(galvanometer motor)使兩個以上的反射鏡驅動的振鏡反射鏡(galvanometer mirror)機構。另外,作為對反射鏡或電磁波源132進行驅動的機構,可使用線圈馬達或凸輪等。
另外,作為另一形態,為了僅對所期望的照射範圍進行照射,可使用各種光學構件來使電磁波134的輪廓(profile)(尺寸、外形等)產生變化。例如,可使用具有幾何學的光束成形功能的矩形芯纖維。另外,作為另一形態,可在電磁波134的路徑中途配置在筒體的內表面貼附有多個反射鏡的萬花筒(kaleidoscope)。進而,亦可代替上述的光學構件、或者除此之外亦使用繞射透鏡或複眼透鏡(fly-eye lens)、其他光學透鏡來使電磁波134的輪廓變化。
另外,圖1中僅圖示了一個電磁波源132,但是電磁波源132可設置兩個以上,所述兩個以上的電磁波源132可為彼此同種的電磁波源,亦可為彼此不同種類的電磁波源。另外,電磁波134的功率理想的是可以所期望的時間將基板30加熱至所期望的溫度。例如,理想的是:於對暫時積層體STt成批地進行正式壓接時,將最下層的半導體晶片12加熱至與最上層的半導體晶片 12相同的溫度。通常,正式壓接的執行時間為幾秒,因此電磁波134理想的是具有如下程度的功率:能於該正式壓接的執行過程中(幾秒以內)將基板30加熱至接近第二溫度T2。
總之,藉由照射具有容易透射平台120且容易被基板30吸收的波長的電磁波134,於基板30中電磁波134被吸收。而且,藉由將所吸收的電磁波的能量轉換成熱,可僅對基板30中的照射有電磁波134的範圍進行局部加熱。而且,藉由基板被局部加熱,位於該加熱部分(照射部分)上的半導體晶片12亦被加熱。藉由僅在進行正式壓接處理的封裝分區34中進行此種局部加熱(電磁波134的照射),亦可對最下層的半導體晶片12進行適當的加熱,從而可獲得良好的封裝品質。另外,藉由對進行正式壓接處理的封裝分區34進行局部加熱,可減小積層體內溫度差△T,從而可使構成一個積層體的多個半導體晶片12的封裝品質均勻化。
另一方面,於不進行正式壓接處理的封裝分區34中不照射電磁波134,因此能夠有效防止該封裝分區的溫度上升,進而防止並非正式壓接處理的對象的半導體晶片12的由熱所引起的劣化或變質。
但是,於利用電磁波134僅對作為正式壓接對象的封裝分區34進行加熱的情況下,該封裝分區34中所產生的熱的一部分經由基板30、平台120而傳遞至其他封裝分區34。例如,於圖5中,即便於利用電磁波134僅對分區B進行加熱的情況下,該分區B中所產生的熱的一部分亦經由基板30以及平台120而向分 區A或分區C流出。此種熱流出有可能導致熱效率變差、並非正式壓接處理的對象的分區A或分區C的半導體晶片12的熱劣化。
因此,於本說明書中揭示的封裝裝置100中,為了減少向作為加熱對象的封裝分區以外的封裝分區的傳熱,如上所述,使平台120包含缺乏傳熱性的材料,例如石英等。進而,本例中,為了減少經由平台120的向面方向的傳熱,於平台120的表面形成有多個槽。藉由形成該槽,於朝向面方向的路徑中途存在多個空氣層(槽部分),從而面方向上的熱阻力變高。以下,於平台120中,將形成有該槽的部分稱為「第一層122」,將配置於第一層122的下側的實心部分稱為「第二層123」。第一層122因於其表面形成有多個槽,因此面方向上的熱阻力較厚度方向上的熱阻力高。另外,第二層123是實心構造,因此與第一層122相比,面方向上的熱阻力低,另一方面強度高而難以撓曲。
形成於第一層122的槽的間距並無特別限定,例如可充分小於半導體晶片12的一邊(例如,槽的間距為半導體晶片的一邊的1/10以下等)。槽的間距小而槽的數量變多,藉此可緩和槽的邊緣與基板30的抵接部位所產生的應力集中,進而,於進行接合(暫時壓接、正式壓接)時,可使施加至半導體晶片12整體的壓力均勻化。另外,作為另一形態,可將槽的間距設為與封裝分區34的配置間距P相同,以將該槽配置於與封裝分區34的邊界線大致相同的位置。換言之,可設為:於半導體晶片12的正下方不存在槽,僅在於面方向上鄰接的兩個半導體晶片12之間存在槽。若 設為該構成,則於進行接合(暫時壓接、正式壓接)時,可使施加至半導體晶片12整體的壓力更均勻化。另外,該形成於第一層122的槽可與用以對所載置的基板30進行抽吸保持的抽吸機構(未圖示)連通。
如此,藉由於平台120的表層設置面方向上的熱阻力較厚度方向上的熱阻力高的第一層122,可有效防止經由該平台120的向面方向的傳熱。關於此,參照圖6進行說明。圖6是圖5的X部放大圖。設為藉由照射單元108而利用電磁波134僅對分區B進行加熱。該情況下,分區B中所產生的熱向上方(半導體晶片12側)、面方向(分區A、分區C側)、下方(平台120側)傳遞。此處,為了提高熱效率,理想的是使分區B中所產生的熱中的、傳遞至上方(半導體晶片12側)的熱量增加,傳遞至面方向(分區A、分區C側)以及下方(平台120側)的熱量減少。於基板30為傳熱性高的矽晶圓的情況下,難以使向面方向(分區A、分區C側)的傳熱量減少。另一方面,本例中使平台120包含絕熱性高的材料,進而於該平台120的表面形成多個槽來減少與基板30的接觸面積,因此可有效減少向下方(平台120側)的傳熱量。即,藉由使平台120包含絕熱性高的材料,並且減少平台120與基板30的接觸面積,可提高利用照射單元108對半導體晶片12進行加熱時的熱效率。
但是,向平台120的傳熱量雖說少,但不能成為零。若傳遞至平台120的熱經由該平台120而被傳遞至面方向(分區A、 分區C側),則輸入至加熱對象以外的半導體晶片12的熱量增加。但是,本例的平台120因具有向面方向的熱阻力高的第一層122,因此可有效防止熱經由平台120而被傳遞至面方向(分區A、分區C側)。結果,可減少輸入至加熱對象以外的半導體晶片12的熱量,從而可防止半導體晶片12的由熱所引起的劣化或變質。
此外,於對半導體晶片12進行接合(暫時壓接、正式壓接)時,使用封裝頭124對該半導體晶片12賦予壓力。於平台120僅具有面方向熱阻力高的第一層122的情況下,有可能無法耐受接合時被附加的負荷而基板30的平面度無法維持。因此,本例中,於第一層122之下設置有剛性較第一層122高的第二層123。藉此,即便於被附加有大的負荷的情況下,亦難以撓曲而可維持基板30的平面度。
接著,對使用該封裝裝置100的半導體裝置10的製造流程進行說明。於製造半導體裝置10的情況下,首先執行將基板30直接載置於平台120的載置步驟。繼而,執行使用封裝頭124將半導體晶片12接合於基板30的上表面的接合步驟。該接合步驟進而大致分為暫時壓接步驟、以及正式壓接步驟。
於暫時壓接步驟中,封裝頭124於全部的封裝分區34中,一邊對多個半導體晶片12進行暫時壓接一邊進行積層來形成暫時積層體STt。具體而言,封裝頭124預先加熱至第一溫度T1。於該狀態下,首先,使平台120進行水平移動,將一個封裝分區34配置於封裝頭124的正下方。然後,封裝頭124將由晶片搬送 單元104所搬送的半導體晶片12吸附保持於其前端後下降,並將該半導體晶片12載置於被封裝體(基板30或其他半導體晶片12)上,且以第一負荷F1進行按壓。藉此,半導體晶片12的NCF 20軟化,從而半導體晶片12被暫時壓接。重覆進行多次該暫時壓接作業,於一個封裝分區34上形成暫時積層體STt。若可於一個封裝分區34中形成暫時積層體STt,則平台120於水平方向上移動,以使另一封裝分區34位於封裝頭124的正下方。然後,再次使用封裝頭124進行暫時積層體STt的形成。以後,對全部的封裝分區34進行同樣的處理。
若可於全部的封裝分區34中形成暫時積層體STt,則繼而執行正式壓接步驟。於正式壓接步驟中,對多個暫時積層體STt依序進行正式壓接處理。具體而言,封裝頭124將溫度自第一溫度T1切換成第二溫度T2。另外,於該狀態下,使平台120進行水平移動,將一個封裝分區34配置於封裝頭124的正下方。若成為該狀態,則封裝頭124下降並以第二負荷F2對一個暫時積層體STt的上表面進行加壓。藉此,構成該一個暫時積層體STt的多個半導體晶片12被成批地正式壓接。
此處,與該正式壓接處理並行地,亦進行對配置有該一個暫時積層體STt的封裝分區34進行局部加熱的基板加熱步驟。具體而言,對作為對象的封裝分區34(封裝頭124的正下方領域)照射電磁波134,從而僅對該封裝分區34進行局部加熱。藉此,作為對象的封裝分區34的溫度上升,配置於該封裝分區上的半導 體晶片12亦被加熱。而且,藉此,能以暫時積層體STt的上層與下層的溫度差(積層體內溫度差△T)小的狀態進行正式壓接處理。結果,可進一步提高半導體晶片12的封裝品質。
若一個暫時積層體STt被正式壓接,則平台120於水平方向上進行移動以使另一封裝分區34位於封裝頭124的正下方。然後,再次進行使用封裝頭124的暫時積層體STt的加熱加壓以及利用電磁波134的基板30的局部加熱。而且,對全部的封裝分區34進行同樣的處理後,半導體裝置10的製造處理完成。
如由以上的說明而明確般,根據本說明書中揭示的半導體裝置10的製造方法,對基板30中的載置有作為加熱對象的半導體晶片12的封裝分區34照射電磁波134,藉此利用電磁波134僅對該封裝分區34進行加熱。藉此,能對作為加熱對象的半導體晶片12進行適當的加熱,另一方面能防止對並非加熱對象的半導體晶片12長時間地輸入熱。另外,於平台120中設置面方向上的熱阻力較厚度方向上的熱阻力高的第一層122、以及剛性高的第二層123,藉此基板30的平面度得到維持,並且可減少經由平台120向並非加熱對象的半導體晶片12的傳熱。結果,可進一步提高半導體晶片12的封裝品質。
再者,至此為止所說明的構成均為一例,可適宜進行變更。例如,於上述的說明中,作為基板30,使用了矽晶圓,但是亦可使用例如包含碳化矽(SiC)或氮化鎵(GaN)、藍寶石等的晶圓作為基板30。另外,亦可不使用晶圓,而使用樹脂基板或玻璃 基板等作為基板30。
此外,於此種基板、晶圓中,亦有難以進行利用電磁波134的加熱者。該情況下,可不將基板30直接載置於平台120,而於平台120與基板30之間配置對電磁波134進行吸收的中間構件140。中間構件140只要包含容易吸收電磁波134的材料則並無特別限定。因此,如圖7所示,中間構件140可為配置於平台120的上表面的大致平板狀構件。另外,作為另一形態,中間構件140若包含對電磁波134進行吸收的材料,則亦可如圖8所示般為被覆平台120的表面的被膜(例如黑體被膜)。
總之,藉由於平台120與基板30之間設置對電磁波134進行吸收的中間構件140,無論基板30的種類如何,可一直利用電磁波134對基板30進行加熱。再者,於設置中間構件140的情況下,平台120可為不具有第一層122的結構。例如,可設為於實心塊狀的平台120上載置中間構件140,並於該中間構件140上載置基板30。
另外,至此為止的說明中,將設置於平台120的第一層122作為形成有多個槽的部位進行了說明,但第一層122只要面方向上的熱阻力較厚度方向上的熱阻力高,則亦可為其他構成。例如,如圖9所示,第一層122與第二層123可為獨立構件。其中,於該情況下,亦理想的是第一層122以及第二層123均容易使電磁波134透射。另外,理想的是構成第一層122的原材料的熱傳導率為構成第二層123的原材料的熱傳導率以下。因此,例如, 於電磁波134的波長為1200nm以下且第二層123包含石英的情況下,第一層122可包含使近紅外線透射的光學用塑膠材料。
另外,作為另一形態,可為了使第一層122的面方向上的熱阻力高於厚度方向上的熱阻力而將第一層122加工成規定的形狀。再者,此處的所謂「加工」並不限定於利用銑刀等將材料的一部分去除之類的機械加工,亦包括塑膠射出成型之類的成形加工。因此,例如,藉由如上所述般第一層122中形成多個槽,或者如圖10所示般於層內形成孔,可使面方向上的熱阻力提高。該情況下,第一層122與第二層123可經一體化,亦可為獨立的構件。
另外,於上述的說明中,僅於對暫時積層體STt成批地進行正式壓接的情況下,利用電磁波134對基板30進行加熱,但若有必要,於暫時壓接時亦可利用電磁波134進行加熱。另外,於上述的說明中,僅例示了對多個半導體晶片12進行積層封裝的情況,但本說明書中揭示的技術當然亦可適用於並非進行積層封裝的情況。
另外,於上述的說明中,將封裝頭124、照射單元108均設為一個,但根據需要,該些亦可設為多個,於多個部位同時進行壓接處理、基板30的利用電磁波134的加熱
12‧‧‧半導體晶片
30‧‧‧基板
120‧‧‧平台
122‧‧‧第一層
123‧‧‧第二層
124‧‧‧封裝頭
134‧‧‧電磁波
135‧‧‧光圈
A、B、C‧‧‧分區
STc‧‧‧晶片積層體
STt‧‧‧暫時積層體

Claims (11)

  1. 一種封裝裝置,其將半導體晶片接合於作為基板或其他半導體晶片的被封裝體而製造半導體裝置,所述封裝裝置的特徵在於包括:平台,具有直接或經由中間構件載置所述基板的第一面、以及與所述第一面為相反側的第二面;封裝頭,相對於所述平台能夠進行相對移動,並將所述半導體晶片接合於所述被封裝體;以及照射單元,透射所述平台,並且自所述第二面側照射對所述基板或所述中間構件進行加熱的電磁波,所述平台具有形成於所述第一面側的第一層,所述第一層的面方向上的熱阻力大於厚度方向上的熱阻力,所述第一層是在上表面形成有多個槽或在層內形成有多個細孔的部位。
  2. 如申請專利範圍第1項所述的封裝裝置,其中所述基板熱壓接有多個所述半導體晶片,所述照射單元包括變更部件,所述變更部件對所述第一面中的所述電磁波的照射區域、以及所述第一面中的所述電磁波的照射位置的至少一者進行變更。
  3. 如申請專利範圍第1項所述的封裝裝置,其中所述封裝頭包括加熱器,所述加熱器對多個所述半導體晶片以暫時壓接的狀態經積層而成的暫時積層體進行加熱來進行正式壓接, 所述照射單元與所述加熱器一起對所述暫時積層體進行加熱。
  4. 如申請專利範圍第2項所述的封裝裝置,其中所述封裝頭包括加熱器,所述加熱器對多個所述半導體晶片以暫時壓接的狀態經積層而成的暫時積層體進行加熱來進行正式壓接,所述照射單元與所述加熱器一起對所述暫時積層體進行加熱。
  5. 如申請專利範圍第1項至第4項中任一項所述的封裝裝置,其中所述平台更具有較所述第一層而形成於更靠所述第二面側的第二層,所述第一層的面方向上的熱阻力較所述第二層大。
  6. 如申請專利範圍第5項所述的封裝裝置,其中所述第二層的剛性較所述第一層高。
  7. 如申請專利範圍第5項所述的封裝裝置,其中所述第二層是包含所述電磁波能夠透射的材料的實心部位。
  8. 如申請專利範圍第1項至第4項中任一項所述的封裝裝置,其中所述基板為矽晶圓,且被直接載置於所述平台,所述電磁波為波長1200nm以下,所述基板利用所述電磁波被局部加熱。
  9. 如申請專利範圍第1項至第4項中任一項所述的封裝裝置,其中所述基板經由所述中間構件被載置於所述平台,所述電磁波具有被所述中間構件吸收且不被所述基板吸收的 波長,藉由來自利用所述電磁波被局部加熱的所述中間構件的傳熱,對所述基板進行局部加熱。
  10. 一種半導體裝置的製造方法,其將半導體晶片接合於作為基板或其他半導體晶片的被封裝體而製造半導體裝置,所述半導體裝置的製造方法的特徵在於包括:載置步驟,將所述基板直接或經由中間構件載置於平台的第一面;接合步驟,利用相對於所述平台能夠進行相對移動的封裝頭,將所述半導體晶片接合於所述被封裝體;以及基板加熱步驟,與所述接合步驟的至少一部分並行地,自隔著所述平台而配置於所述封裝頭的相反側的照射單元照射被所述基板或所述中間構件吸收且透射所述平台的電磁波,藉此對所述基板或所述中間構件進行加熱,所述平台具有形成於所述第一面側的第一層,所述第一層的面方向上的熱阻力大於厚度方向上的熱阻力,所述第一層是在上表面形成有多個槽或在層內形成有多個細孔的部位。
  11. 如申請專利範圍第10項所述的半導體裝置的製造方法,其中所述接合步驟包括:暫時壓接步驟,利用所述封裝頭,在所述基板的多個部位依序形成暫時積層體,所述暫時積層體是一邊將一個以上的所述半 導體晶片暫時壓接於所述基板上一邊進行積層而成;以及正式壓接步驟,於所述暫時壓接步驟後,在所述基板的多個部位依序進行如下處理:所述處理是對一個暫時積層體自其上表面進行加熱加壓,藉此對構成所述暫時積層體的一個以上的所述半導體晶片成批地進行正式壓接,所述基板加熱步驟是與對所述半導體晶片成批地進行正式壓接的處理並行地,對所述基板或所述中間構件中的與所述正式壓接執行部位對應的部位照射所述電磁波。
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JP6349539B2 (ja) * 2016-09-30 2018-07-04 株式会社新川 半導体装置の製造方法および実装装置
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200522238A (en) * 2003-11-07 2005-07-01 Internat Display Technology Co Ltd Bonding method and apparatus
TW201031297A (en) * 2008-10-31 2010-08-16 Toray Industries Method for bonding electronic components and flexible film substrate and bonding device thereof
TW201705323A (zh) * 2015-03-03 2017-02-01 Toray Eng Co Ltd 安裝裝置及安裝方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5634742A (en) 1979-08-31 1981-04-07 Mitsubishi Plastics Ind Ltd Mat film of rigid vinyl chloride resin
GB2189944B (en) 1986-04-21 1990-06-06 Johnson Electric Ind Mfg Cooling in electric motors
JP3189331B2 (ja) * 1991-11-22 2001-07-16 セイコーエプソン株式会社 接合方法および接合装置
JP3833531B2 (ja) 2001-12-20 2006-10-11 Juki株式会社 ダイボンディング方法及びダイボンディング装置
JP4056978B2 (ja) * 2004-01-19 2008-03-05 株式会社新川 ダイボンディング方法及びその装置
KR101165029B1 (ko) * 2007-04-24 2012-07-13 삼성테크윈 주식회사 칩 가열장치, 이를 구비한 플립 칩 본더 및 이를 이용한플립 칩 본딩 방법
JP2011199184A (ja) * 2010-03-23 2011-10-06 Fujifilm Corp 基板実装装置及び基板実装方法
CN104145328A (zh) * 2012-03-07 2014-11-12 东丽株式会社 半导体装置的制造方法及半导体装置的制造装置
JP2014007328A (ja) * 2012-06-26 2014-01-16 Shibuya Kogyo Co Ltd ボンディング装置
JP6044885B2 (ja) * 2012-08-08 2016-12-14 パナソニックIpマネジメント株式会社 実装方法
WO2017077982A1 (ja) * 2015-11-05 2017-05-11 古河電気工業株式会社 ダイボンディング装置およびダイボンディング方法
US9916989B2 (en) * 2016-04-15 2018-03-13 Amkor Technology, Inc. System and method for laser assisted bonding of semiconductor die
WO2018148275A1 (en) * 2017-02-07 2018-08-16 Rohinni, LLC Apparatus and method for stacking semiconductor devices
US10636761B2 (en) * 2017-08-29 2020-04-28 Electronics And Telecommunications Reearch Institute Method of fabricating a semiconductor package

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200522238A (en) * 2003-11-07 2005-07-01 Internat Display Technology Co Ltd Bonding method and apparatus
TW201031297A (en) * 2008-10-31 2010-08-16 Toray Industries Method for bonding electronic components and flexible film substrate and bonding device thereof
TW201705323A (zh) * 2015-03-03 2017-02-01 Toray Eng Co Ltd 安裝裝置及安裝方法

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