TWI690036B - 封裝裝置以及半導體裝置的製造方法 - Google Patents

封裝裝置以及半導體裝置的製造方法 Download PDF

Info

Publication number
TWI690036B
TWI690036B TW107133910A TW107133910A TWI690036B TW I690036 B TWI690036 B TW I690036B TW 107133910 A TW107133910 A TW 107133910A TW 107133910 A TW107133910 A TW 107133910A TW I690036 B TWI690036 B TW I690036B
Authority
TW
Taiwan
Prior art keywords
semiconductor wafer
platform
intermediate body
electromagnetic wave
substrate
Prior art date
Application number
TW107133910A
Other languages
English (en)
Other versions
TW201921611A (zh
Inventor
高野徹朗
中村智宣
前田徹
Original Assignee
日商新川股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商新川股份有限公司 filed Critical 日商新川股份有限公司
Publication of TW201921611A publication Critical patent/TW201921611A/zh
Application granted granted Critical
Publication of TWI690036B publication Critical patent/TWI690036B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731—Location prior to the connecting process
    • H01L2224/73101—Location prior to the connecting process on the same surface
    • H01L2224/73103—Bump and layer connectors
    • H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75261—Laser
    • H01L2224/75262—Laser in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75283—Means for applying energy, e.g. heating means by infrared heating, e.g. infrared heating lamp
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75753—Means for optical alignment, e.g. sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/75981—Apparatus chuck
    • H01L2224/75986—Auxiliary members on the pressing surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/75981—Apparatus chuck
    • H01L2224/75986—Auxiliary members on the pressing surface
    • H01L2224/75987—Shape of the auxiliary member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/75981—Apparatus chuck
    • H01L2224/75986—Auxiliary members on the pressing surface
    • H01L2224/75988—Material of the auxiliary member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8113—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/81132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/81204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/8123—Polychromatic or infrared lamp heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/83204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83868—Infrared [IR] curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/9205—Intermediate bonding steps, i.e. partial connection of the semiconductor or solid-state body during the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9211—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06565—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having the same size and there being no auxiliary carrier between the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

將半導體晶片100接合於基板110或其他半導體晶片100即被封裝體而製造半導體裝置的封裝裝置10包括：平台30，具有第一面、及與所述第一面為相反側的第二面；中間體40，介於所述第一面與所述基板110之間；封裝頭50，相對於所述平台30而可相對移動，將所述半導體晶片100接合於所述被封裝體；以及照射單元18，自所述平台30的第二面側向所述中間體40照射透過所述平台30且被所述中間體40吸收的電磁波62，藉由所述中間體吸收所述電磁波而將所述基板加熱。

Description

封裝裝置以及半導體裝置的製造方法
本說明書揭示一種將半導體晶片接合於基板或其他半導體晶片即被封裝體而製造半導體裝置的封裝裝置、以及半導體裝置的製造方法。
於將半導體晶片接合於基板或其他半導體晶片上的情形時，通常利用經加熱的封裝頭對半導體晶片進行加熱加壓。然而，僅利用來自封裝頭的熱難以將成為接合對象的半導體晶片適當加熱。尤其近年來，為了半導體裝置的進一步高功能化、小型化，提出有將多個半導體晶片積層並進行封裝。於該情形時，為了縮短封裝處理的時間，有時將多個半導體晶片暫時壓接並且積層後，將該多個半導體晶片一起正式壓接。即，有時將多個半導體晶片以暫時壓接狀態積層而形成暫時積層體後，利用經加熱的封裝頭將該暫時積層體的上表面加熱加壓而正式壓接。於該情形時，僅利用來自封裝頭的熱難以適當加熱至暫時積層體的最下層的半導體晶片。因此，先前以來，於將半導體裝置接合時，將載置有基板的平台整體加熱。由此，可自半導體晶片的上下兩側進行加熱。
[現有技術文獻] [專利文獻]
[專利文獻1]國際公開第2010/050209號
[專利文獻2]日本專利第3833531號公報
[專利文獻3]日本專利第4001341號公報
然而，於將平台整體加熱的情形時，會對配置於與接合對象(加熱對象)的半導體晶片不同的部位的半導體晶片亦持續進行加熱。結果，會對半導體晶片長時間輸入熱。此種長期的熱輸入導致設於半導體晶片、尤其是半導體晶片的底面的非導電性膜(Non Conductive Film)等樹脂的劣化，甚至導致封裝品質的降低。
為了避免該問題，亦想到於平台的多個部位設置脈波加熱器(pulse heater)等局部加熱用的加熱器，僅將必要部位的加熱器接通。然而，於將此種局部加熱用的加熱器嵌埋於平台中的情形時，難以維持平台的平坦度，甚至導致封裝品質的降低。
另外，於專利文獻1~3中揭示有藉由自平台的背側照射的光對基板進行光加熱的技術，但該些技術中，可應用的基板種類均有限。
因此，本說明書提供一種與基板的種類無關而可將接合對象的半導體晶片適當加熱的封裝裝置、以及半導體裝置的製造方法。
本案中揭示的封裝裝置將半導體晶片接合於基板或其他半導體晶片即被封裝體而製造半導體裝置，且所述封裝裝置的特徵在於包括：平台，具有第一面、及與所述第一面為相反側的第二面；中間體，介於所述第一面與所述基板之間；封裝頭，相對於所述平台而可相對移動，將所述半導體晶片接合於所述被封裝體；以及照射單元，自所述平台的第二面側向所述中間體照射透過所述平台且被所述中間體吸收的電磁波，藉由所述中間體吸收所述電磁波而將所述基板加熱。
此處，所述中間體亦可具有抑制面方向上的傳熱的隔熱部。另外，亦可於所述中間體中含有由在水平方向上延伸的槽或孔形成的間隙部。
另外，所述中間體亦可為自所述第一面側起，依序將吸收所述電磁波的吸收層、使所述電磁波透過且傳熱性高的傳熱層、及包含使所述電磁波透過且傳熱性低的材料的隔熱層於厚度方向上積層的多層結構。
另外，亦可使所述電磁波包含多個波段，所述中間體包含將針對所述多個波段分別設置的多個吸收層於厚度方向上積層的多層結構，所述多個吸收層是以對應的波段越長則越遠離所述平台的方式積層。
另外，亦可使所述基板上熱壓接有多個所述半導體晶片，所述照射單元包括變更所述電磁波的照射區域、及所述電磁 波的照射位置中的至少一者的變更機構。
另外，亦可使所述封裝頭包括對將多個所述半導體晶片以經暫時壓接的狀態積層的暫時積層體進行加熱而正式壓接的加熱器，藉由利用所述照射單元照射所述中間體，而將所述暫時積層體與所述加熱器一併加熱。
本說明書中揭示的半導體裝置的製造方法將半導體晶片接合於基板或其他半導體晶片即被封裝體而製造半導體裝置，且所述半導體裝置的製造方法的特徵在於包括：載置步驟，於經載置於平台的第一面的中間體上載置所述基板；接合步驟，利用相對於所述平台而可相對移動的封裝頭，將所述半導體晶片接合於所述被封裝體；以及中間體加熱步驟，於所述接合步驟的至少一部分的同時，自隔著所述平台而配置於所述封裝頭的相反側的照射單元，照射被所述中間體吸收且透過所述平台的電磁波，由此將所述中間體加熱。
根據本說明書中揭示的技術，於平台與基板之間設有吸收電磁波的中間體，故而與基板的種類無關而可將中間體、甚至與中間體接觸的基板加熱，結果可將接合對象的半導體晶片適當加熱。
10:封裝裝置
12:晶片供給單元
14:晶片搬運單元
16:接合單元
18:照射單元
20:控制部
22:上頂部
24:晶粒拾取器
26:移送頭
28:旋轉台
30:平台
40:中間體
42:隔熱部
44:被覆膜
46:吸收層
46a:第一吸收層
46b:第二吸收層
46c:第三吸收層
48:傳熱層
49:隔熱層
50:封裝頭
60:電磁波源
61:反射面
62:電磁波
63:光圈
100:半導體晶片
102、104:電極端子
106:凸塊
108:非導電性膜(NCF)
110:基板
112:電極
A、B、C:區塊
Ra、Rb:旋轉軸
STc:晶片積層體
STt:暫時積層體
TE:切割膠帶
圖1為表示封裝裝置的構成的圖。
圖2為表示半導體裝置的一例的圖。
圖3為表示半導體晶片的一例的圖。
圖4為表示局部加熱基板的狀況的圖。
圖5為表示照射單元的另一例的圖。
圖6為表示中間體的其他構成的圖。
圖7為表示中間體的其他構成的圖。
圖8為表示中間體的其他構成的圖。
圖9為表示中間體的其他構成的圖。
以下，參照圖式對半導體裝置的製造方法以及封裝裝置10進行說明。圖1為表示封裝裝置10的構成的圖。該封裝裝置10為於基板110上封裝半導體晶片100的裝置。該封裝裝置10成為尤其適於將多個半導體晶片100積層並進行封裝的情形的構成。然而，該封裝裝置10亦當然可應用於不積層半導體晶片100的情形。另外，該封裝裝置10成為尤其適於基板110使後述的電磁波62透過或反射的情形的構成。然而，基板110未必一定要使電磁波62透過或反射，基板110亦可為容易吸收電磁波62的結構。
另外，以下的說明中，於積層多個半導體晶片100而成的積層體中，將構成積層體的多個半導體晶片100為暫時壓接狀態者稱為「暫時積層體STt」，將多個半導體晶片100為正式壓接狀態者稱為「晶片積層體STc」而加以區分。
封裝裝置10包括晶片供給單元12、晶片搬運單元14、接合單元16、照射單元18以及控制該些單元的驅動的控制部20。晶片供給單元12為自晶片供給源取出半導體晶片100，並供給於晶片搬運單元14的部位。該晶片供給單元12包括上頂部22、晶粒拾取器(die picker)24及移送頭26。
晶片供給單元12中，多個半導體晶片100載置於切割膠帶(dicing tape)TE上。此時，半導體晶片100是以凸塊106朝向上側的面朝上(face up)狀態載置。上頂部22自該多個半導體晶片100中僅將一個半導體晶片100保持面朝上狀態向上方上頂。晶粒拾取器24於其下端吸引保持並接受由上頂部22上頂的半導體晶片100。接受了半導體晶片100的晶粒拾取器24以該半導體晶片100的凸塊106朝向下方的方式，即以半導體晶片100成為面朝下(face down)狀態的方式當場旋轉180度。若成為該狀態，則移送頭26自晶粒拾取器24接受半導體晶片100。
移送頭26可於上下方向及水平方向上移動，於其下端可吸附保持半導體晶片100。若晶粒拾取器24旋轉180度而半導體晶片100成為面朝下狀態，則移送頭26於其下端吸附保持該半導體晶片100。然後，移送頭26於水平方向及上下方向上移動，向晶片搬運單元14移動。
晶片搬運單元14具有以鉛直的旋轉軸Ra為中心而旋轉的旋轉台28。移送頭26於旋轉台28的既定位置載置半導體晶片100。載置有半導體晶片100的旋轉台28以旋轉軸Ra為中心旋 轉，由此將該半導體晶片100搬運至與晶片供給單元12位於相反側的接合單元16。
接合單元16包括支持基板110的平台30、載置於平台30上的中間體40、以及將半導體晶片100安裝於基板110的封裝頭50。平台30具有支持基板110的上表面(第一面)、及與該第一面為相反側的下表面(第二面)。另外，平台30可於水平方向上移動，調整所載置的基板110與封裝頭50的相對位置關係。平台30如下文中將詳述，是由可使自照射單元18照射的電磁波62透過的材料所構成。因此，於電磁波62為可見光或紅外線光的情形時，平台30例如可利用石英、氟化鎂、鍺等而構成。
於平台30的上表面(第一面)設有中間體40。該中間體40為載置基板110的板狀構件。換言之，中間體40介於平台30與基板110之間。中間體40可不可分離地固著於平台30，亦可視需要而可自平台30卸除。另外，中間體40可為單層結構，亦可為多層結構。其中，無論為單層、多層，中間體40均具有至少一層以上的可吸收自照射單元18照射的電磁波62的吸收層。
封裝頭50於基板110上積層多個半導體晶片100並進行封裝。封裝頭50可於其下端保持半導體晶片100，另外可進行繞鉛直的旋轉軸Rb的旋轉及升降。該封裝頭50將半導體晶片100壓接於基板110或其他半導體晶片100上。具體而言，封裝頭50以將所保持的半導體晶片100按壓於基板110等的方式下降，由此進行半導體晶片100的暫時壓接或正式壓接。該封裝頭50中內 置有溫度可變的加熱器(未圖示)，封裝頭50於實行暫時壓接時經加熱至第一溫度T1，於實行正式壓接時經加熱至高於第一溫度T1的第二溫度T2。另外，封裝頭50於實行暫時壓接時對半導體晶片100附加第一負重，於實行正式壓接時對半導體晶片100附加第二負重。
於封裝頭50的附近設有相機(未圖示)。於基板110及半導體晶片100分別設有成為定位基準的對準標記(alignment mark)。相機以反映出該對準標記的方式對基板110及半導體晶片100進行攝像。控制部20根據由該攝像所得的圖像資料，把握基板110及半導體晶片100的相對位置關係，視需要調整封裝頭50的繞旋轉軸Rb的旋轉角度及平台30的水平位置。
照射單元18藉由自平台30的背側照射特定波長的電磁波62而將基板110局部地加熱。照射單元18至少具有照射電磁波62的電磁波源60。以下的說明中，列舉電磁波62為紅外線雷射光的情形為例進行說明。然而，電磁波62只要具有容易透過平台30且容易被中間體40吸收的波長，則並無特別限定。因此，電磁波62例如可使用紅外線、可見光線等。另外，電磁波62可僅具有單一波長，亦可具有多個波長。進而，電磁波源60只要可照射所需波長、功率的電磁波，則並無特別限定，例如可使用雷射振盪器或雷射二極體(Laser Diode，LD)、發光二極體(Light Emitting Diode，LED)、鹵素燈、氙氣燈等。照射單元18亦可進而具有用以變更電磁波62的照射區域、及照射位置中的至少一者 的變更機構。變更機構例如亦可具有光圈或透鏡、反射鏡、光纖等光學構件、或者驅動該等光學構件而使電磁波掃描的驅動構件等。
控制部20控制各部的驅動，例如包括進行各種運算的中央處理單元(Central Processing Unit，CPU)、及記憶各種資料或程式(program)的記憶部。控制部20依照記憶部中記憶的程式而驅動各部，實行半導體晶片的封裝處理。例如，控制部20驅動封裝頭50及平台30，將半導體晶片封裝於基板110。另外，控制部20於後述的正式壓接處理的同時，驅動照射單元18而將基板110局部地加熱。
繼而，參照圖3、圖4對利用該封裝裝置製造的半導體裝置進行說明。圖3為表示半導體裝置的一例的示意圖，圖4為半導體晶片100的示意圖。再者，圖3中，半導體晶片100與基板110的邊界、及兩個半導體晶片100的邊界的粗線表示經正式壓接。
本例中操作的半導體裝置如圖2所示，於基板110的上表面積層封裝有多個(圖示例中為4個)半導體晶片100。本例中，基板110包含使作為電磁波62的紅外線雷射光透過的材質，例如藍寶石玻璃等。於基板110上設定有以格子狀排列的多個封裝區塊。於各封裝區塊中積層封裝有多個半導體晶片100。於各封裝區塊的表面，於與要封裝的半導體晶片100的凸塊106對應的位置，形成有電極112。
繼而，對半導體晶片100的構成加以說明。如圖3所示，於半導體晶片100的上下表面形成有電極端子102、104。另外，於半導體晶片100的單面，與電極端子102相連而形成有凸塊106。凸塊106包含導電性金屬，以既定的熔融溫度Tm熔融。
另外，於半導體晶片100的單面，以覆蓋凸塊106的方式貼附有非導電性膜(以下稱為「NCF」)108。NCF 108作為將半導體晶片100、與基板110或其他半導體晶片100接著的接著劑發揮功能，包含非導電性的熱硬化性樹脂，例如聚醯亞胺樹脂(polyimide resin)、環氧樹脂(epoxy resin)、丙烯酸樹脂(acrylic resin)、苯氧樹脂(phenoxy resin)、聚醚碸樹脂(polyether sulfone)等。該NCF 108的厚度高於凸塊106的平均高度，凸塊106被該NCF 108大致完全覆蓋。NCF 108於常溫下為固體膜，但若超過既定的軟化開始溫度Ts，則逐漸可逆地軟化而發揮流動性，若超過既定的硬化開始溫度Tt，則不可逆地開始硬化。
此處，軟化開始溫度Ts低於硬化開始溫度Tt及凸塊106的熔融溫度Tm。暫時壓接用的第一溫度T1高於該軟化開始溫度Ts，且低於熔融溫度Tm及硬化開始溫度Tt。另外，正式壓接用的第二溫度T2高於熔融溫度Tm及硬化開始溫度Tt。即，成為Ts<T1<(Tm、Tt)<T2。
於將半導體晶片100暫時壓接於基板110或下側的半導體晶片100(以下，於將兩者不區分的情形時稱為「被封裝體」)時，將封裝頭50加熱至第一溫度T1後將半導體晶片100加壓。 此時，半導體晶片100的NCF 108因來自封裝頭50的傳熱而被加熱至第一溫度T1附近，軟化而具有流動性。而且，藉此NCF 108可流入至半導體晶片100與被封裝體的間隙中，可靠地填埋該間隙。
於將半導體晶片100正式壓接於被封裝體時，將封裝頭50加熱至第二溫度T2後，將半導體晶片100加壓。此時，半導體晶片100的凸塊106及NCF 108因來自封裝頭50的傳熱而被加熱至第二溫度T2附近。藉此，凸塊106熔融，可焊接於相向的被封裝體。另外，藉由該加熱，NCF 108以填埋半導體晶片100與被封裝體的間隙的狀態硬化，因此將半導體晶片100與被封裝體牢固地固定。即，正式壓接時，半導體晶片100熱壓接於基板110等。
此處，將封裝頭50的溫度自第一溫度T1切換至第二溫度T2或自第二溫度T2切換至第一溫度T1耗費一定的時間。因此，為了縮短半導體裝置的製造時間，有效的是減少封裝頭50的溫度的切換次數。因此，於將多個半導體晶片100積層封裝的情形時，提出有將所有半導體晶片100暫時壓接後，將該經暫時壓接的半導體晶片100正式壓接的製程。具體而言，首先使用經加熱至第一溫度T1的封裝頭50，於多個封裝區塊中形成將多個半導體晶片100暫時壓接並且積層而成的暫時積層體STt。繼而，利用經切換成第二溫度T2的封裝頭50將暫時積層體STt的上表面加壓，藉此將構成暫時積層體STt的多個半導體晶片100一起正 式壓接。藉由以該順序逐漸封裝半導體晶片100，可大幅減少封裝頭50的溫度的切換次數，從而可大幅縮短半導體裝置的製造時間。
且說，如至此為止的說明所表明般，為了適當地封裝半導體晶片100，期望將封裝對象的半導體晶片100加熱至與其處理過程相應的適當溫度。例如，於進行正式壓接時，半導體晶片100必須加熱至NCF 108的硬化開始溫度Tt以上、且凸塊106的熔融溫度Tm以上。然而，僅利用來自封裝頭50的熱，有時亦難以將所有半導體晶片100加熱至適當溫度。尤其於將構成暫時積層體STt的多個半導體晶片100一起正式壓接的情形時，僅利用來自封裝頭50的熱，難以將最下層的半導體晶片100適當加熱。
另外，期望一個暫時積層體STt中，最上層的半導體晶片100的溫度與最下層的半導體晶片100的溫度差(以下稱為「積層體內溫度差」)△T小。若積層體內溫度差△T大，則會導致封裝品質的不均一。然而，僅利用來自封裝頭50的熱，難以減小積層體內溫度差△T。
因此，先前大多於載置基板110的平台30中內置加熱器，亦將基板110整體加熱。根據該構成，暫時積層體STt亦自下側進行加熱，故而最下層的半導體晶片100亦容易加熱至適當溫度，另外，可某種程度上減小積層體內溫度差△T。
然而，於將平台30整體加熱的情形時，當然其溫度必須充分低於NCF 108的硬化開始溫度Tt。其原因在於，若平台30的溫度高於硬化開始溫度Tt，則暫時壓接後、正式壓接前的半導 體晶片100的NCF 108熱硬化。因此，平台30不大能設為高溫，難以充分減小積層體內溫度差△T。
另外，即便使平台30為低於硬化開始溫度Tt的低溫，亦於對該平台30整體進行加熱的情形時，會對基板110上的經暫時壓接或正式壓接的半導體晶片100長時間持續輸入熱。此種長期間的熱輸入導致半導體晶片100、特別是NCF 108的劣化，甚至封裝品質的劣化。
因此，如上文已述，本說明書中揭示的封裝裝置10於平台30的下側配置照射單元18，利用電磁波62將基板110局部地加熱。圖4為表示將基板110局部地加熱的狀況的想像圖。再者，圖4中，為了容易地理解而使平台30、中間體40、基板110的厚度與實際不同，但實際上平台30更厚，中間體40及基板110更薄。另外，圖4中圖示有三個封裝區塊，但以下的說明中，將該些封裝區塊自圖式左側開始依序稱為「區塊A」、「區塊B」、「區塊C」而加以區分。另外，圖4中，半導體晶片100與被封裝體(基板110或其他半導體晶片100)的邊界的粗線表示經正式壓接，虛線表示經暫時壓接。因此，圖4中，區塊A的積層體為經正式壓接的晶片積層體STc，區塊B、C的積層體為暫時壓接後且正式壓接前的暫時積層體STt。圖4表示將區塊B的暫時積層體STt正式壓接時的狀況。
如圖4所示，於將一個暫時積層體STt正式壓接時，利用經加熱至第二溫度T2的封裝頭50將該暫時積層體STt加熱、 加壓。另外，對中間體40中與配置有正式壓接對象的暫時積層體STt的區塊B對應的範圍照射電磁波62，利用電磁波62將該與區塊B對應的範圍加熱。
此處，如上文已述，本例中電磁波62為紅外線雷射光，平台30包含使電磁波62透過的材料。另外，於平台30與基板110之間，設有具有容易吸收電磁波62(紅外線雷射光)的吸收層的中間體40。該構成中，若自平台30的下表面側(第二面側)對中間體40中與區塊B對應的範圍照射電磁波62，則該電磁波62透過平台30而被中間體40吸收。被中間體40吸收的電磁波62的能量被變換為熱，將中間體40中電磁波62的照射範圍加熱。而且，中間體40的一部分(照射範圍)經局部地加熱，由此與該中間體40接觸的基板110亦經局部地加熱。
此處，如上所述，平台30需要使電磁波62透過，故而平台30較理想為由電磁波62的透過率高的材料所形成。另外，平台30亦期望缺乏傳熱性的材料。其原因在於，防止藉由電磁波62而加熱的中間體40的熱經由平台30而傳熱至其他封裝區塊或外部。為了滿足此種條件，平台30例如較理想為由石英或氟化鋇、氟化鎂、氟化鈣等所構成。
另外，電磁波62只要透過平台30且被中間體40吸收，則其波長並無特別限定。然而，於波長過短(例如紫外區域)的情形時，生成該波長的光源的輸出通常低。於欲獲得適於加熱的輸出的情形時，電磁波62的波長大於可見光、即為750nm以上 的情況作為光源而理想。然而，當然若能以充分的輸出照射，則電磁波62亦可為可見光(小於750nm)。
電磁波62的照射範圍較理想為與半導體晶片100的外形大致為相同範圍。另外，照射單元18為了僅對所需範圍照射電磁波62，較理想為具有變更電磁波62的照射範圍及照射位置中的至少一者的變更機構。變更機構的構成可想到各種，變更機構例如亦可具有使電磁波源60相對於平台30的位置移動的移動機構。作為該移動機構，例如包含使平台30移動的XY移動機構。另外，變更機構為了僅對所需的照射範圍進行照射，例如亦可如圖4所示般具有光圈63，該光圈63較照射範圍而充分大徑，設於電磁波62的路徑中途，形成有與照射範圍對應的開口。該光圈63亦可根據成為對象的半導體裝置而適當更換。
另外，作為其他形態，亦可於基板110附近利用較照射範圍而充分小徑的電磁波62對照射範圍進行掃描。為了於基板110附近獲得小徑的電磁波62，可使用出射小徑的平行電磁波(例如平行光)的電磁波源60，亦可使用光學構件(透鏡等)使大徑的電磁波62於基板110周邊聚焦。另外，為了使電磁波62掃描，可移動電磁波源60自身，亦可移動使電磁波62彎曲的反射鏡等。作為移動反射鏡的形態，例如亦可使用利用電流馬達(galvano motor)使兩個以上的反射鏡驅動的電流鏡機構。另外，亦可使用線圈馬達(coil motor)或凸輪(cam)等作為驅動反射鏡或電磁波源60的機構。另外，於自電磁波源60照射的電磁波62的指向 性低，電磁波62向各種方向行進的情形時，亦可如圖5所示，設置使電磁波62向所需方向折射並聚光的反射面61。於圖5的例子中，於大致蛋形狀的空洞的內表面蒸鍍金屬等而形成曲面的反射面61，將來自電磁波源60的電磁波62彙聚於既定的一點。
另外，作為其他形態，為了僅對所需照射範圍進行照射，亦可使用各種光學構件使電磁波62的分佈(尺寸、形狀等)變化。例如，亦可使用具有幾何學射束成形功能的矩形芯纖(core fiber)。另外，作為其他形態，亦可於電磁波62的路徑中途配置於筒體的內表面貼附有多個反射鏡的萬華鏡(kaleidoscope)。進而，亦可代替所述光學構件，或除此以外使用繞射透鏡或複眼透鏡(fly-eye lens)、其他光學透鏡，使電磁波62的分佈(profile)變化。
另外，圖1中僅圖示有一個電磁波源60，但電磁波源60亦可設有兩個以上，該兩個以上的電磁波源60可彼此為同種電磁波源，亦可為互不相同的種類的電磁波源。另外，自電磁波源60照射的電磁波的波長可大致單一，亦可為具有某程度的幅度的多個波長。另外，電磁波62的功率較理想為可將基板110以所需時間加熱至所需溫度。例如，於將暫時積層體STt一起正式壓接時，期望將最下層的半導體晶片100加熱至與最上層的半導體晶片100相同的溫度。通常，正式壓接的實行時間為幾秒，因此電磁波62較理想為具有於該正式壓接的實行中(幾秒以內)可將基板110加熱至接近第二溫度T2的程度的功率。
如上所述，中間體40為至少具有容易吸收電磁波62的吸收層46的板狀構件。圖4中，例示了僅具有容易吸收電磁波62的吸收層46的單層結構的中間體40。再者，於電磁波62為可見光或紅外線的情形時，容易吸收電磁波62的材料例如可列舉：碳、類鑽碳(diamond-like carbon，DLC)、碳化矽(SiC)、氮化矽(SiN)、氧化鋁(Al2O3)、陶瓷、黑色鎳、黑色鉻以及分散有該些吸收材料的樹脂等。
關於該中間體40，當然期望有效率地吸收所照射的電磁波62。另外，於封裝處理時，期望正式壓接對象的暫時積層體STt(圖4的例子中為區塊B的暫時積層體STt)經加熱，另一方面，期望熱不傳至其他晶片積層體STc以及暫時積層體STt(圖4中的區塊A及區塊C的積層體)。因此，中間體40較理想為熱難以傳至成為對象的區塊以外、或照射範圍以外的結構。
具體而言，中間體40如圖6所示，亦可設為以下結構，即，具有抑制面方向上的傳熱的隔熱部42。該隔熱部42例如可為填充有隔熱材料的部位，亦可為由槽或孔形成的間隙部。於將隔熱部42設為由孔形成的間隙的情形時，該孔亦可用作用以吸引保持基板110的吸附孔。
隔熱部42的配設間距可與封裝區塊的配設間距大致相同，亦可與封裝區塊的配設間距相比而充分小。於使隔熱部42的配設間距與封裝區塊的配設間距相同的情形時，隔熱部42為如圖6所示，較理想形成於與封裝區塊的邊界對應的位置。藉由設為該 構成，而有效地防止熱向鄰接的封裝區塊、或加熱對象以外的半導體晶片100的輸入。另外，於設為該構成，且由傳熱性高的材料構成中間體40的情形時，於照射對象的區塊中熱容易均等地分散，故而容易將加熱對象的半導體晶片100整體均等地加熱。
另外，於使隔熱部42的配設間距與封裝區塊的配設間距相比而充分小的情形時，有效地防止向實際照射有電磁波62的範圍以外的傳熱。結果，有效地防止熱向加熱對象以外的半導體晶片100的輸入。另外，於該情形時，無需根據基板110的種類(封裝區塊的配設間距的差異)而更換中間體40，故而中間體40的通用性提高。
另外，亦可不設置隔熱部42，而使中間體40整體的傳熱性降低。若中間體40的傳熱性低，則難以傳熱至照射有電磁波62的部位以外，故而可有效地防止向對象外的半導體晶片100的熱輸入。作為使中間體40整體的傳熱性降低的方法，只要由低傳熱材料(例如分散有吸收體的樹脂等)構成中間體40即可。另外，作為其他形態，亦可將中間體40的壁厚減薄而降低中間體40整體的傳熱性。
另外，至此為止的說明中，將中間體40說明作板狀構件，但中間體40如圖7所示，亦可為被覆平台30的表面的被覆膜44(例如黑體被膜)。於該情形時，平台30的表面亦可為平坦面，但亦可如圖7所示般形成有槽。藉由形成該槽，面方向上的傳熱性降低，可防止向對象外的半導體晶片100的熱輸入。
另外，中間體40亦可設為將多個層於厚度方向上積層的多層結構。例如，中間體40如圖8所示，亦可設為自平台30側起依序積層有隔熱層49、傳熱層48及吸收層46的多層結構。吸收層46為由容易吸收電磁波62的材料所構成的層。傳熱層48為由容易透過電磁波62且傳熱性高的材料所構成。於電磁波62為紅外線的情形時，傳熱層48例如由矽等所形成。關於該傳熱層48，較理想為設有抑制向加熱對象外的區域的傳熱的隔熱部42。而且，藉由設置該傳熱層48，即便吸收層46的傳熱性低，亦可於加熱對象範圍內使熱迅速分散，故而可將加熱對象的半導體晶片100整體均等地加熱。
隔熱層49包含使電磁波62透過、另一方面隔熱性高的材料，例如玻璃等。藉由在傳熱層48與平台30之間配置隔熱層49，而防止吸收層46中產生的熱流出至平台30，可提高熱效率。
另外，於電磁波62包含多個波長的情形時，吸收層46亦可設為具有與各波長分別對應的層的多層結構。例如，於電磁波62包含某波長λ1、λ2、λ3(λ1<λ2<λ3)的電磁波的情形時，吸收層46如圖9所示，亦可設為將吸收感度於波長λ1前後高的第一吸收層46a、吸收感度於波長λ2前後高的第二吸收層46b、及吸收感度於波長λ3前後高的第三吸收層46c積層的多層結構。藉由如此般針對各波段分別設置吸收感度高的吸收層，可更有效率地產生熱。另外，於該情形時，較理想為以越是與長波長對應的吸收層則越遠離平台30的順序積層。所述例子中，較理想為自 平台30側起以按第一吸收層46a、第二吸收層46b及第三吸收層46c的順序排列的方式積層。其原因在於，越是長波長的電磁波，傳播過程中的損耗越少，可實現長距離的傳播。
另外，至此為止說明的中間體40的構成可適當組合。例如，圖6、圖7中，將中間體40記載為單層結構，但亦可將圖6、圖7所圖示的中間體40變更為圖8或圖9所示般的多層結構。另外，圖8中，將吸收層46圖示為單層，但圖8的吸收層46亦可進而設為圖9所示般的多層結構。
無論如何，藉由在平台30與基板110之間設置吸收電磁波62而發熱的中間體40，即便基板110為容易使電磁波62透過、反射的材質，亦可將基板110局部地加熱。而且，藉由僅於進行正式壓接處理的封裝區塊中進行此種局部加熱(電磁波62的照射)，可將最下層的半導體晶片100亦適當地加熱，獲得良好的封裝品質。另外，藉由對進行正式壓接處理的封裝區塊進行局部加熱，可降低積層體內溫度差△T，可使構成一個積層體的多個半導體晶片100的封裝品質均一化。
另一方面，於不進行正式壓接處理的封裝區塊中，不照射電磁波62，故而可有效地防止該封裝區域的溫度上升、甚至並非正式壓接處理的對象的半導體晶片100的由熱引起的劣化或變質。
繼而，對使用該封裝裝置10的半導體裝置的製造流程進行說明。於製造半導體裝置的情形時，首先實行將基板110載 置於中間體40上的載置步驟。繼而，實行使用封裝頭50於基板110的上表面接合半導體晶片100的接合步驟。該接合步驟進而大致分為暫時壓接步驟與正式壓接步驟。
於暫時壓接步驟中，封裝頭50於所有封裝區塊中將多個半導體晶片100暫時壓接並且積層，形成暫時積層體STt。具體而言，封裝頭50預先加熱至第一溫度T1。於該狀態下，首先使平台30水平移動，將一個封裝區塊配置於封裝頭50的正下方。繼而，封裝頭50於其前端吸引保持由晶片搬運單元14所搬運的半導體晶片100後下降，將該半導體晶片100載置於被封裝體(基板110或其他半導體晶片100)上，以第一負重擠壓。藉此，半導體晶片100的NCF 108軟化，將半導體晶片100暫時壓接。將該暫時壓接作業重覆多次，於一個封裝區塊中形成暫時積層體STt。若於一個封裝區塊中形成了暫時積層體STt，則平台30以另一封裝區塊位於封裝頭50的正下方的方式於水平方向上移動。然後，再次使用封裝頭50進行暫時積層體STt的形成。以下，對所有封裝區塊進行同樣的處理。
若於所有封裝區塊中形成了暫時積層體STt，則繼而實行正式壓接步驟。正式壓接步驟中，對多個暫時積層體STt依序進行正式壓接處理。具體而言，封裝頭50將溫度自第一溫度T1切換至第二溫度T2。另外，於該狀態下使平台30水平移動，將一個封裝區塊配置於封裝頭50的正下方。若成為該狀態，則封裝頭50下降，以第二負重對一個暫時積層體STt的上表面加壓。藉 此，將構成該一個暫時積層體STt的多個半導體晶片100一起正式壓接。
此處，於該正式壓接處理的同時，亦進行將配置有該一個暫時積層體STt的封裝區塊局部地加熱的加熱步驟。具體而言，對中間體40中與成為對象的封裝區塊(封裝頭50的正下方區域)對應的範圍照射電磁波62，僅將該對應的範圍局部地加熱。藉此，中間體40中對象範圍(照射範圍)的溫度上升，與該中間體40接觸的基板110及基板110上的半導體晶片100亦經加熱。而且，藉此可於暫時積層體STt的上層與下層的溫度差(積層體內溫度差△T)小的狀態下進行正式壓接處理。結果，可進一步提高半導體晶片100的封裝品質。
若將一個暫時積層體STt正式壓接，則平台30以另一封裝區塊位於封裝頭50的正下方的方式於水平方向上移動。繼而，再次進行使用封裝頭50的暫時積層體STt的加熱加壓、及利用電磁波62的中間體40的局部加熱。然後，若對所有封裝區塊進行同樣的處理，則半導體裝置的製造處理結束。
如以上的說明所表明，根據本說明書中揭示的半導體裝置的製造方法，藉由對中間體40中與載置有加熱對象的半導體晶片100的封裝區塊對應的部分照射電磁波62，而利用電磁波62僅將該封裝區塊加熱。藉此，可將加熱對象的半導體晶片100適當加熱，另一方面，可防止熱長時間輸入至並非加熱對象的半導體晶片100。另外，電磁波62被中間體40吸收，故而可與基板 110的材料無關地(即便基板110容易吸收、反射電磁波62亦)可靠地局部加熱。
再者，至此為止說明的構成均為一例，亦可適當變更。例如，所述說明中，使用包含藍寶石玻璃的基板作為基板110，但如上所述，本說明書中揭示的封裝裝置中，基板110的材質並無限定。
另外，所述說明中，僅於將暫時積層體STt一起正式壓接的情形時，利用電磁波62將基板110加熱，但若有必要，則於暫時壓接時亦可利用電磁波62進行加熱。另外，所述說明中，僅例示了將多個半導體晶片100積層封裝的情形，但本說明書中揭示的技術亦當然可應用於不積層封裝的情形。
另外，所述說明中，將封裝頭50或照射單元18設為一個，但視需要，該等亦可設置多個，於多個部位同時進行壓接處理或中間體40的利用電磁波62的加熱。
10:封裝裝置
12:晶片供給單元
14:晶片搬運單元
16:接合單元
18:照射單元
20:控制部
22:上頂部
24:晶粒拾取器
26:移送頭
28:旋轉台
30:平台
40:中間體
50:封裝頭
60:電磁波源
62:電磁波
100:半導體晶片
110:基板
Ra、Rb:旋轉軸
TE:切割膠帶

Claims (7)

  1. 一種封裝裝置，將半導體晶片接合於基板或其他半導體晶片即被封裝體而製造半導體裝置，且所述封裝裝置的特徵在於包括：平台，具有第一面、及與所述第一面為相反側的第二面；中間體，介於所述第一面與所述基板之間；封裝頭，相對於所述平台而能夠相對移動，將所述半導體晶片接合於所述被封裝體；以及照射單元，自所述平台的第二面側向所述中間體的對應於所述封裝頭所要進行接合的所述半導體晶片的加熱區域照射透過所述平台且被所述中間體吸收的電磁波，且經由所述加熱區域將所述半導體晶片加熱，所述中間體具有抑制面方向上的傳熱的隔熱部，且所述隔熱部抑制所述平台上的所述其他半導體晶片的來自所述加熱區域的溫度上昇。
  2. 如申請專利範圍第1項所述的封裝裝置，其中所述隔熱部於所述中間體中包含由在水平方向上延伸的槽或孔形成的間隙部。
  3. 如申請專利範圍第1項或第2項所述的封裝裝置，其中所述中間體為自所述第一面側起，依序將吸收所述電磁波的吸收層、使所述電磁波透過且傳熱性高的傳熱層、及包含使所述電磁波透過且傳熱性低的材料的隔熱層在厚度方向上積層的多層結 構。
  4. 如申請專利範圍第1項或第2項所述的封裝裝置，其中所述電磁波包含多個波段，所述中間體包含將針對所述多個波段分別設置的多個吸收層於厚度方向上積層的多層結構，所述多個吸收層是以對應的波段越長則越遠離所述平台的方式積層。
  5. 如申請專利範圍第1項或第2項所述的封裝裝置，其中所述基板上熱壓接有多個所述半導體晶片，所述照射單元包括變更所述電磁波的照射區域、及所述電磁波的照射位置中的至少一者的變更機構。
  6. 如申請專利範圍第1項或第2項所述的封裝裝置，其中所述封裝頭包括對將多個所述半導體晶片以經暫時壓接的狀態積層的暫時積層體進行加熱而正式壓接的加熱器，藉由利用所述照射單元照射所述中間體而將所述暫時積層體與所述加熱器一併加熱。
  7. 一種半導體裝置的製造方法，將半導體晶片接合於基板或其他半導體晶片即被封裝體而製造半導體裝置，且所述半導體裝置的製造方法的特徵在於包括：載置步驟，於經載置於平台的第一面的中間體上載置所述基板；接合步驟，利用相對於所述平台而能夠相對移動的封裝頭， 將所述半導體晶片接合於所述被封裝體；以及中間體加熱步驟，於所述接合步驟的至少一部分的同時，自隔著所述平台而配置於所述封裝頭的相反側的照射單元，向所述中間體的對應於所要進行接合的所述半導體晶片的加熱區域照射被所述中間體吸收且透過所述平台的電磁波，且經由所述加熱區域將所述半導體晶片加熱，其中所述中間體具有抑制面方向上的傳熱的隔熱部，且所述隔熱部抑制所述平台上的所述其他半導體晶片的來自所述加熱區域的溫度上昇。
TW107133910A 2017-09-28 2018-09-26 封裝裝置以及半導體裝置的製造方法 TWI690036B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017-188235 2017-09-28
JP2017188235 2017-09-28

Publications (2)

Publication Number Publication Date
TW201921611A TW201921611A (zh) 2019-06-01
TWI690036B true TWI690036B (zh) 2020-04-01

Family

ID=65903716

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107133910A TWI690036B (zh) 2017-09-28 2018-09-26 封裝裝置以及半導體裝置的製造方法

Country Status (3)

Country Link
JP (1) JP2019068069A (zh)
TW (1) TWI690036B (zh)
WO (1) WO2019065473A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019125134A1 (de) * 2019-09-18 2021-03-18 Mühlbauer Gmbh & Co. Kg Bauteilhandhabung, Bauteilinspektion
US20230088061A1 (en) * 2020-06-23 2023-03-23 Amkor Technology Singapore Holding Pte. Ltd. Laser bonded devices, laser bonding tools, and related methods

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053095A (ja) * 1983-09-02 1985-03-26 株式会社日立製作所 はんだ接続加熱方法
JPH05291351A (ja) * 1992-04-13 1993-11-05 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
WO2010050209A1 (ja) * 2008-10-31 2010-05-06 東レ株式会社 電子部品と可撓性フィルム基板の接合方法および接合装置
JP5291351B2 (ja) 2008-02-01 2013-09-18 ヤフー株式会社 評価表現抽出方法、評価表現抽出装置、および、評価表現抽出プログラム
JP6053095B2 (ja) 2012-01-10 2016-12-27 本田技研工業株式会社 車両用自動変速機の制御装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4191109B2 (ja) * 2004-07-22 2008-12-03 パナソニック株式会社 リフロー半田付け装置及び方法、並びに基板保持板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053095A (ja) * 1983-09-02 1985-03-26 株式会社日立製作所 はんだ接続加熱方法
JPH05291351A (ja) * 1992-04-13 1993-11-05 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP5291351B2 (ja) 2008-02-01 2013-09-18 ヤフー株式会社 評価表現抽出方法、評価表現抽出装置、および、評価表現抽出プログラム
WO2010050209A1 (ja) * 2008-10-31 2010-05-06 東レ株式会社 電子部品と可撓性フィルム基板の接合方法および接合装置
JP6053095B2 (ja) 2012-01-10 2016-12-27 本田技研工業株式会社 車両用自動変速機の制御装置

Also Published As

Publication number Publication date
WO2019065473A1 (ja) 2019-04-04
JP2019068069A (ja) 2019-04-25
TW201921611A (zh) 2019-06-01

Similar Documents

Publication Publication Date Title
TWI692044B (zh) 封裝裝置以及半導體裝置的製造方法
TWI684256B (zh) 用於半導體晶粒的雷射輔助接合之系統及方法
CN110326096B (zh) 激光回流焊装置
US10483228B2 (en) Apparatus for bonding semiconductor chip and method for bonding semiconductor chip
TWI652743B (zh) 半導體晶片的封裝裝置以及半導體裝置的製造方法
TWI656934B (zh) 雷射焊接裝置
JP6384937B1 (ja) 発光素子及びその製造方法
TWI670776B (zh) 半導體裝置的製造方法以及封裝裝置
TWI690036B (zh) 封裝裝置以及半導體裝置的製造方法
WO2018143222A1 (ja) 半導体チップの実装装置および実装方法
US8444044B2 (en) Apparatus and methods for forming wire bonds
TWI607516B (zh) Semiconductor device manufacturing method and manufacturing apparatus
KR102221588B1 (ko) 반도체 칩 본딩 장치 및 반도체 칩 본딩 방법
JP2005142397A (ja) ボンディング方法およびその装置
US20210043478A1 (en) Pressure heating apparatus
JP2020065004A (ja) 実装装置および半導体装置の製造方法
KR102174930B1 (ko) 레이저 리플로우 장치의 레이저 가압 헤드 모듈
JP7396830B2 (ja) 加圧加熱装置
KR101858665B1 (ko) 기판 가접합 장치, 이를 이용한 기판 접합 시스템 및 기판 접합 방법
JP2021114523A (ja) 半導体部品の製造方法及び複合ウェハ
JP2003234482A (ja) 光半導体装置の製造方法