CN103975564A - 具有拥有由用户定义的用于数字预失真(dpd)以及其它非线性应用的非线性函数的指令集的处理器 - Google Patents
具有拥有由用户定义的用于数字预失真(dpd)以及其它非线性应用的非线性函数的指令集的处理器 Download PDFInfo
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Abstract
提供一种具有指令集的处理器,其中指令集有用于数字预失真(DPD)和其它非线性应用的由用户定义的非线性函数。一种信号处理功能,诸如数字预失真,通过获得针对输入值x执行至少一个非线性函数的至少一个软件指令,以软件实现,其中该至少一个非线性函数包含至少一个由用户指定的参数;响应于用于具有至少一个由用户指定的参数的至少一个非线性函数的至少一个软件指令,来执行下列步骤:调用至少一个功能单元,所述功能单元实现至少一个软件指令以将所述非线性函数应用到所述输入值x;以及生成对应于所述输入值x的非线性函数的输出。由用户指定的参数可以可选地被从存储器加载到至少一个寄存器中。
Description
相关申请的交叉引用
本申请要求2011年10月27日提交的美国专利临时申请No.61/552,242,题目为“软件数字前端(SoftDFE)信号处理以及数字无线电(Software Digital Front End(SoftDFE)Signal Processing and DigitalRadio)”的优先权,在此通过引用并入。
技术领域
本发明涉及数字信号处理技术,以及更具体地涉及用于求解(evaluate)由用户定义的非线性函数的技术。
背景技术
数字预失真(DPD)是用于线性化发射器中的功率放大器,以提高功率放大器效率的技术。发射器中的功率放大器通常必须基本上是线性的,使得信号被精确地重现。输入信号的压缩或者输入信号和输出信号之间的非线性关系导致输出信号频谱溢出到邻近的信道中,导致干扰。这种效应通常被称为频谱再生长(spectral re-growth)。
数字预失真电路反向地建立功率放大器的增益和相位特征的模型,并且当与放大器结合时,制造出更线性化的并且降低在其它情况下会由功率放大器导致的失真的总体系统。将反向失真引入到放大器的输入中,由此减少在其它情况下放大器可能具有的任何非线性。
由于高采样率,通常使用硬连线逻辑部来实现数字预失真。尽管这种基于硬件的DPD技术有效地线性化功率放大器,但是其遭受很多限制,这些限制如果被克服,可以进一步提高DPD电路的效率以及灵活性。例如,现有的基于硬件的DPD技术缺少灵活性并且价格昂贵,耗时并且针对新的射频(RF)设计去改进DPD设计是有挑战的。
数字预失真以及其它非线性应用必须经常处理一个或者多个非线性函数,该非线性函数包括一个或者多个由用户指定的参数,例如滤波器系数值或者源自查找表(look-up table)的值。因此需要一种具有指令集的处理器,该指令集具有用于数字预失真(DPD)以及其它非线性应用的由用户定义的一个或者多个非线性函数,以使能例如DPD高性能软件的实现。
发明内容
总体上,提供具有指令集的处理器,该指令集具有用于数字预失真(DPD)或者其它非线性应用的由用户定义的非线性函数。根据本发明的一个方面,信号处理功能,例如DPD,通过获得至少一个软件指令而以软件被实现,所述软件指令为输入值x执行至少一个非线性函数,其中所述至少一个非线性函数包括至少一个由用户指定的参数;响应于用于包括至少一个由用户指定的参数的至少一个非线性函数的至少一个软件指令执行以下步骤:调用至少一个功能单元,该至少一个功能单元实现所述至少一个软件指令以对输入值x应用非线性函数;以及生成对应于输入值x的非线性函数的输出。
此外,由用户指定的参数能够可选地被从存储器加载到至少一个寄存器中。由用户指定的参数可以包括查找表,该查找表存储用于有限个输入值的非线性函数的值。由用户指定的参数可以包括一个或者多个系数,其被非线性函数采用以执行查找表的条目之间的多项式插值。
参考下列详细说明书以及附图,将会得到对本发明、以及本发明的进一步的特征和优点的更全面的理解。
附图说明
图1示出了本发明的方面可以在其中采用的示例性发射器的部分。
图2示出了本发明的方面可以在其中采用的替代示例性发射器的部分。
图3示出了使用由用户定义的非线性指令fm,l在16个分量向量的向量处理器上的软件中实现DPD函数的示例性伪码。
图4A和图4B是示例性功能块图的图形说明。
图5A示出了作为x(n)函数的个体的由用户定义的非线性函数fm,l。
图5B示出了图5A的个体的由用户定义的非线性函数fm,l的示例性近似。
图6示出了泰勒和(Taylor sum)计算块;以及
图7是根据本发明的实施例的示例性的基于向量的数字处理器的示意性块图,该数字处理器针对一个或者多个复数同时求解由用户定义的非线性函数。
具体实施方式
图1示出了本发明的方面可以在其中应用的示例性发射器的部分100。如图1所述,示例性发射器的部分100包括信道滤波器和数字上变频(DUC)级110,波峰因子降低(crest factor reduction)(CFR)级120,数字预失真(DPD)级130以及可选的均衡和/或IQ不平衡校正级140。总体上,信道滤波器以及数字上变频级110,利用例如有限脉冲响应(FIR)滤波器以及数字上变频,执行信道滤波,以将数字化的基带信号转化成中频(IF)。如上所指出的,波峰因子降低级120限制了传输信号的峰均比(PAR)。数字预失真级130线性化了功率放大器以提高效率。均衡级140采用了RF信道均衡以减轻信道损伤。
根据本发明的一个方面,数字预失真非线性处理以及其它非线性应用在具有指令集的处理器上以软件执行,该指令集具有一个或者多个用于数字预失真(DPD)以及其它非线性应用的由用户定义的非线性函数。由用户定义的非线性指令被用来计算具有至少一个必须由用户指定的参数的非线性函数。由用户指定的非线性指令接收输入标量或者向量,并且生成输出标量或者向量。在输入向量的情况下,输出向量包括输出采样,该输出采样是输入采样的非线性函数。
尽管本发明在数字预失真的背景中被示出,但是本发明可以被用于任何采用一个或者多个由用户定义的非线性函数的非线性应用。
本发明可以被应用在手机,基站以及其它网络元件中。
图2示出了本发明的方面可以在其中采用的替代的示例性发射器的部分200。如图2所示,示例性发射器部分200包括处理复数信号I,Q的两个脉冲成形的而且低通的滤波器(LPF)级210-1,210-2,以及两个数字上变频器220-1,220-2。图2的示例性发射器部分200没有包括图1的波峰因子降低级120,但是可以可选地包括CFR(波峰因子降低)级。复数输入(I,Q)然后应用到图2的数字预失真器230并且其是本发明的示例性实施例的重点。下文进一步讨论图2的数字预失真器230,例如,结合图3和图4讨论。
数字预失真器230的输出被并行地应用到两个数模转换器(DAC)240-1,240-2,并且模拟信号然后被正交调制级250处理,该正交调制级进一步将信号上变频成射频(RF)信号。
正交调制级250的输出255被应用到功率放大器(PA)260,诸如多赫蒂放大器(Doherty amplifier)或者漏调制器(drain modulator)。如上所述,数字预失真器230线性化功率放大器260以通过将功率放大器260的线性范围扩展到更高的传输功率来提高功率放大器260的效率。
在反馈通路265中,功率放大器260的输出在被应用到将信号下变频到基带的解调级280之前,被应用到衰减器270中。下变频信号被应用到模数转换器(ADC)290以数字化信号。数字化的采样然后被复数自适应算法部295处理,该自适应算法部295为数字预失真器230生成参数w。复数自适应算法部295不在本申请的范围内。可以使用公知的技术来为数字预失真器230生成参数。
数字预失真器的非线性滤波器的实现
数字预失真器230可以利用非线性系统的Volterra级数模型实现为非线性滤波器。Volterra级数是以类似泰勒级数的方式用于非线性行为的模型。Volterra级数与泰勒级数的不同之处在于其捕获“记忆”效应的能力。如果该系统的输出严格地取决于在那特定时间的输入,泰勒级数可以被用来将非线性系统的响应近似到给定的输入。在Volterra级数中,非线性系统的输出取决于该系统在其它时间的输入。所以,Volterra级数允许设备的“记忆”效应被捕获。
总体地,具有记忆的因果系统(causal system)可以被表达为:
此外,没有记忆的弱非线性系统可以利用多项表达式来建模:
Volterra级数可以被理解成以上两个表达的组合:
在离散域中,Volterra级数可以表达为如下:
Volterra级数的复杂性能够以指数形式增长,使得Volterra级数的使用在许多常规应用(例如DPD)中,是不实际的。所以,提出了许多用于非线性系统的简化模型。例如,记忆多项式是经常使用的模型:
另一个被称为广义记忆多项式模型的简化模型,可以被如下表达(其中M代表记忆深度以及K代表多项式的阶):
具有交叉积的广义记忆多项式的等效表达可以如下表达:
其中:
其中f(x)是具有一个或者多个由用户指定的参数的非线性函数,根据本发明的一方面假定该一个或者多个由用户指定的参数使用如下所述的由用户定义的非线性指令vec_nl加速。注意用于非线性分解的除了xk的其他基础函数是可能的。
如下所述,由用户定义的非线性指令fm,l可以由例如向量处理器处理。该fm,l是非线性函数的m×l个阵列。每个非线性函数可以具有由用户指定的参数,例如查找表或者系数。查找表可以是由用户定义的非线性指令fm,l的多项式近似。如下文结合图7进一步讨论的,m×l个阵列中的每个由用户定义的非线性指令fm,l的查找表可以被存储在存储器中,并且当该指令被处理器处理的时候,将该查找表加载到与功能单元相关的寄存器中。然后在m×l个阵列中的个体非线性指令fm,l上计算输入采样的值。
图3示出了示例性伪码300,其使用等式(1)的由用户定义的非线性指令fm,l在16个分量向量的向量处理器上的软件中实现DPD函数。示例性伪代码300包括了计算输入x的幅值的第一部分310。在行320中,m×l阵列中的个体的非线性指令fm,l的查找表可以被加载到寄存器中。因此,示例性伪代码300包括实现等式(1)的部分330。(例如,输入采样,对采样执行平方运算,计算非线性函数以及然后累加结果。)
图4A是实现等式(1)的示例性功能块图400的图示说明。在这里描述的示例性实施方式中,使用|x|2k替代|x|k。如图4A所示,示例性电路400包括多个延迟元件,例如生成等式(1)的x(n-m)项的延迟元件405-1到405-5,以及通过延迟平方运算410的输出来生成等式(2)的|x(n-l)|2项的延迟元件405-6到405-9。此外,示例性功能块图400包括从功能单元420-1,1到420-4,4的阵列,其接收适当的|x(n-l)|2项并且实现等式(2)。示例性功能块图400也包括多个乘法器(x),该乘法器接收适当的x(n-m)项并且将其与相应的m,l功能单元420的输出相乘。每行中的乘法结果由加法器(+)430相加并且给定行中的各个加法器430的输出由相应的加法器440相加以生成输出y(n)。
图4B提供了替代示例性功能块图450的图示说明,其用减少的数量的乘法运算实现等式(1)。如图4B所示,示例性电路450包括多个延迟元件,诸如生成等式(1)的x(n-m)项的延迟元件455-1到455-5,以及通过延迟平方运算460的输出来生成等式(2)的|x(n-l)|2项的延迟元件455-7到455-9。此外,示例性功能块图450包括功能单元470-1,1到470-4,4的阵列,其接收适当的|x(n-l)|2项并且实现等式(2)。加法器480计算非线性增益(输入振幅的非线性函数的和)。
示例性功能块图450也包括了多个乘法器(×)475,其接收适当的x(n-m)项并且将其与相应的m,l功能单元470的列的输出和的输出相乘。如此,来自加法器480的非线性增益被应用到输入数据(复数乘法累加(CMAC)运算)。乘法运算的输出通过加法器(+)485相加以生成输出y(n)。
图5A将个体的由用户定义的非线性函数fm,l500示出为x(n)的函数。图5B示出了图5A的个体的由用户定义的非线性函数fm,l的示例性近似550。图5B的示例性近似550使用分段的泰勒级数查找表。非线性函数fm,l500被分解成j个段。与各个段相关的采样560-1到采样560-j存储在查找表中。如果对于给定x,采样是存储在查找表中的,可以从查找表中找到采样并且直接采用于非线性函数的求解中。如果期望的x位于查找表中的两个值之间,那么在功能单元中的硬件内执行线性插值或者执行更普遍的基于泰勒级数的插值以得到结果,如以下结合图6进一步讨论的。如此,非线性数字预失真操作可以在输入信号550的不同段用泰勒级数系数描述。在具有32个段的一个示例性实施例中,对于使用4个立方多项式近似系数表达的系数,在查找表中有128个复数条目(16位复数和16位实数)。在具有128个段以及每个段一个系数的进一步变化中,有128个用于线性插值的复数系数(16位复数和16位实数)。可替换地,对于每个段有4个条目的段,其有32复数条目用于立方插值。
如上所指出,如果期望的x值没有在查找表中而是在查找表中的两个值之间,那么在功能单元内的硬件中执行线性插值以得到结果。泰勒级数计算可以作为立方插值被执行以求解小立方多项式,如下:
f(ε)=a0+a1·ε+a2·ε2+a3·ε3
其中系数a是从查找表中得到的。然而该表达式具有相当程度的复杂性(有执行乘法和平方运算的多个乘式)。
复杂性可以使用Horner算法(因式分解)来降低,使得f(ε)可以被如下计算。也参照2008年11月28日申请的题目为“使用分解多项式插值的具有一个或者多个非线性函数的数字信号处理器(DigitalSignal Processor With One Or More Non-Linear Functions UsingFaetorized Polynomial Interpolation)”的美国专利申请No.12/324,934,在此通过参考并入。
f(ε)=((b3·ε+b2)·ε+b1)·ε+b0 (3)
等式(3)中复杂性被降低至只有3个乘法运算和3个加法运算。f(ε)是存储在查找表中的值的偏移。
图6示出了实现等式(3)的泰勒和计算块400。系数b0,b1,b2,b3从查找表650中获得。泰勒和计算块600仅仅利用了三个乘法(610)运算和三个加法(620)运算实现了等式(3)。
图7是示例性地基于向量的数字处理器700的图示块图,数字处理器700根据本发明的实施例求解由用户定义的非线性函数而同时得出一个或者多个复数。总体上,图7的基于向量的实现并发地执行不同的处理。所以,该基于向量的数字处理器700包含了多个功能单元710-1到710-N,用于求解由用户定义的非线性函数。
总体上,基于向量的数字处理器700处理了输入向量x并且生成了输出向量y(n)。示出了用于16-路(16-way)向量处理器nl指令的示例性的基于向量的数字处理器700,其实现为:
vec_nl(x1,x2,..,xl6),x[k]在0至1的范围内
如此,基于向量的数字处理器700可以执行16个这样的线性操作并且线性地将他们组合在单个循环中。例如,由用户定义的非线性函数可以表达为:
注意在更普遍的情况下,不同的函数可以被应用于向量处理器的向量数据的每个分量。
如图7所示,功能单元700从存储器接收用户规范,例如查找表或者系数,用于存储在寄存器中。
结论
尽管本发明的示例性实施例关于数字处理器中的数字逻辑块和存储表被描述,但是如本领域技术人员会明了的那样,各个功能可以作为软件程序的处理步骤以数字域实现,由电路元件或者状态机以硬件实现,或者以软件和硬件两者的组合实现。这样的软件可以采用于例如数字信号处理器,专用集成电路或者微控制器中。这样的硬件以及软件可以体现于集成电路内部实现的电路中。
所以,本发明的功能可以以实现那些方法的方法和设备的形式体现。本发明一个或者多个方面可以以程序代码的形式体现,例如,无论程序代码是存储在存储介质中,加载到机器中或者是由机器执行,其中当程序代码被加载到机器中并由机器(例如处理器)执行时,机器成为实践本发明的设备。当在通用处理器上实现时,程序代码段与处理器结合以提供与类似于特定逻辑电路的方式运行的设备。本发明也能够在一个或者多个集成电路,数字处理器,微处理器,以及微控制器中实现。
可以理解的是这里示出和描述的实施例以及变化仅用于示例本发明的原理,并且各种变化可以由本领域技术人员在不超出本发明的范围和精神的情况下实现。
Claims (20)
1.一种由处理器执行的用于以软件实现信号处理功能的方法,包括:
获得至少一个软件指令,所述软件指令执行输入值x的至少一个非线性函数,其中所述至少一个非线性函数包括至少一个由用户指定的参数;
响应于用于具有至少一个由用户指定的参数的至少一个非线性函数的至少一个所述软件指令,执行以下步骤:
调用至少一个功能单元,所述功能单元实现所述至少一个软件指令以将所述非线性函数应用到所述输入值x;以及
生成对应于所述输入值x的所述非线性函数的输出。
2.根据权利要求1所述的方法,其中所述信号处理功能包括数字预失真。
3.根据权利要求1所述的方法,进一步包括:将所述至少一个由用户指定的参数从存储器加载到至少一个寄存器的步骤。
4.根据权利要求1所述的方法,其中所述由用户指定的参数包括存储用于有限个输入值的所述非线性函数的值的查找表。
5.根据权利要求4所述的方法,其中所述由用户指定的参数包括一个或者多个系数,所述一个或者多个系数由所述非线性函数采用以执行所述查找表的条目之间的多项式插值。
6.根据权利要求1所述的方法,其中所述处理器包括向量处理器。
7.根据权利要求1所述的方法,其中所述输入值x包括向量并且其中所述输出包括向量。
8.一种处理器,被配置为以软件实现信号处理功能,该处理器包括:
存储器,以及
至少一个硬件设备,所述硬件设备耦合到存储器,可操作以:
获得至少一个软件指令,所述软件指令执行输入值x的至少一个非线性函数,其中所述至少一个非线性函数包括至少一个由用户指定的参数;
响应于用于具有至少一个由用户指定的参数的至少一个非线性函数的至少一个所述软件指令,执行下述处理:
调用至少一个功能单元,所述功能单元实现所述至少一个软件指令以将所述非线性函数应用到所述输入值x;以及
生成对应于所述输入值x的所述非线性函数的输出。
9.根据权利要求8所述的处理器,其中所述信号处理功能包括数字预失真。
10.根据权利要求8所述的处理器,其中所述至少一个硬件设备被进一步配置以将所述至少一个由用户指定的参数从存储器加载到至少一个寄存器。
11.根据权利要求8所述的处理器,其中所述由用户指定的参数包括存储用于有限个输入值的所述非线性函数的值的查找表。
12.根据权利要求11所述的处理器,其中所述由用户指定的参数包含一个或者多个系数,所述一个或者多个系数由所述非线性函数采用以执行所述查找表的条目之间的多项式插值。
13.根据权利要求8所述的处理器,其中所述处理器包含向量处理器。
14.根据权利要求8所述的处理器,其中所述输入值x包括向量并且其中所述输出包括向量。
15.一种由处理器执行的用于以软件实现数字预失真的方法,包括:
获得至少一个软件指令,所述软件指令执行输入值x的至少一个非线性函数,其中所述至少一个非线性函数包括至少一个由用户指定的参数;
响应于用于具有至少一个由用户指定的参数的至少一个非线性函数的至少一个所述软件指令,执行下述步骤:
调用至少一个功能单元,所述功能单元实现所述至少一个软件指令以将所述非线性函数应用到所述输入值x;以及
生成对应于所述输入值x的所述非线性函数的输出。
16.根据权利要求15所述的方法,进一步包括:将所述至少一个由用户指定的参数从存储器加载到至少一个寄存器中的步骤。
17.根据权利要求15所述的方法,其中所述由用户指定的参数包括存储用于有限个输入值的所述非线性函数的值的查找表。
18.根据权利要求17所述的方法,其中所述由用户指定的参数包括一个或者多个系数,所述一个或者多个系数由所述非线性函数采用以执行所述查找表的条目之间的多项式插值。
19.根据权利要求15所述的方法,其中所述处理器包括向量处理器。
20.根据权利要求15所述的方法,其中所述输入值x包括向量并且其中所述输出包括向量。
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JP6262756B2 (ja) | 2012-11-02 | 2018-01-17 | インターデイジタル パテント ホールディングス インコーポレイテッド | 無線ローカルエリアネットワークに対する電力制御方法およびプロシージャ |
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