CN103258753A - 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板 - Google Patents

电路连接结构体及其制造方法以及电路连接结构体用的半导体基板 Download PDF

Info

Publication number
CN103258753A
CN103258753A CN2013101308956A CN201310130895A CN103258753A CN 103258753 A CN103258753 A CN 103258753A CN 2013101308956 A CN2013101308956 A CN 2013101308956A CN 201310130895 A CN201310130895 A CN 201310130895A CN 103258753 A CN103258753 A CN 103258753A
Authority
CN
China
Prior art keywords
circuit
connection structure
semiconductor substrate
circuit connection
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013101308956A
Other languages
English (en)
Inventor
金谷雄一
田中俊明
板桥俊明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HITACHI CHEM DUPONT MICROSYS
Showa Denko Materials Co ltd
HD MicroSystems Ltd
Original Assignee
HITACHI CHEM DUPONT MICROSYS
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HITACHI CHEM DUPONT MICROSYS, Hitachi Chemical Co Ltd filed Critical HITACHI CHEM DUPONT MICROSYS
Publication of CN103258753A publication Critical patent/CN103258753A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29357—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29369—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29384—Tungsten [W] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29388—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29393—Base material with a principal constituent of the material being a solid not provided for in groups H01L2224/293 - H01L2224/29391, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01018—Argon [Ar]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01027—Cobalt [Co]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01045—Rhodium [Rh]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09—Treatments involving charged particles
    • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate

Abstract

本发明提供一种电路连接结构体，其利用追加的表面处理而在耐热性树脂膜中导入化学上稳定的官能基从而改善粘接性，即使在高温高湿环境下，在耐热性树脂膜和电路粘接构件间也呈现良好的粘接性。在电路连接结构体1A中，半导体基板2和电路构件3利用它们之间所夹持的电路粘接构件4进行粘接。另外，利用电路粘接构件4中的导电性粒子8，可使半导体基板2表面的第一电路电极5和电路构件3的第二电路电极7电连接。半导体基板2使用含有氮气、氨气等的气体，利用等离子处理而进行表面改性处理。因此，半导体基板2的耐热性树脂膜5和电路粘接构件4，即使在高温高湿环境下也可长期被牢固地粘接。

Description

电路连接结构体及其制造方法以及电路连接结构体用的半导体基板
本申请是申请日为2006年8月22日、申请号为200680030441.X、发明名称电路连接结构体及其制造方法以及电路连接结构体用的半导体基板的申请的分案申请。
技术领域
本发明是关于一种在液晶显示装置等中使用的电路连接结构体及其制造方法以及电路连接结构体用的半导体基板。更详细地说，是关于一种利用电路粘接构件将半导体基板和电路构件进行粘接，且进行电连接的电路连接结构体及其制造方法以及电路连接结构体用的半导体基板。
背景技术
随着半导体芯片和电子部件的小型薄型化、液晶显示装置的高精细化，它们所使用的电路和电极正在高密度、高精细化。这种微细电极的连接因为难以利用焊锡(solder)进行连接，所以最近大多是采用使用粘接剂的方法。
作为使用粘接剂的连接方法，已知有：例如在专利文献1中举出的如下所述的方法，即利用使碳、镍、金属被覆塑料粒子等导电性粒子分散在绝缘性粘接剂中的各向异性导电性的粘着剂或膜状物，通过加热加压，在粘接剂的厚度方向得到电连接的ACF(＝各向异性导电性薄膜，以下称为ACF)方法；例如在专利文献2中举出的如下所述的方法，即，不利用导电性粒子而在连接时进行压接，并利用电极面的微细凹凸的直接接触来得到电连接的NCF(＝非导电性薄膜，以下称为NCF)法。
近年来，作为介入ACF的电极半导体基板用途，利用根据COG(ChipOn Glass)方式或COF(Chip On Film)方式进行着液晶驱动用IC的安装。在驱动用IC表面上，广泛地应用聚酰亚胺膜或聚苯并
Figure BDA00003055478300011
唑膜等耐热性树脂组合物。在耐热性树脂组合物和ACF、NCF等粘接薄膜之间需要具有优良的粘接性，特别是作为安装后的芯片，则需要对耐冷热循环试验或高温高湿试验的可靠性高的粘接性。
提高作为耐热性树脂的聚酰亚胺膜和ACF间的粘接性的方法包括，在专利文献3中记载的有关通过对聚酰亚胺膜进行等离子处理而使粘接性提高的技术。另外，在专利文献4中，也记载有有关通过对聚酰亚胺膜进行低温等离子处理而使粘着性提高的技术。
专利文献1：特开昭55-104007号公报
专利文献2：特开昭60-262430号公报
专利文献3：特开2003-73862号公报
专利文献4：特开2003-163451号公报
但是，在专利文献3中，具体所公开的处理气体的种类只有氧气，而关于安装后的芯片，则完全没有有关对耐冷热循环试验和高温高湿试验的可信性高的粘接性的记载。另外，在专利文献4中，具体所公开的处理气体的种类只有氧气，而关于安装后的芯片，则完全没有有关对耐冷热循环试验或高温高湿试验的可信性高的粘接性的记载。实际上，对于氧气而言，存在无法实现该粘接性的长期的改善效果的问题。
发明内容
本发明是为了解决以上所述的以往问题的发明，其目的在于提供一种不是在耐热性树脂组合物的表面上设置物理性的凹凸或者使表面呈疏水性而防止吸湿劣化来改善粘接性，而是利用追加的表面处理在耐热性树脂膜中导入化学上稳定的官能基来改善粘接性，且即使在高温高压下使用中，也可以在耐热性树脂膜和电路粘接构件之间呈现优良的粘接性的电路连接结构体及其制造方法以及电路连接结构体用的半导体基板。
为了解决上述课题并达成目的，利用本发明的电路连接结构体的制造方法具有如下所述的特征，即，所述电路连接结构体的制造方法包括：使用含有从氮气、氨气及肼气体构成的组中选择的至少一种的氮系气体，对在表面具有耐热性树脂膜及第一电路电极的半导体基板进行等离子处理而进行表面改性处理的工序；使电路粘接构件介于所述被表面改性处理的半导体基板、和在表面具有与所述第一电路电极对置的第二电路电极的电路构件之间，并以所述第一及第二电路电极对置的方式进行配置的工序；将所述半导体基板及所述电路构件进行压接，使所述半导体基板及所述电路构件进行粘接，且将对置的所述第一及第二电路电极彼此进行电连接的压接工序。
另外，本发明的电路连接结构体的制造方法的特征在于：所述电路粘接构件含有导电性粒子，且所述第一及第二电路电极经由所述导电性粒子进行电连接。
另外，本发明的电路连接结构体的制造方法的特征在于：所述氮系气体为进而含有氢或惰性气体的混合气体。
另外，本发明的电路连接结构体的制造方法的特征在于：所述氮系气体的比率相对所述混合气体为20～100容积％。
另外，本发明的电路连接结构体的制造方法的特征在于：所述耐热性树脂膜为由选自聚酰胺、聚酰亚胺、聚酰胺酰亚胺、聚苯并
Figure BDA00003055478300031
唑、聚苯并咪唑及苯并环丁烯构成的组中的至少二种共聚物，或选自所述组中的至少一种前体构成的膜。
另外，本发明的电路连接结构体的制造方法的特征在于：所述等离子处理在0.5Pa到常压范围的压力下进行。
另外，本发明的电路连接结构体的制造方法的特征在于：所述半导体基板为半导体元件。
另外，本发明的电路连接结构体的制造方法的特征在于：所述电路构件为玻璃基板、金属基板或陶瓷基板。
另外，本发明的电路连接结构体的制造方法的特征在于：所述电路粘接构件为粘接薄膜或粘接膏。
另外，本发明的电路连接结构体的制造方法的特征在于：所述粘接薄膜或粘接膏含有环氧系树脂。
另外，本发明的电路连接结构体的特征在于：利用所述电路连接结构体的制造方法进行制造。
另外，本发明的电路连接结构体用的半导体基板的特征在于：所述半导体基板在表面具有耐热性树脂膜及第一电路电极，利用含有从氮气、氨气及肼气体构成的组中选择的至少一种的氮系气体，并通过等离子处理施行表面改性处理。
根据本发明，由于对半导体基板进行等离子处理而进行表面改性处理，所以使半导体基板的表面上所形成的耐热性树脂膜、和电路粘接构件即其中的含有环氧系树脂的粘接薄膜的粘着性提高，因此，起到即使在高温高湿下也可长期维持良好的粘接性，能够制造具有高可信性的电路连接结构体的效果。
附图说明
图1是表示本发明的实施方式1中的电路连接结构体的概略剖面图。
图2是表示使半导体基板和电路构件对置的状态的概略剖面图。
图3是表示在半导体基板和电路构件之间配置电路粘接构件(ACF)的状态的概略剖面图。
图4是表示本发明的实施方式2中的电路连接结构体的概略剖面图。
图5是表示在半导体基板和电路构件之间配置电路粘接构件(NCF)的状态的概略剖面图。
图中：1A、1B-电路连接结构体，2-半导体基板，3-电路构件，4-电路粘接构件，5-耐热性树脂膜，6-第一电路电极，7-第二电路电极，8-导电性粒子
具体实施方式
以下，根据图示详细地进行说明本发明的电路连接结构体及其制造方法以及电路连接结构体用的半导体基板的实施方式。还有，本发明并不被以下实施方式所限定。
(实施方式1)
图1是表示本发明的实施方式1中的电路连接结构体的概略剖面图。实施方式1对使用各向异性导电性薄膜(ACF)作为电路粘接构件4的情况进行说明。在图1中，电路连接结构体1A是半导体基板2与电路构件3夹持电路粘接构件4而构成。
在半导体基板2的表面具有耐热性树脂膜5，且形成有多个第一电路电极例如金电极。在电路构件3的表面形成有多个与第一电路电极6对置的多个第二电路电极7。另外，将分别形成有这些第一及第二电路电极6、7的半导体基板2及电路构件3的面，作为它们的表面。
半导体基板2和电路构件3是利用电路粘接构件4进行粘接。特别是，如后面所说明的，耐热性树脂膜5和电路粘接构件4被牢固地进行粘接。另外，在电路粘接构件4中分散有导电性粒子8，利用介于第一电路电极6和第二电路电极7之间的导电性粒子8，第一电路电极6和第二电路电极7得以电连接。另一方面，由于未介于这些电极之间的导电性粒子8分散在电路粘接构件4内，因此在除了电极以外的部分皆可确保绝缘性。
作为本发明的耐热性树脂膜5中所使用的耐热性树脂组合物，可使用从聚酰胺、聚酰亚胺、聚酰胺酰亚胺、聚苯并
Figure BDA00003055478300051
唑、聚苯并咪唑及苯并环丁烯中选择的至少二种共聚物。另外，也可使用从聚酰胺、聚酰亚胺、聚酰胺酰亚胺、聚苯并
Figure BDA00003055478300052
唑、聚苯并咪唑及苯并环丁烯中选择的至少一种前体。此时，也可使用预先进行感光性处理的聚酰亚胺、聚苯并唑等。例如，聚酰亚胺具有由通式(I)表示的重复单位。
[化1]
Figure BDA00003055478300054
(式中，W表示4价的有机基团，R表示2价的有机基团)。
本发明的电路粘接构件4可使用膏状、薄膜状的粘接构件，特别优选ACF等粘接薄膜。作为粘接薄膜可广泛应用热塑性材料、根据热和光进行硬化的热固性材料。因为将半导体基板2和电路构件3进行粘接后的耐热性或耐湿性优良，所以优选应用热固性材料。
作为电路粘接构件4的原料成分可使用含有潜在性固化剂的环氧系树脂或含有过氧化物等自由基系固化剂的丙烯酸系树脂，它们可在短时间内进行固化而使粘接作业性良好，且在分子结构上粘接性优良，所以优选。特别是，对环氧系树脂而言，其可利用后述的等离子处理而使与在耐热性树脂膜5表面上生成的酰胺基(-NH-CO-)、氨基(-NH2)等官能基的粘接性进一步提高，所以更优选。
在ACF中也可添加导电性粒子或少量的绝缘性粒子，其在制造使半导体基板2和电路粘接构件4成为一体的带有粘接剂的半导体芯片时，在加热加压时作为厚度保持材料发挥作用，所以优选。导电性粒子或绝缘性粒子的配合比例优选相对ACF为0.1～30体积％。另外，为了形成各向异性导电性，将导电性粒子配合成相对ACF为0.5～15体积％。
配合在电路粘接构件4中的导电性粒子包括有，Au、Ag、Pt、Co、Ni、Cu、W、Sb、Sn、锡焊料等金属粒子或碳、石墨等，另外，可以将这些导电性粒子作为核心材，或者在由非导电性的玻璃、陶瓷、塑料等高分子构成的核心材上，被覆由所述那样的材质构成的导电层而形成。进而，由于将导电性材料用绝缘层进行被覆所形成的绝缘被覆粒子或并用导电性粒子与玻璃、陶瓷、塑料等绝缘粒子等也使后述的半导体基板2及电路构件3的对位中的分解能提高，所以适合使用。为了在微小的电极确保1个以上的粒子数，优选尽可能多的粒子数，导电性粒子优选为小粒径粒子，优选15μm以下，更优选为1～7μm。
半导体基板2可使用例如使硅晶片单片化的半导体元件等。另外，电路构件3可使用玻璃基板、金属基板或陶瓷基板等，另外也可使用柔性印刷电路板和TAB带等。
下面，对采用以上结构的电路连接结构体1A的制造方法进行说明。
首先，利用旋转涂敷法等，在半导体基板2涂敷作为耐热性树脂膜5的原料的耐热性树脂组合物，并施行加热处理而进行热固化。由此，在半导体基板2的表面形成耐热性树脂膜5。
接着，在形成有耐热性树脂膜5的半导体基板2的表面，形成第一电路电极6。该第一电路电极6可以通过利用蚀刻处理而露出预先在半导体基板2上所层叠的金属层来形成，或者是通过在半导体基板2上设置凸块(bump)等电极构件来形成。
进而，对形成有耐热性树脂膜5及第一电路电极6的半导体基板2进行等离子处理，由此进行表面改性处理。
作为在等离子处理中所使用的等离子处理装置，例如优选使用在半导体加工中所使用的干法蚀刻装置。
作为在等离子处理中所使用的气体优选含有氮气、氨气、肼气体中的至少一种的氮系气体。另外，这里所说的氮系气体意味着含有氮原子的等离子处理用气体，其中较佳的为氮气或氨气。优选的实施方式是在含有除了上述以外的气体的情况下，使所混合的气体中含有的氧气或氟化烃气体少于50％，且混合从氦气或氩气等惰性气体或氢气中选择的气体。更优选的方式为，要么是由氮气、氨气、肼气体的至少一种所构成的氮系气体，要么是它们和氢气或惰性气体所构成的混合气体。另外，混合气体中的氮系气体的比率优选为20～100容积％。如果氮系气体的比率不满20体积％，则无法充分地进行半导体基板2的表面改性处理，不能得到所需的基板粘接性能，所以不优选。
为了进行等离子处理，将形成有耐热性树脂膜5及第一电路电极6的半导体基板2载置到等离子处理装置(未图示)内，并将上述氮系气体或混合气体导入到等离子处理装置内。接着，在装置内保持一定的压力的同时施加高频，且使其产生一定时间的等离子放电。虽然根据装置形状、电源频率、气体的种类的不同，压力会有所变化，但等离子处理装置系统内的压力优选在0.5Pa到常压(即大气压)。若系统内的压力超过这些上限或下限，则无法维持放电，因此不能进行表面改性处理，所以不优选。
等离子处理时间在0.1分钟～60分钟的范围内，在1片1片地进行处理的叶片式装置的情况下，优选为0.5分钟～5分钟。所施加的电力、偏压、基板温度等其他的条件可以利用众所周知的方法，但为了维持良好的表面状态，优选基板偏压或自偏压在-200V以上且0V以下、基板温度在0℃以上且200℃以下的范围的等离子处理。
接着，如图2所示，准备已施行等离子处理的半导体基板2，以及在表面上已形成多个与第一电路电极6对置的第二电路电极7的电路构件3，如图3所示，以使第一电路电极6和第二电路电极7彼此叠合的方式，使半导体基板2和电路构件3对位并对置。此时，在这些半导体基板2和电路构件3之间配置电路粘接构件4。
接着，如图3的箭头所示，通过将半导体基板2和电路构件3进行压接，而将这些半导体基板2及电路构件3进行粘接。半导体基板2和电路构件3的粘接可利用众所周知的方法。例如，将电路粘接构件4临时安装在半导体基板2或电路构件3上，并使这些半导体基板2及电路构件3对位后，利用加热加压或加压，将半导体基板2及电路构件3进行粘接。此时，如图1所示，利用电路粘接构件4内的导电性粒子8，将彼此对置的第一电路电极6及第二电路电极7进行电连接。
半导体基板2和电路构件3的对位，也可利用显微镜或图像存储装置进行，此时，并用对位标记也是有效的。上述加热加压可在作为半导体基板2的每1个芯片上进行，但若将多个同时进行压接，则对生产力的提高是有效的。利用本发明的耐热性树脂膜5和电路粘接构件4的粘接方法，可适用于单芯片也可适用于多芯片的安装。
作为本发明的ACF的压接工序中的压接条件，加热温度优选为100℃以上且260℃以下，更优选为150℃以上且200℃以下的范围。加热时间优选为1秒钟以上且5分钟以下，更优选为5秒钟以上且30秒钟以下的范围。压接压力对应每单位面积优选为10MPa以上且200MPa以下，更优选为20MPa以上且150MPa以下的范围。
关于耐热性树脂膜5和电路粘接构件4的粘接，在电子信息通信学会论文集C-II Vol.J74-C-II，No.6，pp489-497(1991)中报告有：利用氮等离子处理，在聚酰亚胺的表面上生成酰胺基(-NH-CO-)、氨基(-NH2)等官能基。但是，在该论文中揭示：通过肽键的形成使聚酰亚胺之间的粘接力提高，可是氮等离子与氧和四氟化碳的等离子相比，所呈现的粘接力只能持续大约一半的时间。因此，在上述论文中由于所粘接的对象为聚酰亚胺彼此之间，所以与本发明不同，另外也无法长期维持粘接力。
另外，已知通常在酰胺基和环氧基之间会因热而产生插入反应和加成反应。因此，当将使用上述的混合气体利用等离子处理对耐热性树脂膜5的表面进行表面改性的半导体基板2、和电路粘接构件4进行热压接时，在酰胺基和环氧基之间会形成新化学键，所以认为能够得到耐热性高且具有高可信性的粘接性的电路连接结构体。另外，即使在高温、高湿下也可长期维持良好的粘接性。
另外，即使在将形成有耐热性树脂膜5及第一电路电极6的半导体基板2进行等离子处理后，长期间放置到热压接工序为止的情况下，也可与电路粘接构件4进行热压接。因此，可以对预先施行等离子处理的半导体基板2进行保存、搬运等，然后可在电路连接结构体中使用。但是，优选进行利用氮气或氨气等气体的再次的等离子处理、和为了使吸附水排出而进行加热处理。
本发明是通过用氮系气体进行等离子处理，从而进行耐热性树脂膜5的表面改性，并形成有助于粘接性改善的官能基。但是，也可基于除去耐热性树脂膜5的表面污染物或劣化层、表面的凹凸性改善等目的，而用本发明的氮系气体、其他的气体种类例如氧气、氧/四氟化碳混合气体等进行等离子处理。接着，基于导入对改善粘接性有效的取代基的目的，可利用本发明的氮系气体连续或非连续地进行等离子处理。此时，重要的是与电路构件3进行压接前的半导体基板2的最终等离子处理是用氮系气体进行。
(实施方式2)
图4是表示本发明的实施方式2中的电路连接结构体的概略剖面图。在实施方式2中，使用非导电性薄膜(NCF)作为电路粘接构件4，其他则使用与实施方式1相同的材料和制造方法，省略其重复的说明。
在图4中，电路连接结构体1B是采用在半导体基板2和电路构件3之间夹持电路粘接构件4的构成。另外，电路粘接构件4不含有导电性粒子。在半导体基板2的表面具有耐热性树脂膜5，并形成有多个第一电路电极6例如金电极。在电路构件3的表面形成有与第一电路电极6对置的多个第二电路电极7。
半导体基板2和电路构件3是利用电路粘接构件4进行粘接。第一电路电极6和第二电路电极7通过彼此进行直接接触而电连接。这些第一电路电极6及第二电路电极7除了可以是金电极等的凸块以外，也可为顶端被切断的状态的锡焊料或焊丝等。
下面，对采用以上那种构成的电路连接结构体1B的制造方法进行说明。
如图2所示，准备与实施方式1同样地已实施等离子处理的半导体基板2，以及在表面形成有多个与第一电路电极6对置的第二电极电极7的电路构件3。接着，如图5所示，以使第一电路电极6和第二电路电极7叠合的方式，将半导体基板2和电路构件3对位并对置。此时，在这些半导体基板2和电路构件3之间，配置电路粘接构件4。
接着，如图5的箭头所示，在夹持电路粘接构件4的状态下，将半导体基板2和电路构件3进行压接。此压接方式可与实施方式1同样地进行。如图4所示，通过将半导体基板2和电路构件3进行压接，使半导体基板2和电路构件3机械性地进行粘接，且第一电路电极6和第二电路电极7通过直接接触而电连接。
这样，可制造即使在高温、高湿环境下也可长期维持良好的粘接性的电路连接结构体1B。
实施例
以下，利用实施例及比较例，对本发明更加具体地进行说明。另外，以下的实施例并不对本发明进行限定。
(实施例1)
[1](合成例1)聚酰亚胺前体清漆(varnish)的制作
在具有温度计、搅拌装置、冷凝管及氮气导入管的四口分离烧瓶中，使20.02g(0.1mol)的4，4’-二氨基二苯醚溶解在289.2g的N-甲基-2-吡咯烷酮，之后加入31.02g(0.1mol)的均苯四酸二酐，在室温下搅拌6小时。然后，进行粘度调整，得到15重量％的聚酰亚胺前体清漆。
对所得到的聚酰亚胺前体，利用含有树脂成分的1重量％的γ-氨基丙基三乙氧基硅烷的N-甲基-2-吡咯烷酮溶液进行稀释，以使成为13重量％的聚酰亚胺前体清漆，利用1μm孔径的特氟隆(テフロン)(注册商标)过滤器进行加压过滤，得到聚酰亚胺前体清漆。
[2]聚酰亚胺膜的制作
将在合成例1中所得到的作为耐热性树脂膜的聚酰亚胺前体清漆，在作为半导体基板的5英寸硅晶片上进行旋转涂敷，并分别在加热板上以130℃加热处理2分钟，利用扩散炉在氮气气氛下以200℃加热处理30分钟，以350℃加热处理60分钟，而得到具有膜厚5μm的聚酰亚胺(α)膜的硅基板(X)。
[3]等离子处理
将所得到的具有聚酰亚胺(α)膜的硅基板(X)，利用日本真空(公司)制的CSE-1110叶片式等离子蚀刻装置，在氮总流量25cc/min、压力10Pa、高频电力100W的条件下进行2分钟的等离子处理。将所得到的已完成氮等离子处理的具有聚酰亚胺膜的硅基板，利用带有玻璃刀的切割机切出1cm角，作为粘接性评价用下层芯片。
[4]电路粘接构件
将含有苯氧基树脂(高分子量环氧树脂)的ACF材料即日立化成工业(公司)制的AC-8408进行切割，得到2mm宽的带状物。
[5]压接
将评价用IC芯片作为粘接性评价用上层芯片，其中该评价用IC芯片是在2×10mm硅基板上，在厚0.5mm的长边侧2边形成300个被称作凸块的50μmφ、高20μm的金电极。该粘接性评价用上层芯片和上述已完成氮等离子处理的下层芯片挟持ACF材制AC-8408，并将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，得到评价用电极半导体基板。
[6]评价
将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时。粘接强度评价利用Dage制的Series4000接合强度测试机，将样品与未处理样品一起载置在温度设定为260℃的载物台上，并在30秒钟后进行剪切处理，且对粘接强度和破坏模式进行比较评价。将压力蒸煮器测试的未处理品的结果一并表示在表1中。
(实施例2)
[1](合成例2)聚酰亚胺前体清漆的制作
在具有温度计、搅拌装置、冷凝管及氮气导入管的四口分离烧瓶中，加入使18.02g(0.09mol)的4，4’-二氨基二苯醚和2.49g(0.01mol)的1，3-双(3-氨丙基)-1，1，1-四甲基二硅氧烷溶于270.0g的N-甲基-2-吡咯烷酮而形成的溶液，再加入6.54g(0.03mol)的均苯四酸二酐和20.60g(0.07mol)的3，3’，4，4’-联苯四羧酸二酐，在室温下搅拌6小时。然后，进行粘度调整，再利用1μm孔径的特氟隆(注册商标)过滤器进行加压过滤，得到15重量％的聚酰亚胺前体清漆。
[2]聚酰亚胺膜的制作
将在合成例2中所得到的作为耐热性树脂膜的聚酰亚胺前体清漆，在作为半导体基板的5英寸硅晶片上进行旋转涂敷，并分别在加热板上以130℃加热处理2分钟，利用扩散炉在氢气气氛下以200℃加热处理30分钟，以350℃加热处理60分钟，得到具有膜厚5μm的聚酰亚胺(β)膜的硅基板(Y)。
[3]等离子处理
将所得到的具有聚酰亚胺(β)膜的硅基板(Y)，利用日本真空(公司)制的CSE-1110叶片式等离子蚀刻装置，在氮总流量25cc/min、压力10Pa、高频电力100W的条件下进行2分钟的等离子处理。将所得到的已完成氮等离子处理的具有聚酰亚胺膜的硅基板，利用配置有玻璃刀的切割机切出1cm角，作为粘接性评价用下层芯片。
[4]电路粘接构件
与实施例1相同，利用2mm宽的ACF材料即日立化成工业(公司)制的AC-8408。
[5]压接
与实施例1同样地，将评价用IC芯片作为粘接性评价用上层芯片，将上述已完成氮等离子处理的具有聚酰亚胺(β)膜的硅基板作为下层芯片，并挟持ACF材料制AC-8408，且将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，得到评价用电极半导体基板。
[6]评价
与实施例1同样地，将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时。与未处理样品一起，利用Dage制的Series4000接合强度测试机，进行260℃下的粘接强度和破坏模式的比较评价。结果如表1所示。
(实施例3)
[1](合成例3)聚苯并
Figure BDA00003055478300121
唑前体清漆的制作
聚苯并唑前体的合成
在具有搅拌机及温度计的0.5升的烧瓶中，加入21.7g(0.084mol)的4，4’-二羧基二苯醚和125.0g的N-甲基吡咯烷酮，并将烧瓶冷却到0℃，且将反应温度保持在10℃以下而滴加20.0g(0.168mol)的亚硫酰氯。在亚硫酰氯滴加完之后，在10℃左右，搅拌30分钟，得到4，4’-二羧基二苯醚的二氯化物溶液。
在具有温度计、搅拌装置、冷凝管及氮气导入管的四口分离烧瓶中，加入100g的N-甲基吡咯烷酮，并添加37.0g(0.10mol)的2，2-双(3-氨基-4-羟苯基)-1，1，1，3，3，3-六氟丙烷，进行搅拌溶解后，添加26.6g的吡啶。将该溶液进行冷却且使温度保持在0～10℃，并将1，4-二羧基环已烷二氯化物溶液在30分钟的时间内进行滴加，之后在10℃左右温度下搅拌30分钟。将反应液投入到4升的水中，并将析出物进行回收且清洗后，在40℃下减压干燥2天得到聚羟基酰胺。
将15.0g的上述聚羟基酰胺，溶解在溶解了树脂成分的1重量％的γ-氨丙基三乙氧基硅烷的N-甲基-2-吡咯烷酮溶液22.5g中，之后利用1μm孔径的特氟隆(注册商标)过滤器进行加压过滤，得到40重量％的聚苯并
Figure BDA00003055478300132
唑前体清漆。
[2]聚苯并唑膜的制作
将在合成例3中所得到的作为耐热性树脂膜的聚苯并
Figure BDA00003055478300134
唑前体清漆，在作为半导体基板的5英寸硅晶片上进行旋转涂敷，并分别在加热板上以120℃加热处理2分钟，利用扩散炉在氮气氛下以200℃加热处理30分钟，以320℃加热处理60分钟，得到具有膜厚5μm的聚苯并
Figure BDA00003055478300135
唑(γ)膜的硅基板(Z)。
[3]等离子处理
将所得到的具有聚苯并唑(γ)膜的硅基板(Z)，利用日本真空(株)制CSE-1110叶片式等离子蚀刻装置，在氮总流量25cc/min、压力10Pa、高频电力100W的条件下进行2分钟的等离子处理。将所得到的已完成氮等离子处理的具有聚苯并
Figure BDA00003055478300137
唑膜的硅基板，利用配置有玻璃刀的切割机切出1cm角，作为粘接性评价用下层芯片。
[4]电路粘接构件
与实施例1相同，利用2mm宽的ACF材料即日立化成工业(株)制AC-8408。
[5]压接
与实施例1同样地，将评价用IC芯片作为粘接性评价用上层芯片，将已完成上述氮等离子处理的硅基板(Z)作为下层芯片，并挟持ACF材料制AC-8408，且以上述构成，将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，而得到评价用电极半导体基板。
[6]评价
与实施例1同样地，将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时，并与未处理样品一起，利用Dage制的Series4000接合强度测试机，进行粘接强度和破坏模式的比较评价。结果如表1所示。
(比较例1)
[5]压接
将实施例1所得到的具有膜厚5μm的聚酰亚胺(α)膜的硅基板(X)，不进行等离子处理而作为下层芯片使用。将评价用IC芯片作为粘接性评价用上层芯片，而粘接薄膜利用2mm宽的ACF材料即日立化成工业(公司)制的AC-8408。以上述构成，将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，而得到评价用电极半导体基板。
[6]评价
与实施例1同样地，将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时，并与未处理样品一起，利用Dage制Series4000接合强度测试机，进行粘接强度和破坏模式的比较评价。结果如表1所示。
(比较例2)
[3]等离子处理
将实施例1所得到的带有膜厚5μm的聚酰亚胺(α)膜的硅基板(X)，利用YAMATO化学(公司)制的PC101A氧等离子装置，在氧总流量100cc/min、压力100Pa、高频电力400W的条件下进行2分钟的等离子处理。将所得到的已完成氧等离子处理的具有聚酰亚胺膜的硅基板，利用配置有玻璃刀的切割机切出1cm角，作为粘接性评价用下层芯片。
[5]压接
将评价用IC芯片作为粘接性评价用上层芯片，将已完成氧等离子处理的硅基板(X)作为下层芯片使用，且粘接薄膜利用2mm宽的ACF材料即日立化成工业(公司)制的AC-8408。以上述构成，将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，而得到评价用电极半导体基板。
[6]评价
与实施例1同样地，将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时，并与未处理样品一起，利用Dage制的Series4000接合强度测试机，进行粘接强度和破坏模式的比较评价。结果如表1所示。
(比较例3)
[3]等离子处理
将所得到的具有膜厚5μm的聚酰亚胺(α)膜的硅基板(X)，利用日本真空制CSE-1110叶片式等离子蚀刻装置，在四氟化甲烷总流量25cc/min、压力10Pa、高频电力100W条件下进行2分钟的等离子处理。将所得到的已完成四氟化甲烷等离子处理的具有聚酰亚胺膜的硅基板，利用配置有玻璃刀的切割机切出1cm角，作为粘接性评价用下层芯片。
[5]压接
将评价用IC芯片作为粘接性评价用上层芯片，将已完成四氟化甲烷等离子处理的硅基板(X)作为下层芯片使用，且粘接薄膜利用2mm宽的ACF材料即日立化成工业(公司)制的AC-8408。以上述构成，将加热温度设定为160℃，以每总电极面积50MPa进行10秒钟加热压接，而得到评价用电极半导体基板。
[6]评价
与实施例1同样地，将所得到的评价用电极半导体基板，投入到121℃、2atm、100RH％的压力蒸煮器试验机中24小时及48小时，并与未处理样品一起，利用Dage制Series4000接合强度测试机，进行粘接强度和破坏模式的比较评价。结果如表1所示。
将以上的实施例1～3及比较例1～3的评价结果，在表1中汇总表示。
[表1]
Figure BDA00003055478300161
PI*：聚酰业胺(α)
由表1可知，在实施例1～3中，即使将评价用电极半导体基板投入到压力蒸煮器试验机中24小时及48小时后，也可维持与初期值相同的粘接强度。另外，粘接强度评价中的破坏模式是ACF自身的破坏，且ACF和耐热性树脂膜的粘接得以保持。与此相对，在比较例1～3中，在将评价用电极半导体基板投入到压力蒸煮器试验机中24小时及48小时后粘接强度显著下降。另外，粘接强度评价中的破坏模式是在ACF凝集破坏发生之前，在聚酰亚胺(α)和ACF间的界面上产生剥离。因此可知，利用本发明的电路连接结构体可在长期维持高粘接强度。
产业上的可利用性
如以上所述，本发明的电路连接结构体及其制造方法以及电路连接结构体用的半导体基板，即使在高温高湿环境下也可长期维持良好的粘接性，能够得到具有高可信性的电路连接结构体，所以对各种小型半导体制品是有用的，特别适用于在高温高湿环境下所使用的例如车载用半导体制品、车载用液晶显示装置等。

Claims (8)

1.一种电路连接结构体的制造方法，其特征在于，包括：
使用含有从氮气、氨气及肼气体构成的组中选择的至少一种气体的氮系气体，对表面具有耐热性树脂膜及第一电路电极的半导体基板进行等离子处理，从而进行在耐热性树脂膜的表面形成酰胺基或氨基的表面改性处理的工序；
使通过进行所述表面改性处理的工序进行表面改性处理的半导体基板、和在表面具有与所述第一电路电极对置的第二电路电极的电路构件隔着电路粘接构件，以所述第一及第二电路电极对置的方式进行配置的工序；以及
将所述半导体基板及所述电路构件进行压接，使所述半导体基板及所述电路构件进行粘接，且将对置的所述第一及第二电路电极彼此进行电连接的压接工序，
所述电路粘接构件为含有环氧系树脂的粘接薄膜或粘接膏。
2.根据权利要求1所述的电路连接结构体的制造方法，其特征在于，
所述电路粘接构件含有导电性粒子，且所述第一及第二电路电极经由所述导电性粒子进行电连接。
3.根据权利要求1所述的电路连接结构体的制造方法，其特征在于，
代替所述氮系气体而使用除了所述氮系气体之外还包含氢气或惰性气体的混合气体。
4.根据权利要求3所述的电路连接结构体的制造方法，其特征在于，
所述氮系气体相对于所述混合气体的比率为20容积％以上且低于100容积％。
5.根据权利要求1所述的电路连接结构体的制造方法，其特征在于，
所述等离子处理是在0.5Pa到常压范围的压力下进行。
6.根据权利要求1所述的电路连接结构体的制造方法，其特征在于，
所述半导体基板为半导体元件。
7.根据权利要求1所述的电路连接结构体的制造方法，其特征在于，
所述电路构件为玻璃基板、金属基板或陶瓷基板。
8.一种电路连接结构体，其特征在于，
所述电路连接结构体是利用权利要求1所述的电路连接结构体的制造方法进行制造的。
CN2013101308956A 2005-08-22 2006-08-22 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板 Pending CN103258753A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005-240204 2005-08-22
JP2005240204A JP4691417B2 (ja) 2005-08-22 2005-08-22 回路接続構造体及びその製造方法及び回路接続構造体用の半導体基板

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CNA200680030441XA Division CN101243548A (zh) 2005-08-22 2006-08-22 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板

Publications (1)

Publication Number Publication Date
CN103258753A true CN103258753A (zh) 2013-08-21

Family

ID=37771526

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2013101308956A Pending CN103258753A (zh) 2005-08-22 2006-08-22 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板
CNA200680030441XA Pending CN101243548A (zh) 2005-08-22 2006-08-22 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板

Family Applications After (1)

Application Number Title Priority Date Filing Date
CNA200680030441XA Pending CN101243548A (zh) 2005-08-22 2006-08-22 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板

Country Status (7)

Country Link
US (1) US8148204B2 (zh)
EP (1) EP1918989A4 (zh)
JP (1) JP4691417B2 (zh)
KR (1) KR101174606B1 (zh)
CN (2) CN103258753A (zh)
TW (1) TWI386121B (zh)
WO (1) WO2007023781A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4691417B2 (ja) 2005-08-22 2011-06-01 日立化成デュポンマイクロシステムズ株式会社 回路接続構造体及びその製造方法及び回路接続構造体用の半導体基板
JP4892209B2 (ja) 2005-08-22 2012-03-07 日立化成デュポンマイクロシステムズ株式会社 半導体装置の製造方法
JP5151584B2 (ja) * 2008-03-17 2013-02-27 富士通株式会社 半導体装置及び半導体装置の製造方法
JP5965185B2 (ja) * 2012-03-30 2016-08-03 デクセリアルズ株式会社 回路接続材料、及びこれを用いた半導体装置の製造方法
KR101526278B1 (ko) * 2012-12-21 2015-06-05 제일모직주식회사 경화 필름과 도전 필름을 포함하는 분리형 이방 도전성 필름
CN106220885B (zh) * 2016-08-23 2019-04-02 万达集团股份有限公司 一种聚酰亚胺薄膜表面处理方法及处理装置
WO2018042701A1 (ja) 2016-08-30 2018-03-08 日立化成株式会社 接着剤組成物
KR20200103043A (ko) * 2017-12-28 2020-09-01 히타치가세이가부시끼가이샤 접속 구조체 및 그의 제조 방법
JP7160302B2 (ja) * 2018-01-31 2022-10-25 三国電子有限会社 接続構造体および接続構造体の作製方法
JP7046351B2 (ja) 2018-01-31 2022-04-04 三国電子有限会社 接続構造体の作製方法
JP7185252B2 (ja) 2018-01-31 2022-12-07 三国電子有限会社 接続構造体の作製方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225993A (ja) * 1990-01-31 1991-10-04 Hitachi Chem Co Ltd 配線板の製造法
TW462904B (en) * 1999-02-19 2001-11-11 Unaxis Balzers Ag Method to manufacture components, their applications, workpiece placed in the air, and the vacuum treatment chamber
US20030049937A1 (en) * 2001-09-05 2003-03-13 Naoki Suzuki Apparatus and method for surface treatment to substrate

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55104007A (en) 1979-02-01 1980-08-09 Kokoku Rubber Ind Adhesive anisotripic conductive substance and shorting member using same
JPS59158531A (ja) 1983-02-28 1984-09-08 Sanken Electric Co Ltd 半導体素子の表面安定化法
JPS60262430A (ja) 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
KR920003431B1 (ko) * 1988-02-05 1992-05-01 가부시끼가이샤 한도다이 에네르기 겐뀨쇼 플라즈마 처리 방법 및 장치
JP2664265B2 (ja) 1989-03-20 1997-10-15 株式会社日立製作所 金属／有機高分子合成樹脂複合体及びその製造方法
JPH0613433A (ja) * 1992-06-29 1994-01-21 Matsushita Electric Ind Co Ltd フリップチップの実装方法
JPH0794540A (ja) * 1993-09-21 1995-04-07 Sony Corp 半導体装置の製造方法
JP3521721B2 (ja) * 1997-12-25 2004-04-19 セイコーエプソン株式会社 電子部品の実装方法および装置
JP4239310B2 (ja) 1998-09-01 2009-03-18 ソニー株式会社 半導体装置の製造方法
TWI332027B (en) * 2000-12-28 2010-10-21 Hitachi Chemical Co Ltd Circuit connecting adhesive with anisotropic conductivity connecting method of circuit board and circuit connecting construction by using the adhesive
US6869831B2 (en) * 2001-09-14 2005-03-22 Texas Instruments Incorporated Adhesion by plasma conditioning of semiconductor chip surfaces
JP2003145674A (ja) * 2001-11-08 2003-05-20 Learonal Japan Inc 樹脂複合材料の形成方法
JP2003163451A (ja) * 2001-11-27 2003-06-06 Shin Etsu Chem Co Ltd フレキシブル印刷配線用基板
JP2005183599A (ja) * 2003-12-18 2005-07-07 Mitsubishi Gas Chem Co Inc Ｂステージ樹脂組成物シートおよびこれを用いたフリップチップ搭載用プリント配線板の製造方法。
JP2006005302A (ja) * 2004-06-21 2006-01-05 Matsushita Electric Ind Co Ltd フレキシブル基板およびその製造方法
JP4513532B2 (ja) * 2004-12-01 2010-07-28 セイコーエプソン株式会社 半導体装置の製造方法
JP4691417B2 (ja) 2005-08-22 2011-06-01 日立化成デュポンマイクロシステムズ株式会社 回路接続構造体及びその製造方法及び回路接続構造体用の半導体基板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225993A (ja) * 1990-01-31 1991-10-04 Hitachi Chem Co Ltd 配線板の製造法
TW462904B (en) * 1999-02-19 2001-11-11 Unaxis Balzers Ag Method to manufacture components, their applications, workpiece placed in the air, and the vacuum treatment chamber
US20030049937A1 (en) * 2001-09-05 2003-03-13 Naoki Suzuki Apparatus and method for surface treatment to substrate

Also Published As

Publication number Publication date
EP1918989A4 (en) 2012-07-04
TW200719778A (en) 2007-05-16
US20090189254A1 (en) 2009-07-30
US8148204B2 (en) 2012-04-03
EP1918989A1 (en) 2008-05-07
CN101243548A (zh) 2008-08-13
KR20080036079A (ko) 2008-04-24
JP4691417B2 (ja) 2011-06-01
TWI386121B (zh) 2013-02-11
JP2007059480A (ja) 2007-03-08
WO2007023781A1 (ja) 2007-03-01
KR101174606B1 (ko) 2012-08-16

Similar Documents

Publication Publication Date Title
CN103258753A (zh) 电路连接结构体及其制造方法以及电路连接结构体用的半导体基板
US5442240A (en) Method of adhesion to a polyimide surface by formation of covalent bonds
KR0134165B1 (ko) 절연성 접착테이프
TWI351414B (zh)
CN101421886B (zh) 电路连接用粘接膜、电路部件的连接结构以及电路部件的连接方法
KR20050029114A (ko) 전자 장치의 제조 동안의 부착력 생성 방법
KR100602537B1 (ko) 반도체 접속 기판용 접착제 부착 테이프 및 그것을 사용한동박 적층판
WO2008023565A1 (fr) Matériau de connexion de circuit, structure de connexion pour élément de circuit l'utilisant et son procédé de production
KR101284512B1 (ko) 반도체 장치의 제조 방법
JPH0967559A (ja) 電子部品用接着テープ及び液状接着剤
EP2857470A1 (en) Adhesive sheet for production of semiconductor device having bump electrodes and production method for semiconductor device
JP2004130748A (ja) 積層体
JP5332799B2 (ja) 半導体封止用フィルム状接着剤、半導体装置及びその製造方法
JP5890253B2 (ja) 熱伝導性熱硬化型接着剤組成物及び熱伝導性熱硬化型接着剤シート
JP5125165B2 (ja) 表面改質処理方法、電極接続基板及び半導体装置の製造方法
JPS6183228A (ja) 溶剤可溶性ポリイミド
JP5671778B2 (ja) 半導体封止用フィルム状接着剤、半導体装置及びその製造方法
Khoshnaw Evaluation the moisture effects on the performance of electronic devices
KR100580567B1 (ko) Ｌｏｃ용 양면 테이프
JP3505769B2 (ja) 耐熱性接着材料
JPH02170857A (ja) ポリイミド膜形成溶液
JP2004119906A (ja) 回路電極の接続方法
JPH11100504A (ja) 厚さ方向導電シート及びその製造方法
JP2000286281A (ja) 転写バンプシート
TW200838973A (en) Binder for circuit connection

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20130821