CN103081066A - 半导体构造和在开口内提供导电材料的方法 - Google Patents

半导体构造和在开口内提供导电材料的方法 Download PDF

Info

Publication number
CN103081066A
CN103081066A CN2011800401938A CN201180040193A CN103081066A CN 103081066 A CN103081066 A CN 103081066A CN 2011800401938 A CN2011800401938 A CN 2011800401938A CN 201180040193 A CN201180040193 A CN 201180040193A CN 103081066 A CN103081066 A CN 103081066A
Authority
CN
China
Prior art keywords
copper
metal
containing material
opening
ruthenium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011800401938A
Other languages
English (en)
Chinese (zh)
Inventor
戴尔·W·柯林斯
乔·林格伦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of CN103081066A publication Critical patent/CN103081066A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76882Reflowing or applying of pressure to better fill the contact hole
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846Layer combinations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Semiconductor Memories (AREA)
CN2011800401938A 2010-08-20 2011-07-22 半导体构造和在开口内提供导电材料的方法 Pending CN103081066A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/860,745 US9177917B2 (en) 2010-08-20 2010-08-20 Semiconductor constructions
US12/860,745 2010-08-20
PCT/US2011/045067 WO2012024056A2 (en) 2010-08-20 2011-07-22 Semiconductor constructions; and methods for providing electrically conductive material within openings

Publications (1)

Publication Number Publication Date
CN103081066A true CN103081066A (zh) 2013-05-01

Family

ID=45593412

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011800401938A Pending CN103081066A (zh) 2010-08-20 2011-07-22 半导体构造和在开口内提供导电材料的方法

Country Status (7)

Country Link
US (3) US9177917B2 (enExample)
JP (1) JP2013534370A (enExample)
KR (1) KR20130044354A (enExample)
CN (1) CN103081066A (enExample)
SG (1) SG188236A1 (enExample)
TW (1) TWI443775B (enExample)
WO (1) WO2012024056A2 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105633005A (zh) * 2014-10-30 2016-06-01 中芯国际集成电路制造(上海)有限公司 铜互连结构的制作方法
WO2017024540A1 (en) * 2015-08-12 2017-02-16 Acm Research (Shanghai) Inc. Method for processing interconnection structure for minimizing barrier sidewall recess
CN109994423A (zh) * 2017-11-28 2019-07-09 台湾积体电路制造股份有限公司 用于半导体互连结构的物理汽相沉积工艺
CN112201618A (zh) * 2020-09-30 2021-01-08 上海华力集成电路制造有限公司 一种优化衬垫层质量的方法

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8791018B2 (en) * 2006-12-19 2014-07-29 Spansion Llc Method of depositing copper using physical vapor deposition
US9177917B2 (en) 2010-08-20 2015-11-03 Micron Technology, Inc. Semiconductor constructions
JP5767570B2 (ja) * 2011-01-27 2015-08-19 東京エレクトロン株式会社 Cu配線の形成方法およびCu膜の成膜方法、ならびに成膜システム
US8859422B2 (en) * 2011-01-27 2014-10-14 Tokyo Electron Limited Method of forming copper wiring and method and system for forming copper film
US8530320B2 (en) * 2011-06-08 2013-09-10 International Business Machines Corporation High-nitrogen content metal resistor and method of forming same
US9330939B2 (en) * 2012-03-28 2016-05-03 Applied Materials, Inc. Method of enabling seamless cobalt gap-fill
JP2014033139A (ja) * 2012-08-06 2014-02-20 Ulvac Japan Ltd デバイスの製造方法
JP2014086537A (ja) * 2012-10-23 2014-05-12 Ulvac Japan Ltd Cu層形成方法及び半導体装置の製造方法
JP6227440B2 (ja) * 2014-02-24 2017-11-08 東京エレクトロン株式会社 凹部にコバルトを供給する方法
TWI773839B (zh) * 2017-10-14 2022-08-11 美商應用材料股份有限公司 用於beol 互連的ald 銅與高溫pvd 銅沉積的集成
WO2020018092A1 (en) * 2018-07-18 2020-01-23 Halliburton Energy Services, Inc. Extraordinary ir-absorption in sio2 thin films with a foreign or attenuating material applied
US12183631B2 (en) 2021-07-02 2024-12-31 Applied Materials, Inc. Methods for copper doped hybrid metallization for line and via

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891803A (en) * 1996-06-26 1999-04-06 Intel Corporation Rapid reflow of conductive layers by directional sputtering for interconnections in integrated circuits
JPH11260820A (ja) * 1998-03-13 1999-09-24 Ulvac Corp 銅系配線膜の加圧埋込方法
CN1272224A (zh) * 1997-09-30 2000-11-01 因芬尼昂技术股份公司 用多步淀积/退火工艺改进的利用掺杂硅酸盐玻璃的半导体结构的间隙填充
JP2001007049A (ja) * 1999-06-25 2001-01-12 Hitachi Ltd 半導体集積回路装置の製造方法およびその製造装置
CN1591856A (zh) * 2003-09-04 2005-03-09 台湾积体电路制造股份有限公司 内联机结构及其制造方法
US20070052096A1 (en) * 2005-08-23 2007-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for forming the same
CN101174608A (zh) * 2006-10-31 2008-05-07 国际商业机器公司 具有互连结构的半导体器件及其制造方法
US20080132050A1 (en) * 2006-12-05 2008-06-05 Lavoie Adrien R Deposition process for graded cobalt barrier layers

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3294041B2 (ja) 1994-02-21 2002-06-17 株式会社東芝 半導体装置
JP3337876B2 (ja) * 1994-06-21 2002-10-28 株式会社東芝 半導体装置の製造方法
US6090701A (en) 1994-06-21 2000-07-18 Kabushiki Kaisha Toshiba Method for production of semiconductor device
JP3386889B2 (ja) 1994-07-01 2003-03-17 マツダ株式会社 稼動管理装置
JP2985692B2 (ja) 1994-11-16 1999-12-06 日本電気株式会社 半導体装置の配線構造及びその製造方法
US6605197B1 (en) * 1997-05-13 2003-08-12 Applied Materials, Inc. Method of sputtering copper to fill trenches and vias
JPH1154612A (ja) 1997-07-30 1999-02-26 Sony Corp 半導体装置およびその製造方法
JPH11186273A (ja) 1997-12-19 1999-07-09 Ricoh Co Ltd 半導体装置及びその製造方法
JP3815875B2 (ja) 1997-12-24 2006-08-30 株式会社カネカ 集積型薄膜光電変換装置の製造方法
US6068785A (en) 1998-02-10 2000-05-30 Ferrofluidics Corporation Method for manufacturing oil-based ferrofluid
JP2000150653A (ja) * 1998-09-04 2000-05-30 Seiko Epson Corp 半導体装置の製造方法
JP3892621B2 (ja) 1999-04-19 2007-03-14 株式会社神戸製鋼所 配線膜の形成方法
KR100361207B1 (ko) 1999-12-29 2002-11-18 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성방법
US6292052B1 (en) 2000-03-06 2001-09-18 Tektronix, Inc. Output amplifier for a discrete filter-less optical reference receiver
JP4005295B2 (ja) 2000-03-31 2007-11-07 富士通株式会社 半導体装置の製造方法
US6399512B1 (en) * 2000-06-15 2002-06-04 Cypress Semiconductor Corporation Method of making metallization and contact structures in an integrated circuit comprising an etch stop layer
US6433402B1 (en) * 2000-11-16 2002-08-13 Advanced Micro Devices, Inc. Selective copper alloy deposition
TW518680B (en) * 2001-06-13 2003-01-21 Matsushita Electric Industrial Co Ltd Semiconductor device and method for fabricating the same
JP4555540B2 (ja) * 2002-07-08 2010-10-06 ルネサスエレクトロニクス株式会社 半導体装置
US8241701B2 (en) * 2005-08-31 2012-08-14 Lam Research Corporation Processes and systems for engineering a barrier surface for copper deposition
US7074721B2 (en) * 2003-04-03 2006-07-11 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming thick copper self-aligned dual damascene
DE10319135B4 (de) * 2003-04-28 2006-07-27 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Elektroplattieren von Kupfer über einer strukturierten dielektrischen Schicht, um die Prozess-Gleichförmigkeit eines nachfolgenden CMP-Prozesses zu verbessern
US7192495B1 (en) * 2003-08-29 2007-03-20 Micron Technology, Inc. Intermediate anneal for metal deposition
US8158532B2 (en) * 2003-10-20 2012-04-17 Novellus Systems, Inc. Topography reduction and control by selective accelerator removal
US7709958B2 (en) * 2004-06-18 2010-05-04 Uri Cohen Methods and structures for interconnect passivation
KR100602086B1 (ko) * 2004-07-13 2006-07-19 동부일렉트로닉스 주식회사 반도체 소자의 배선 형성방법
US7098128B2 (en) * 2004-09-01 2006-08-29 Micron Technology, Inc. Method for filling electrically different features
JP4595464B2 (ja) 2004-09-22 2010-12-08 ソニー株式会社 Cmos固体撮像素子の製造方法
US7115985B2 (en) * 2004-09-30 2006-10-03 Agere Systems, Inc. Reinforced bond pad for a semiconductor device
US7367486B2 (en) 2004-09-30 2008-05-06 Agere Systems, Inc. System and method for forming solder joints
US20060240187A1 (en) * 2005-01-27 2006-10-26 Applied Materials, Inc. Deposition of an intermediate catalytic layer on a barrier layer for copper metallization
JP3904578B2 (ja) * 2005-04-08 2007-04-11 シャープ株式会社 半導体装置の製造方法
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
US7666776B2 (en) * 2005-09-01 2010-02-23 Micron Technology, Inc. Methods of forming conductive structures
US7626815B2 (en) 2005-11-14 2009-12-01 Nvidia Corporation Drive bay heat exchanger
US8916232B2 (en) * 2006-08-30 2014-12-23 Lam Research Corporation Method for barrier interface preparation of copper interconnect
JP2008071850A (ja) 2006-09-13 2008-03-27 Sony Corp 半導体装置の製造方法
JP2008141051A (ja) 2006-12-04 2008-06-19 Ulvac Japan Ltd 半導体装置の製造方法及び半導体装置の製造装置
US20080296768A1 (en) 2006-12-14 2008-12-04 Chebiam Ramanan V Copper nucleation in interconnects having ruthenium layers
US7786006B2 (en) * 2007-02-26 2010-08-31 Tokyo Electron Limited Interconnect structures with a metal nitride diffusion barrier containing ruthenium and method of forming
US7859113B2 (en) * 2007-02-27 2010-12-28 International Business Machines Corporation Structure including via having refractory metal collar at copper wire and dielectric layer liner-less interface and related method
US7858525B2 (en) * 2007-03-30 2010-12-28 Intel Corporation Fluorine-free precursors and methods for the deposition of conformal conductive films for nanointerconnect seed and fill
EP2142682B1 (en) * 2007-04-09 2014-12-03 President and Fellows of Harvard College Cobalt nitride layers for copper interconnects and methods for forming them
JP2009016520A (ja) 2007-07-04 2009-01-22 Tokyo Electron Ltd 半導体装置の製造方法及び半導体装置の製造装置
JP5377844B2 (ja) 2007-10-23 2013-12-25 Ntn株式会社 固定式等速自在継手
JP2009105289A (ja) 2007-10-24 2009-05-14 Tokyo Electron Ltd Cu配線の形成方法
US7799674B2 (en) * 2008-02-19 2010-09-21 Asm Japan K.K. Ruthenium alloy film for copper interconnects
JP2010153487A (ja) 2008-12-24 2010-07-08 Panasonic Corp 半導体装置及びその製造方法
US7964966B2 (en) * 2009-06-30 2011-06-21 International Business Machines Corporation Via gouged interconnect structure and method of fabricating same
US8232646B2 (en) * 2010-01-21 2012-07-31 International Business Machines Corporation Interconnect structure for integrated circuits having enhanced electromigration resistance
US20110204518A1 (en) * 2010-02-23 2011-08-25 Globalfoundries Inc. Scalability with reduced contact resistance
US9177917B2 (en) 2010-08-20 2015-11-03 Micron Technology, Inc. Semiconductor constructions
US8517769B1 (en) * 2012-03-16 2013-08-27 Globalfoundries Inc. Methods of forming copper-based conductive structures on an integrated circuit device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5891803A (en) * 1996-06-26 1999-04-06 Intel Corporation Rapid reflow of conductive layers by directional sputtering for interconnections in integrated circuits
CN1272224A (zh) * 1997-09-30 2000-11-01 因芬尼昂技术股份公司 用多步淀积/退火工艺改进的利用掺杂硅酸盐玻璃的半导体结构的间隙填充
JPH11260820A (ja) * 1998-03-13 1999-09-24 Ulvac Corp 銅系配線膜の加圧埋込方法
JP2001007049A (ja) * 1999-06-25 2001-01-12 Hitachi Ltd 半導体集積回路装置の製造方法およびその製造装置
CN1591856A (zh) * 2003-09-04 2005-03-09 台湾积体电路制造股份有限公司 内联机结构及其制造方法
US20070052096A1 (en) * 2005-08-23 2007-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for forming the same
CN101174608A (zh) * 2006-10-31 2008-05-07 国际商业机器公司 具有互连结构的半导体器件及其制造方法
US20080132050A1 (en) * 2006-12-05 2008-06-05 Lavoie Adrien R Deposition process for graded cobalt barrier layers

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105633005A (zh) * 2014-10-30 2016-06-01 中芯国际集成电路制造(上海)有限公司 铜互连结构的制作方法
WO2017024540A1 (en) * 2015-08-12 2017-02-16 Acm Research (Shanghai) Inc. Method for processing interconnection structure for minimizing barrier sidewall recess
US10217662B2 (en) 2015-08-12 2019-02-26 Acm Research (Shanghai) Inc. Method for processing interconnection structure for minimizing barrier sidewall recess
CN109994423A (zh) * 2017-11-28 2019-07-09 台湾积体电路制造股份有限公司 用于半导体互连结构的物理汽相沉积工艺
CN112201618A (zh) * 2020-09-30 2021-01-08 上海华力集成电路制造有限公司 一种优化衬垫层质量的方法

Also Published As

Publication number Publication date
WO2012024056A3 (en) 2012-04-19
US20120043658A1 (en) 2012-02-23
US9177917B2 (en) 2015-11-03
US20160056073A1 (en) 2016-02-25
US20180374745A1 (en) 2018-12-27
TW201216410A (en) 2012-04-16
WO2012024056A2 (en) 2012-02-23
US10879113B2 (en) 2020-12-29
SG188236A1 (en) 2013-04-30
JP2013534370A (ja) 2013-09-02
TWI443775B (zh) 2014-07-01
KR20130044354A (ko) 2013-05-02
US10121697B2 (en) 2018-11-06

Similar Documents

Publication Publication Date Title
US10879113B2 (en) Semiconductor constructions; and methods for providing electrically conductive material within openings
US20220336271A1 (en) Doped selective metal caps to improve copper electromigration with ruthenium liner
KR100446300B1 (ko) 반도체 소자의 금속 배선 형성 방법
EP1313140A1 (en) Method of forming a liner for tungsten plugs
JP2020523484A (ja) ニッケルシリサイドの抵抗値を調整するためのプロセス統合方法
JP7309697B2 (ja) 基板のフィーチャをコバルトで充填する方法および装置
US10854511B2 (en) Methods of lowering wordline resistance
CN104241197A (zh) 在具有高薄层电阻的工件上的电化学沉积
JP5526189B2 (ja) Cu膜の形成方法
CN101944504A (zh) 集成电路阻挡层和集成电路结构的制备方法
US7224065B2 (en) Contact/via force fill techniques and resulting structures
TW201001550A (en) Adhesion and electromigration improvement between dielectric and conductive layers
JP4217012B2 (ja) 半導体素子の金属配線形成方法
JP2001007049A (ja) 半導体集積回路装置の製造方法およびその製造装置
US6528415B2 (en) Method of forming a metal line in a semiconductor device
JP2018117065A (ja) 金属膜の埋め込み方法
JP2004311545A (ja) 半導体装置の製造方法及び高融点金属膜の堆積装置
US5149672A (en) Process for fabricating integrated circuits having shallow junctions
KR20030089756A (ko) 삼원계 확산배리어막의 형성 방법 및 그를 이용한구리배선의 형성 방법
JP7449790B2 (ja) 金属配線の形成方法及び金属配線の構造体
US20070141822A1 (en) Multi-step anneal method
KR100440470B1 (ko) 반도체 소자 제조 방법
TWI683919B (zh) Cu膜之形成方法
KR20030002034A (ko) 구리배선의 삼원계 확산방지막의 형성 방법
US20080157372A1 (en) Metal Line of Semiconductor Device and Manufacturing Method Thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20130501

RJ01 Rejection of invention patent application after publication