CN101512906B - 折叠电路和模数转换器 - Google Patents

折叠电路和模数转换器 Download PDF

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Publication number
CN101512906B
CN101512906B CN2007800328404A CN200780032840A CN101512906B CN 101512906 B CN101512906 B CN 101512906B CN 2007800328404 A CN2007800328404 A CN 2007800328404A CN 200780032840 A CN200780032840 A CN 200780032840A CN 101512906 B CN101512906 B CN 101512906B
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CN
China
Prior art keywords
output
circuit
differential
distributed amplifier
amplifier circuit
Prior art date
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Expired - Fee Related
Application number
CN2007800328404A
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English (en)
Chinese (zh)
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CN101512906A (zh
Inventor
大川刚史
尾野孝一
松浦浩二
山下幸利
丰村纯次
中村章吾
金川典史
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Sony Corp
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Sony Corp
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Publication of CN101512906A publication Critical patent/CN101512906A/zh
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0863Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/141Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit in which at least one step is of the folding type; Folding stages therefore
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/20Increasing resolution using an n bit system to obtain n + m bits
    • H03M1/202Increasing resolution using an n bit system to obtain n + m bits by interpolation
    • H03M1/203Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
    • H03M1/204Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators
    • H03M1/205Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators using resistor strings for redistribution of the original reference signals or signals derived therefrom
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Amplifiers (AREA)
CN2007800328404A 2006-09-04 2007-09-04 折叠电路和模数转换器 Expired - Fee Related CN101512906B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006239097A JP4788532B2 (ja) 2006-09-04 2006-09-04 フォールディング回路およびアナログ−デジタル変換器
JP239097/2006 2006-09-04
PCT/JP2007/067161 WO2008029778A1 (fr) 2006-09-04 2007-09-04 Circuit de repliement et convertisseur analogique à numérique

Publications (2)

Publication Number Publication Date
CN101512906A CN101512906A (zh) 2009-08-19
CN101512906B true CN101512906B (zh) 2011-07-27

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007800328404A Expired - Fee Related CN101512906B (zh) 2006-09-04 2007-09-04 折叠电路和模数转换器

Country Status (7)

Country Link
US (1) US7999717B2 (enExample)
EP (1) EP2051382B1 (enExample)
JP (1) JP4788532B2 (enExample)
KR (1) KR20090066269A (enExample)
CN (1) CN101512906B (enExample)
TW (1) TW200820632A (enExample)
WO (1) WO2008029778A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110008959A (ko) 2009-07-21 2011-01-27 삼성전자주식회사 부트스트랩트 클럭 발생기를 갖는 트랙-앤-홀드 회로
KR20110008955A (ko) 2009-07-21 2011-01-27 삼성전자주식회사 트랙-앤-홀드 회로, 및 이를 구비한 폴딩 아날로그-디지탈 변환기
JP2013168880A (ja) * 2012-02-16 2013-08-29 Sony Corp 比較器、ad変換器、固体撮像装置、カメラシステム、および電子機器
JP2013172270A (ja) * 2012-02-20 2013-09-02 Sony Corp 比較器、ad変換器、固体撮像装置、カメラシステム、および電子機器
RU2544768C1 (ru) * 2013-11-08 2015-03-20 Федеральное государственное казенное военное образовательное учреждение высшего профессионального образования Военная академия Ракетных войск стратегического назначения имени Петра Великого МО РФ Устройство обнаружения источника свч излучения
US10250834B2 (en) 2016-09-07 2019-04-02 Semiconductor Components Industries, Llc Methods and apparatus for a voltage-shifting readout circuit
US11049176B1 (en) 2020-01-10 2021-06-29 House Of Skye Ltd Systems/methods for identifying products within audio-visual content and enabling seamless purchasing of such identified products by viewers/users of the audio-visual content

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000165241A (ja) * 1998-11-24 2000-06-16 Hitachi Ltd A/d変換器及び半導体集積回路
CN1447526A (zh) * 2003-04-03 2003-10-08 复旦大学 采用改进型折叠电路的模数转换器

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5307067A (en) * 1992-04-20 1994-04-26 Matsushita Electric Industrial Co., Ltd. Folding circuit and analog-to-digital converter
FR2750549B1 (fr) * 1996-06-28 1998-09-18 Thomson Csf Convertisseur analogique-numerique
DE69719296T2 (de) * 1996-11-21 2003-09-04 Matsushita Electric Industrial Co., Ltd. A/D-Wandler und A/D-Wandlungsverfahren
JPH10173529A (ja) * 1996-12-13 1998-06-26 Sony Corp アナログ/ディジタル変換回路
US6411246B2 (en) * 1999-12-22 2002-06-25 Texas Instruments Incorporated Folding circuit and A/D converter
JP3520233B2 (ja) * 2000-01-21 2004-04-19 春夫 小林 Ad変換回路
US6452529B1 (en) * 2001-01-17 2002-09-17 Qunying Li Fully differential folding A/D converter architecture
US6577185B1 (en) * 2001-03-19 2003-06-10 Cisco Systems Wireless Networking (Australia) Pty. Limited Multi-stage operational amplifier for interstage amplification in a pipeline analog-to-digital converter
CN1290266C (zh) * 2001-09-04 2006-12-13 松下电器产业株式会社 A/d转换器
KR100462888B1 (ko) * 2002-10-24 2004-12-17 삼성전자주식회사 플래쉬 아날로그 디지털 변환회로의 비교기 어레이의배치방법
US7277041B2 (en) * 2003-07-30 2007-10-02 Nxp B.V. Cross-coupled folding circuit and analog-to-digital converter provided with such a folding circuit
US7061419B2 (en) * 2004-08-18 2006-06-13 Matsushita Electric Industrial Co., Ltd. A/D converter and A/D converting system
JP4702066B2 (ja) * 2006-01-13 2011-06-15 ソニー株式会社 アナログ/デジタル変換回路
US7420497B2 (en) * 2006-06-28 2008-09-02 Broadcom Corporation Low offset flash analog-to-digital converter
JP4349445B2 (ja) * 2007-07-10 2009-10-21 ソニー株式会社 フラッシュ型ad変換器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000165241A (ja) * 1998-11-24 2000-06-16 Hitachi Ltd A/d変換器及び半導体集積回路
CN1447526A (zh) * 2003-04-03 2003-10-08 复旦大学 采用改进型折叠电路的模数转换器

Also Published As

Publication number Publication date
WO2008029778A1 (fr) 2008-03-13
US7999717B2 (en) 2011-08-16
TWI344764B (enExample) 2011-07-01
JP4788532B2 (ja) 2011-10-05
EP2051382A1 (en) 2009-04-22
CN101512906A (zh) 2009-08-19
EP2051382B1 (en) 2013-05-08
KR20090066269A (ko) 2009-06-23
TW200820632A (en) 2008-05-01
EP2051382A4 (en) 2011-12-07
US20110001648A1 (en) 2011-01-06
JP2008061206A (ja) 2008-03-13

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Granted publication date: 20110727

Termination date: 20130904