JP4788532B2 - フォールディング回路およびアナログ−デジタル変換器 - Google Patents

フォールディング回路およびアナログ−デジタル変換器 Download PDF

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Publication number
JP4788532B2
JP4788532B2 JP2006239097A JP2006239097A JP4788532B2 JP 4788532 B2 JP4788532 B2 JP 4788532B2 JP 2006239097 A JP2006239097 A JP 2006239097A JP 2006239097 A JP2006239097 A JP 2006239097A JP 4788532 B2 JP4788532 B2 JP 4788532B2
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JP
Japan
Prior art keywords
output
amplifier
differential
group
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006239097A
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English (en)
Japanese (ja)
Other versions
JP2008061206A (ja
Inventor
剛史 大川
孝一 尾野
浩二 松浦
幸利 山下
純次 豊村
章吾 中村
典史 金川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2006239097A priority Critical patent/JP4788532B2/ja
Priority to TW096132749A priority patent/TW200820632A/zh
Priority to CN2007800328404A priority patent/CN101512906B/zh
Priority to PCT/JP2007/067161 priority patent/WO2008029778A1/ja
Priority to US12/439,757 priority patent/US7999717B2/en
Priority to KR1020097004486A priority patent/KR20090066269A/ko
Priority to EP07806629.7A priority patent/EP2051382B1/en
Publication of JP2008061206A publication Critical patent/JP2008061206A/ja
Application granted granted Critical
Publication of JP4788532B2 publication Critical patent/JP4788532B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/141—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit in which at least one step is of the folding type; Folding stages therefore
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
    • H03M1/202—Increasing resolution using an n bit system to obtain n + m bits by interpolation
    • H03M1/203—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
    • H03M1/204—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators
    • H03M1/205—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators using resistor strings for redistribution of the original reference signals or signals derived therefrom
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Amplifiers (AREA)
JP2006239097A 2006-09-04 2006-09-04 フォールディング回路およびアナログ−デジタル変換器 Expired - Fee Related JP4788532B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2006239097A JP4788532B2 (ja) 2006-09-04 2006-09-04 フォールディング回路およびアナログ−デジタル変換器
TW096132749A TW200820632A (en) 2006-09-04 2007-09-03 Folding circuit and analog-to-digital converter
PCT/JP2007/067161 WO2008029778A1 (fr) 2006-09-04 2007-09-04 Circuit de repliement et convertisseur analogique à numérique
US12/439,757 US7999717B2 (en) 2006-09-04 2007-09-04 Folding circuit and analog-to-digital converter
CN2007800328404A CN101512906B (zh) 2006-09-04 2007-09-04 折叠电路和模数转换器
KR1020097004486A KR20090066269A (ko) 2006-09-04 2007-09-04 폴딩 회로 및 아날로그-디지털 변환기
EP07806629.7A EP2051382B1 (en) 2006-09-04 2007-09-04 Folding circuit and analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006239097A JP4788532B2 (ja) 2006-09-04 2006-09-04 フォールディング回路およびアナログ−デジタル変換器

Publications (2)

Publication Number Publication Date
JP2008061206A JP2008061206A (ja) 2008-03-13
JP4788532B2 true JP4788532B2 (ja) 2011-10-05

Family

ID=39157204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006239097A Expired - Fee Related JP4788532B2 (ja) 2006-09-04 2006-09-04 フォールディング回路およびアナログ−デジタル変換器

Country Status (7)

Country Link
US (1) US7999717B2 (enExample)
EP (1) EP2051382B1 (enExample)
JP (1) JP4788532B2 (enExample)
KR (1) KR20090066269A (enExample)
CN (1) CN101512906B (enExample)
TW (1) TW200820632A (enExample)
WO (1) WO2008029778A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110008959A (ko) 2009-07-21 2011-01-27 삼성전자주식회사 부트스트랩트 클럭 발생기를 갖는 트랙-앤-홀드 회로
KR20110008955A (ko) 2009-07-21 2011-01-27 삼성전자주식회사 트랙-앤-홀드 회로, 및 이를 구비한 폴딩 아날로그-디지탈 변환기
JP2013168880A (ja) * 2012-02-16 2013-08-29 Sony Corp 比較器、ａｄ変換器、固体撮像装置、カメラシステム、および電子機器
JP2013172270A (ja) * 2012-02-20 2013-09-02 Sony Corp 比較器、ａｄ変換器、固体撮像装置、カメラシステム、および電子機器
RU2544768C1 (ru) * 2013-11-08 2015-03-20 Федеральное государственное казенное военное образовательное учреждение высшего профессионального образования Военная академия Ракетных войск стратегического назначения имени Петра Великого МО РФ Устройство обнаружения источника свч излучения
US10250834B2 (en) 2016-09-07 2019-04-02 Semiconductor Components Industries, Llc Methods and apparatus for a voltage-shifting readout circuit
US11049176B1 (en) 2020-01-10 2021-06-29 House Of Skye Ltd Systems/methods for identifying products within audio-visual content and enabling seamless purchasing of such identified products by viewers/users of the audio-visual content

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5307067A (en) * 1992-04-20 1994-04-26 Matsushita Electric Industrial Co., Ltd. Folding circuit and analog-to-digital converter
FR2750549B1 (fr) * 1996-06-28 1998-09-18 Thomson Csf Convertisseur analogique-numerique
DE69719296T2 (de) * 1996-11-21 2003-09-04 Matsushita Electric Industrial Co., Ltd. A/D-Wandler und A/D-Wandlungsverfahren
JPH10173529A (ja) * 1996-12-13 1998-06-26 Sony Corp アナログ／ディジタル変換回路
JP2000165241A (ja) * 1998-11-24 2000-06-16 Hitachi Ltd Ａ／ｄ変換器及び半導体集積回路
US6411246B2 (en) * 1999-12-22 2002-06-25 Texas Instruments Incorporated Folding circuit and A/D converter
JP3520233B2 (ja) * 2000-01-21 2004-04-19 春夫 小林 Ａｄ変換回路
US6452529B1 (en) * 2001-01-17 2002-09-17 Qunying Li Fully differential folding A/D converter architecture
US6577185B1 (en) * 2001-03-19 2003-06-10 Cisco Systems Wireless Networking (Australia) Pty. Limited Multi-stage operational amplifier for interstage amplification in a pipeline analog-to-digital converter
CN1290266C (zh) * 2001-09-04 2006-12-13 松下电器产业株式会社 A/d转换器
KR100462888B1 (ko) * 2002-10-24 2004-12-17 삼성전자주식회사 플래쉬 아날로그 디지털 변환회로의 비교기 어레이의배치방법
CN1271788C (zh) * 2003-04-03 2006-08-23 复旦大学 采用改进型折叠电路的模数转换器
US7277041B2 (en) * 2003-07-30 2007-10-02 Nxp B.V. Cross-coupled folding circuit and analog-to-digital converter provided with such a folding circuit
US7061419B2 (en) * 2004-08-18 2006-06-13 Matsushita Electric Industrial Co., Ltd. A/D converter and A/D converting system
JP4702066B2 (ja) * 2006-01-13 2011-06-15 ソニー株式会社 アナログ／デジタル変換回路
US7420497B2 (en) * 2006-06-28 2008-09-02 Broadcom Corporation Low offset flash analog-to-digital converter
JP4349445B2 (ja) * 2007-07-10 2009-10-21 ソニー株式会社 フラッシュ型ａｄ変換器

Also Published As

Publication number Publication date
WO2008029778A1 (fr) 2008-03-13
US7999717B2 (en) 2011-08-16
TWI344764B (enExample) 2011-07-01
EP2051382A1 (en) 2009-04-22
CN101512906B (zh) 2011-07-27
CN101512906A (zh) 2009-08-19
EP2051382B1 (en) 2013-05-08
KR20090066269A (ko) 2009-06-23
TW200820632A (en) 2008-05-01
EP2051382A4 (en) 2011-12-07
US20110001648A1 (en) 2011-01-06
JP2008061206A (ja) 2008-03-13

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