CN100594551C - 保护集成电路免于错误操作的方法和装置 - Google Patents

保护集成电路免于错误操作的方法和装置 Download PDF

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Publication number
CN100594551C
CN100594551C CN200580031462A CN200580031462A CN100594551C CN 100594551 C CN100594551 C CN 100594551C CN 200580031462 A CN200580031462 A CN 200580031462A CN 200580031462 A CN200580031462 A CN 200580031462A CN 100594551 C CN100594551 C CN 100594551C
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CN
China
Prior art keywords
voltage
circuit
signal
response
charge pump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200580031462A
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English (en)
Chinese (zh)
Other versions
CN101023491A (zh
Inventor
詹姆斯·M.·西比格特罗斯
乔治·L.·埃斯皮诺尔
布鲁斯·L.·莫顿
迈克尔·C.·伍德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
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Publication date
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Publication of CN101023491A publication Critical patent/CN101023491A/zh
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Publication of CN100594551C publication Critical patent/CN100594551C/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/104—Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Power Sources (AREA)
CN200580031462A 2004-09-22 2005-08-30 保护集成电路免于错误操作的方法和装置 Expired - Fee Related CN100594551C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/946,951 2004-09-22
US10/946,951 US7187600B2 (en) 2004-09-22 2004-09-22 Method and apparatus for protecting an integrated circuit from erroneous operation
PCT/US2005/031031 WO2006036443A2 (en) 2004-09-22 2005-08-30 Method and apparatus for protecting an integrated circuit from erroneous operation

Publications (2)

Publication Number Publication Date
CN101023491A CN101023491A (zh) 2007-08-22
CN100594551C true CN100594551C (zh) 2010-03-17

Family

ID=36073798

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200580031462A Expired - Fee Related CN100594551C (zh) 2004-09-22 2005-08-30 保护集成电路免于错误操作的方法和装置

Country Status (5)

Country Link
US (1) US7187600B2 (https=)
JP (1) JP5101286B2 (https=)
KR (1) KR101110994B1 (https=)
CN (1) CN100594551C (https=)
WO (1) WO2006036443A2 (https=)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007066037A (ja) * 2005-08-31 2007-03-15 Renesas Technology Corp 半導体集積回路
US7724603B2 (en) * 2007-08-03 2010-05-25 Freescale Semiconductor, Inc. Method and circuit for preventing high voltage memory disturb
US8051467B2 (en) 2008-08-26 2011-11-01 Atmel Corporation Secure information processing
US7969803B2 (en) * 2008-12-16 2011-06-28 Macronix International Co., Ltd. Method and apparatus for protection of non-volatile memory in presence of out-of-specification operating voltage
JP5348541B2 (ja) * 2009-05-20 2013-11-20 ルネサスエレクトロニクス株式会社 半導体装置
JP5328525B2 (ja) * 2009-07-02 2013-10-30 ルネサスエレクトロニクス株式会社 半導体装置
CN102034523B (zh) * 2009-09-27 2013-09-18 上海宏力半导体制造有限公司 半导体存储装置和减少半导体存储装置芯片面积的方法
US8330502B2 (en) * 2009-11-25 2012-12-11 Freescale Semiconductor, Inc. Systems and methods for detecting interference in an integrated circuit
JP5385220B2 (ja) * 2010-06-30 2014-01-08 ルネサスエレクトロニクス株式会社 不揮発性メモリ、データ処理装置、及びマイクロコンピュータ応用システム
JP5085744B2 (ja) 2011-01-05 2012-11-28 株式会社東芝 半導体記憶装置
TWI473099B (zh) * 2011-12-23 2015-02-11 Phison Electronics Corp 記憶體儲存裝置、記憶體控制器與控制方法
US8634267B2 (en) 2012-05-14 2014-01-21 Sandisk Technologies Inc. Flash memory chip power management for data reliability and methods thereof
US8760923B2 (en) * 2012-08-28 2014-06-24 Freescale Semiconductor, Inc. Non-volatile memory (NVM) that uses soft programming
KR102081923B1 (ko) * 2013-02-04 2020-02-26 삼성전자주식회사 메모리 시스템 및 메모리 컨트롤러의 동작 방법
CN106910522B (zh) 2013-08-09 2019-11-05 慧荣科技股份有限公司 数据储存装置及其电压保护方法
TWI482161B (zh) * 2013-08-09 2015-04-21 Silicon Motion Inc 資料儲存裝置及其電壓偵測及資料保護方法
FR3041466B1 (fr) * 2015-09-21 2017-09-08 Stmicroelectronics Rousset Procede de controle du fonctionnement d'un dispositif de memoire de type eeprom, et dispositif correspondant
KR20180101760A (ko) * 2017-03-06 2018-09-14 에스케이하이닉스 주식회사 저장 장치, 데이터 처리 시스템 및 이의 동작 방법
US10747282B2 (en) * 2018-10-17 2020-08-18 Stmicroelectronics International N.V. Test circuit for electronic device permitting interface control between two supply stacks in a production test of the electronic device
TWI682397B (zh) * 2018-12-12 2020-01-11 新唐科技股份有限公司 資料處理系統與資料處理方法
US10586600B1 (en) * 2019-01-28 2020-03-10 Micron Technology, Inc. High-voltage shifter with reduced transistor degradation
US11398282B2 (en) * 2019-05-31 2022-07-26 Micron Technology, Inc. Intelligent charge pump architecture for flash array
US10877541B1 (en) 2019-12-30 2020-12-29 Micron Technology, Inc. Power delivery timing for memory
KR102832602B1 (ko) 2021-04-29 2025-07-09 삼성전자주식회사 스토리지 장치 및 메모리 시스템
US11641160B1 (en) * 2022-05-11 2023-05-02 Nanya Technology Corporation Power providing circuit and power providing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1365116A (zh) * 2001-01-10 2002-08-21 惠普公司 基于不连续性的存储器单元读出
CN1488147A (zh) * 2000-11-27 2004-04-07 ĥ 用于非破坏性读出的方法和使用该方法的设备

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648599A (en) * 1987-06-30 1989-01-12 Sharp Kk Erroneous write preventing method for eeprom or lsi with built-in eeprom
JP2568442B2 (ja) * 1989-07-14 1997-01-08 セイコー電子工業株式会社 半導体集積回路装置
JPH0525536U (ja) * 1991-05-31 1993-04-02 株式会社東芝 不揮発性メモリ制御回路
JPH05109291A (ja) * 1991-10-14 1993-04-30 Toshiba Corp 不揮発性半導体記憶装置
CA2103683C (en) * 1992-08-17 1998-06-16 George Weeks Methods of controlling dust and compositions produced thereby
JPH0721790A (ja) * 1993-07-05 1995-01-24 Mitsubishi Electric Corp 半導体集積回路
JPH07273781A (ja) * 1994-04-04 1995-10-20 Furukawa Electric Co Ltd:The 多重伝送装置
JPH08272625A (ja) * 1995-03-29 1996-10-18 Toshiba Corp マルチプログラム実行制御装置及び方法
JPH08279739A (ja) * 1995-04-06 1996-10-22 Fuji Electric Co Ltd 電子回路用動作指令の制御回路
US5890191A (en) * 1996-05-10 1999-03-30 Motorola, Inc. Method and apparatus for providing erasing and programming protection for electrically erasable programmable read only memory
US5894423A (en) * 1996-12-26 1999-04-13 Motorola Inc. Data processing system having an auto-ranging low voltage detection circuit
US5801987A (en) * 1997-03-17 1998-09-01 Motorola, Inc. Automatic transition charge pump for nonvolatile memories
EP1059578A3 (en) * 1999-06-07 2003-02-05 Hewlett-Packard Company, A Delaware Corporation Secure backdoor access for a computer
JP2002133878A (ja) * 2000-10-23 2002-05-10 Hitachi Ltd 不揮発性記憶回路および半導体集積回路
JP2002182984A (ja) * 2000-12-15 2002-06-28 Toshiba Corp データ処理装置
JP2002245787A (ja) * 2001-02-14 2002-08-30 Sharp Corp 半導体記憶装置
JP2002373495A (ja) * 2001-06-14 2002-12-26 Hitachi Ltd 半導体チップ、半導体集積回路装置及び半導体集積回路装置の製造方法
JP2003044457A (ja) * 2001-07-27 2003-02-14 Hitachi Ltd データプロセッサ
US7023745B2 (en) * 2003-12-29 2006-04-04 Intel Corporation Voltage detect mechanism

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1488147A (zh) * 2000-11-27 2004-04-07 ĥ 用于非破坏性读出的方法和使用该方法的设备
CN1365116A (zh) * 2001-01-10 2002-08-21 惠普公司 基于不连续性的存储器单元读出

Also Published As

Publication number Publication date
KR101110994B1 (ko) 2012-02-17
WO2006036443A3 (en) 2006-10-12
JP5101286B2 (ja) 2012-12-19
WO2006036443A2 (en) 2006-04-06
US20060062070A1 (en) 2006-03-23
KR20070054673A (ko) 2007-05-29
JP2008513925A (ja) 2008-05-01
US7187600B2 (en) 2007-03-06
CN101023491A (zh) 2007-08-22

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GR01 Patent grant
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Address after: Texas in the United States

Patentee after: NXP USA, Inc.

Address before: Texas in the United States

Patentee before: FREESCALE SEMICONDUCTOR, Inc.

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100317

CF01 Termination of patent right due to non-payment of annual fee