JPS648599A - Erroneous write preventing method for eeprom or lsi with built-in eeprom - Google Patents
Erroneous write preventing method for eeprom or lsi with built-in eepromInfo
- Publication number
- JPS648599A JPS648599A JP16447087A JP16447087A JPS648599A JP S648599 A JPS648599 A JP S648599A JP 16447087 A JP16447087 A JP 16447087A JP 16447087 A JP16447087 A JP 16447087A JP S648599 A JPS648599 A JP S648599A
- Authority
- JP
- Japan
- Prior art keywords
- eeprom
- power voltage
- boosting
- prescribed value
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To surely prevent erroneous writing due to malfunction by inhibiting the boosting operation of an internal boosting circuit when a power voltage is a prescribed value or below. CONSTITUTION:A power voltage detecting circuit detects a voltage and inputs a power voltage detection output signal OUT to AND gates AND1, AND2 to control boosting clocks phi1, phi2 (inverse phase to each other). When the power voltage is less than a prescribed value by the output of the circuit, the boosting operation in the internal boosting circuit is inhibited. Thus, no high voltage is generated when the power voltage is a prescribed value or below and erroneous-writing is prevented surely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16447087A JPS648599A (en) | 1987-06-30 | 1987-06-30 | Erroneous write preventing method for eeprom or lsi with built-in eeprom |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16447087A JPS648599A (en) | 1987-06-30 | 1987-06-30 | Erroneous write preventing method for eeprom or lsi with built-in eeprom |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS648599A true JPS648599A (en) | 1989-01-12 |
Family
ID=15793789
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16447087A Pending JPS648599A (en) | 1987-06-30 | 1987-06-30 | Erroneous write preventing method for eeprom or lsi with built-in eeprom |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS648599A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0408368A2 (en) * | 1989-07-14 | 1991-01-16 | Seiko Instruments Inc. | Semi-conductor non-volatile memory device |
US6601003B2 (en) | 2000-03-14 | 2003-07-29 | Nec Electronics Corporation | Operating efficiency of a nonvolatile memory |
JP2008513925A (en) * | 2004-09-22 | 2008-05-01 | フリースケール セミコンダクター インコーポレイテッド | Method and apparatus for protecting integrated circuits from erroneous operation |
-
1987
- 1987-06-30 JP JP16447087A patent/JPS648599A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0408368A2 (en) * | 1989-07-14 | 1991-01-16 | Seiko Instruments Inc. | Semi-conductor non-volatile memory device |
JPH0346198A (en) * | 1989-07-14 | 1991-02-27 | Seiko Instr Inc | Semiconductor integrated circuit device |
US6601003B2 (en) | 2000-03-14 | 2003-07-29 | Nec Electronics Corporation | Operating efficiency of a nonvolatile memory |
JP2008513925A (en) * | 2004-09-22 | 2008-05-01 | フリースケール セミコンダクター インコーポレイテッド | Method and apparatus for protecting integrated circuits from erroneous operation |
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