CN100550318C - 最小化湿法蚀刻底切度并提供极低k值(k<2.5)电介质封孔的方法 - Google Patents

最小化湿法蚀刻底切度并提供极低k值(k<2.5)电介质封孔的方法 Download PDF

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Publication number
CN100550318C
CN100550318C CNB2007101651423A CN200710165142A CN100550318C CN 100550318 C CN100550318 C CN 100550318C CN B2007101651423 A CNB2007101651423 A CN B2007101651423A CN 200710165142 A CN200710165142 A CN 200710165142A CN 100550318 C CN100550318 C CN 100550318C
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China
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layer
film
carbon
silicon
low
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Expired - Fee Related
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Chinese (zh)
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CN101202227A (zh
Inventor
徐惠文
石美仪
夏立群
阿米尔·阿尔-巴亚提
德里克·威蒂
希姆·M·萨德
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Applied Materials Inc
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Applied Materials Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/15—Cleaning before device manufacture, i.e. Begin-Of-Line process by wet cleaning only

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Vapour Deposition (AREA)
CNB2007101651423A 2006-11-21 2007-10-29 最小化湿法蚀刻底切度并提供极低k值(k<2.5)电介质封孔的方法 Expired - Fee Related CN100550318C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US86677006P 2006-11-21 2006-11-21
US60/866,770 2006-11-21
US11/694,856 2007-03-30

Publications (2)

Publication Number Publication Date
CN101202227A CN101202227A (zh) 2008-06-18
CN100550318C true CN100550318C (zh) 2009-10-14

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JP (1) JP5174435B2 (enExample)
KR (1) KR100939593B1 (enExample)
CN (1) CN100550318C (enExample)
TW (1) TWI392024B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102543850A (zh) * 2010-11-17 2012-07-04 应用材料公司 处理低k介电膜的方法

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US8236684B2 (en) * 2008-06-27 2012-08-07 Applied Materials, Inc. Prevention and reduction of solvent and solution penetration into porous dielectrics using a thin barrier layer
CN101740332B (zh) * 2008-11-13 2012-04-25 中芯国际集成电路制造(北京)有限公司 一种半导体元件的蚀刻方法
US9034770B2 (en) * 2012-09-17 2015-05-19 Applied Materials, Inc. Differential silicon oxide etch
CN103839871B (zh) * 2012-11-21 2017-09-08 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
CN105448705B (zh) * 2014-06-18 2018-05-04 无锡华润上华科技有限公司 一种消除晶圆氧化膜上微粒的方法及其氧化膜
CN105244257B (zh) * 2014-07-08 2020-06-23 中芯国际集成电路制造(上海)有限公司 改善多孔低k薄膜的突起缺陷的方法
CN105702619A (zh) * 2014-11-27 2016-06-22 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
US20160225652A1 (en) 2015-02-03 2016-08-04 Applied Materials, Inc. Low temperature chuck for plasma processing systems
CN111863610A (zh) * 2020-05-12 2020-10-30 中国电子科技集团公司第十一研究所 一种制备电极孔的方法及计算机可读存储介质
CN113667976A (zh) * 2021-08-27 2021-11-19 中国科学院兰州化学物理研究所 一种具有封孔顶层的耐蚀dlc薄膜及其制备方法

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JP2001077196A (ja) * 1999-09-08 2001-03-23 Sony Corp 半導体装置の製造方法
TW535253B (en) * 2000-09-08 2003-06-01 Applied Materials Inc Plasma treatment of silicon carbide films
US6890850B2 (en) * 2001-12-14 2005-05-10 Applied Materials, Inc. Method of depositing dielectric materials in damascene applications
US6936551B2 (en) * 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US6927178B2 (en) * 2002-07-11 2005-08-09 Applied Materials, Inc. Nitrogen-free dielectric anti-reflective coating and hardmask
US7005390B2 (en) * 2002-10-09 2006-02-28 Intel Corporation Replenishment of surface carbon and surface passivation of low-k porous silicon-based dielectric materials
KR100909175B1 (ko) * 2002-12-27 2009-07-22 매그나칩 반도체 유한회사 듀얼 다마신 패턴 형성 방법
KR100573484B1 (ko) * 2003-06-30 2006-04-24 에스티마이크로일렉트로닉스 엔.브이. 반도체 소자 및 그 제조 방법
KR20050014231A (ko) * 2003-07-30 2005-02-07 매그나칩 반도체 유한회사 반도체소자의 형성방법
JP2005050954A (ja) * 2003-07-31 2005-02-24 Toshiba Corp 半導体装置およびその製造方法
US20050037153A1 (en) * 2003-08-14 2005-02-17 Applied Materials, Inc. Stress reduction of sioc low k films
JP4015976B2 (ja) * 2003-08-28 2007-11-28 株式会社東芝 電子装置の製造方法
JP2005203568A (ja) * 2004-01-15 2005-07-28 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法及び半導体装置
JP2006332408A (ja) * 2005-05-27 2006-12-07 Sony Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102543850A (zh) * 2010-11-17 2012-07-04 应用材料公司 处理低k介电膜的方法

Also Published As

Publication number Publication date
KR100939593B1 (ko) 2010-02-01
CN101202227A (zh) 2008-06-18
JP5174435B2 (ja) 2013-04-03
TW200826196A (en) 2008-06-16
JP2008147644A (ja) 2008-06-26
TWI392024B (zh) 2013-04-01
KR20080046087A (ko) 2008-05-26

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