CN100541746C - 电抛光具有带虚设结构的沟槽或者通路的晶片上的金属层 - Google Patents

电抛光具有带虚设结构的沟槽或者通路的晶片上的金属层 Download PDF

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Publication number
CN100541746C
CN100541746C CNB028088344A CN02808834A CN100541746C CN 100541746 C CN100541746 C CN 100541746C CN B028088344 A CNB028088344 A CN B028088344A CN 02808834 A CN02808834 A CN 02808834A CN 100541746 C CN100541746 C CN 100541746C
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China
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concave area
metal level
layer
barrier layer
metal
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Expired - Fee Related
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CNB028088344A
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English (en)
Chinese (zh)
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CN1663036A (zh
Inventor
王晖
易培豪
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ACM Research Inc
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ACM Research Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • H01L21/32125—Planarisation by chemical mechanical polishing [CMP] by simultaneously passing an electrical current, i.e. electrochemical mechanical polishing, e.g. ECMP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNB028088344A 2001-04-24 2002-04-04 电抛光具有带虚设结构的沟槽或者通路的晶片上的金属层 Expired - Fee Related CN100541746C (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US28627301P 2001-04-24 2001-04-24
US60/286,273 2001-04-24
US10/108,614 2002-03-27
US10/108,614 US6638863B2 (en) 2001-04-24 2002-03-27 Electropolishing metal layers on wafers having trenches or vias with dummy structures

Publications (2)

Publication Number Publication Date
CN1663036A CN1663036A (zh) 2005-08-31
CN100541746C true CN100541746C (zh) 2009-09-16

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CNB028088344A Expired - Fee Related CN100541746C (zh) 2001-04-24 2002-04-04 电抛光具有带虚设结构的沟槽或者通路的晶片上的金属层

Country Status (7)

Country Link
US (2) US6638863B2 (enExample)
EP (1) EP1382065A4 (enExample)
JP (1) JP2004527126A (enExample)
KR (1) KR101018187B1 (enExample)
CN (1) CN100541746C (enExample)
TW (1) TWI258814B (enExample)
WO (1) WO2002086961A1 (enExample)

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CN104637862A (zh) * 2013-11-14 2015-05-20 盛美半导体设备（上海）有限公司 半导体结构形成方法

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JP5412517B2 (ja) * 2008-08-20 2014-02-12 エーシーエム リサーチ （シャンハイ） インコーポレーテッド バリア層除去方法及び装置
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Also Published As

Publication number Publication date
WO2002086961A1 (en) 2002-10-31
KR20030093327A (ko) 2003-12-06
US20040080053A1 (en) 2004-04-29
EP1382065A1 (en) 2004-01-21
KR101018187B1 (ko) 2011-02-28
EP1382065A4 (en) 2009-04-15
US20020175419A1 (en) 2002-11-28
JP2004527126A (ja) 2004-09-02
TWI258814B (en) 2006-07-21
CN1663036A (zh) 2005-08-31
US6638863B2 (en) 2003-10-28

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